JPS5989460A - Manufacture of thyristor - Google Patents

Abstract

PURPOSE:To eliminate the variance of a life time by forming P-N-P-N four layer structure, lengthening the life time once only through heat treatment with no impurity diffusion and shortening the life time through the diffusion of a heavy metal. CONSTITUTION:The P-N-P-N four-layer structure is formed, and the whole is thermally treated within a range of 600-1,000 deg.C in an inert gas. Consequently, the life time lengthens up to 100-200musec from 20-40musec. The life time is shortened up to a target value such as 20musec through the diffusion of the heavy metal or the irradiation of electron rays or radiation. The life time lengthens through heat treatment while variance reduces, and the life time is kept within a range of 15-25musec when it is set to the target value of 20musec through the diffusion of the heavy metal.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to a method for manufacturing a thyristor.

[Technical background of the invention and its problems]

A conventional thyristor manufacturing method f will be explained using FIG. First, P-type impurities are diffused onto both main surfaces of the N-type silicon substrate 1 to form P-type layers 2.3 (a). Next, one of the P-type layers 2 is partially etched off (b), and N-type impurities are partially diffused into that layer to form a resistive layer 4 (c).

This process usually involves depositing phosphorus to a thickness of several micrometers,
Furthermore, the drive diffusion occurs at high temperatures, and the die-resistant layer 4 has a thickness of 20μ.
The depth is about m. After that, a P-type impurity is diffused at a concentration lower than that of the type layer 4 and within the depth of the type-resistant layer 4 to form a P-type layer 5.6 (d).

After obtaining the PNPN four-layer structure, heavy metal diffusion and electron beam or radiation irradiation are carried out to reduce the carrier lifetime of the substrate, and finally, the necessary electrodes are formed to complete the structure.

FIG. 2 shows changes in the lifetime of the substrate during the above manufacturing process. That is, the starting substrate is 100μfl
It has a lifetime of more than ee, but it decreases to 20 to 40 μsec in the P-type impurity diffusion step (a), and it decreases to 40 to 40 μsec in the Nfi impurity diffusion step (e) due to the ivy effect of phosphorus).
Recovery time is 60 μsec, and the process of P-type impurity diffusion is performed again (
In d), the time decreases again to 20 to 40 μsec. The target value of the lifetime due to subsequent heavy metal diffusion etc. varies depending on the specifications of the thyristor, but is generally about 20 μsee for low frequency applications. However, in conventional manufacturing methods, variations in lifetime before heavy metal diffusion remain as they are after heavy metal diffusion. To simply illustrate this situation, as shown in FIG. 3, there remains a large variation of 10 to 30 μsec with respect to the target value of 20 μsec.

If the lifetime values vary widely in this way, when a large number of thyristors are connected in series or in parallel, each thyristor will operate unevenly, putting a heavy burden on some of the thyristors and making them more likely to break down. There is an inconvenience that this happens.

[Purpose of the invention]

In view of the above points, it is an object of the present invention to provide a method for manufacturing a thyristor with less variation in lifetime.

[Summary of the invention]

In the present invention, PN
After forming the PN four-layer structure, the life time is increased by heat treatment without impurity diffusion in the range of 600°C to 1000°C, and then the lifetime is reduced to the target value by heavy metal diffusion, etc. Features. [Effects of the Invention] According to the present invention, heat treatment alone increases the fly life time and reduces the variation. Through heavy metal diffusion, etc., a thyristor with uniform characteristics can be obtained with small variations in fly life when all target values are set.

[Embodiments of the invention]

The present invention will be explained in detail below. The process of obtaining a 9PNPN four-layer structure using an N-type silicon substrate by diffusing P-type and N-type impurities is the same as the conventional process described in FIGS. 1(a) to 1(d). In this example, the PN of FIG. 1(d)
After forming the PN four-layer structure, heat treatment is performed. This heat treatment is performed at 600°C to 1000°C in an inert gas such as N2 gas.
The range is ℃. This gives a fly life of 20 to 40
It increases from μsec to 10()-120 μBee.

Below 600°C or above 1000°C, the lifetime does not increase and the variation thereof does not decrease. The relationship between this heat treatment temperature and lifetime is shown in FIG. As long as the heat treatment time is within 10 hours, almost the same effect can be achieved. After increasing the D lifetime, the lifetime is lowered to a target value, for example 20 μs, by diffusion of heavy metals or irradiation with electron beams or radiation.

The changes in lifetime in each process according to this example are shown in the fifth column.
Also shown in FIG. 6 is a heat treatment process followed by a heavy metal diffusion process. As is clear from these figures, the lifetime increases with heat treatment and the variation becomes smaller, and when the target value is set to 20 μl1eC due to heavy metal diffusion, it falls within the range of 15μ8eC to 25μ8ee.

As described above, according to this embodiment, a thyristor with small lifetime variations can be obtained by simply adding a heat treatment process, and reliability can be improved when a large number of thyristors are connected in series or in parallel.

As something similar to the present invention, for example [2500V].

600 A Gate Turn-off Thyri
stor (GTO): IEDM sl 979,
P, 246: M, AZuMA et al J.

Although the above-mentioned document increases the fly-life time by the darter effect of phosphorus, the value is at most 1,45 μBee, which is less than half of the value of the present invention. The present invention is superior in that it is not foolproof in that it can increase the lifetime by more than twice as much as the linda ivy method, and it also does not require complicated processes such as removing a single layer of ivy.

[Brief explanation of drawings]

Figures 1 (a) to (d) are diagrams showing the manufacturing process of a typical thyristor, Figures 2 and 3 are diagrams showing changes in lifetime in each conventional process, and Figure 4 is a diagram showing the heat treatment temperature. FIGS. 5 and 6 are diagrams showing changes in lifetime in each step of an embodiment of the present invention.0 1... N-type silicon substrate, 2 , 3...P type layer, 4+...N type layer, 5, 6...P+ type layer. Applicant's representative Patent attorney Takeshi Suzue Chapter 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (2)

[Claims] (1) P-type layers are formed by diffusing cine particles from both surfaces of an N-type semiconductor substrate, and impurities are partially diffused into one of the P-type layers on both sides to form an N-type layer to form a PNPN. After obtaining the four-layer structure, heat treatment is performed in the range of 600°C to 1000°C,
1. A method for manufacturing a thyristor, characterized in that the lifetime is then set within a predetermined range by diffusion of heavy metals or irradiation with electron beams or radiation. (2) The method for producing cyriska according to claim 1, wherein the heat treatment is performed in an inert gas for a treatment time of 10 hours or less.