JPS5984914U

JPS5984914U - Power amplification variable circuit

Info

Publication number: JPS5984914U
Application number: JP15167182U
Authority: JP
Inventors: 小林　喜三郎; 船橋　清一; 田辺　修
Original assignee: 株式会社東芝
Priority date: 1982-10-06
Filing date: 1982-10-06
Publication date: 1984-06-08

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の電力増幅回路を示す図、第２図はこの考
案の電力増幅可変回路の一実施例を示す回路図である。１・・・増幅回路、２・・・入力信号源、３・・・供給
回路、４・・・分配回路、５・・・演算増幅器、６１，
６２゜１０１、−１０２・・・抵抗、１１．　１２．　
８１．　９１・・・トランジス名、１３〜１５・・・イ
ンピーダンス、７１．７２・・・ダイオード、ＲＸ・・
・電力可変疫抗、Ｒ２１〜Ｒ２ｎ・・・負荷抵抗、Ｒ３
１〜Ｒ３ｎ・・・ダミーロード、Ｋ１〜Ｋｎ・・・出力
端。FIG. 1 is a diagram showing a conventional power amplification circuit, and FIG. 2 is a circuit diagram showing an embodiment of the variable power amplification circuit of the present invention. DESCRIPTION OF SYMBOLS 1... Amplification circuit, 2... Input signal source, 3... Supply circuit, 4... Distribution circuit, 5... Operational amplifier, 61,
62°101, -102...Resistance, 11. 12.
81. 91...Transistor name, 13-15...Impedance, 71.72...Diode, RX...
・Power variable resistance, R21 to R2n...Load resistance, R3
1~R3n...Dummy load, K1~Kn...Output terminal.

Claims

[Scope of utility model registration request]

An operational amplifier that amplifies the input signal in the first stage, a push-pull amplifier circuit composed of NPN and PNP transistors in the final stage that amplifies the output of this operational amplifier, and an input terminal of this push-pull amplifier circuit and the above-mentioned operation. a DC bell shift circuit connected between the output terminals of the amplifier and shifting the DC level in the positive direction and the negative direction; and a negative feedback circuit that feeds back the output of the push-pull amplifier circuit to the input terminal of the operational amplifier; A variable power amplification circuit comprising a circuit that controls the amount of current of the DC level shift circuit to set an optimum bias current of the push-pull amplifier circuit corresponding to the power amplification degree.