JPS5983006U - barista - Google Patents

barista

Info

Publication number
JPS5983006U
JPS5983006U JP17823082U JP17823082U JPS5983006U JP S5983006 U JPS5983006 U JP S5983006U JP 17823082 U JP17823082 U JP 17823082U JP 17823082 U JP17823082 U JP 17823082U JP S5983006 U JPS5983006 U JP S5983006U
Authority
JP
Japan
Prior art keywords
barista
substrate
abstract
electrode
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17823082U
Other languages
Japanese (ja)
Inventor
奥村 満男
宮林 進
宇沼 巌
Original Assignee
ティーディーケイ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ティーディーケイ株式会社 filed Critical ティーディーケイ株式会社
Priority to JP17823082U priority Critical patent/JPS5983006U/en
Publication of JPS5983006U publication Critical patent/JPS5983006U/en
Pending legal-status Critical Current

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  • Thermistors And Varistors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aは従来例に係るバリスタを示す平面図、第1図
すは同側面図、第2図aは本考案に係るバリスタを示す
平面図、第2図すは同側面図である。 11・・・・・・基体、12・・・・・・電圧印加電極
、13・・・・・・チップ状バリスタ。
FIG. 1a is a plan view showing a conventional varistor, and FIG. 1 is a side view thereof, and FIG. 2a is a plan view and a side view showing a varistor according to the present invention. 11... Base, 12... Voltage application electrode, 13... Chip-shaped varistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アルミナ、ステアタイト、ガラスエポキシ等の耐熱性材
料を基体にし、その板面に電圧を印加する電極層を形成
すると共に、各電極間に位置させてチップ状のバリスタ
を基板に埋込み装着したことを特徴とするバリスタ。
The substrate is made of a heat-resistant material such as alumina, steatite, glass epoxy, etc., and an electrode layer for applying voltage is formed on the board surface, and a chip-shaped varistor is embedded in the substrate and placed between each electrode. Featured barista.
JP17823082U 1982-11-25 1982-11-25 barista Pending JPS5983006U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17823082U JPS5983006U (en) 1982-11-25 1982-11-25 barista

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17823082U JPS5983006U (en) 1982-11-25 1982-11-25 barista

Publications (1)

Publication Number Publication Date
JPS5983006U true JPS5983006U (en) 1984-06-05

Family

ID=30387010

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17823082U Pending JPS5983006U (en) 1982-11-25 1982-11-25 barista

Country Status (1)

Country Link
JP (1) JPS5983006U (en)

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