JPS598167A - Disc driving circuit - Google Patents

Abstract

PURPOSE:To pull in a disc quickly to the rotation number of a prescribed linear speed for a pickup by the voltage of an auxiliary circuit. CONSTITUTION:When an error voltage Mv from a controlling circuit 7 is supplied to a driving motor 6 through a changeover switch 12, the driving motor 6 is so controlled that the disc is rotated in a prescribed uniform linear speed for the pickup. Meanwhile, an auxiliary circuit 9 is provided, and a coding signal is supplied from an input terminal 8 to this circuit 9, and a voltage M'v corresponding to frequency where the inversion interval of this coding signal exceeds a maximum inversion interval is generated; and when this generation frequency voltage M'v is supplied to the driving motor 6 through a changeover switch 12, the rotation number of the driving motor 6 is changed greatly and quickly and is approximated to the prescribed linear speed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a disk drive circuit suitable for a disk on which digital audio signals are recorded, and particularly to a disk drive circuit for rotating the disk at a constant linear speed.

In recent years, the development of audio disc systems that digitize audio signals, record them on discs, and play them back has progressed rapidly. In particular, optical audio disc systems are attracting a lot of attention as an alternative to conventional audio records. . Such an optical audio disc system uses a laser beam or the like to extract audio signals from the disc without contact between the playback needle and the disc, as in the case of replay, and therefore the disc is less painful and can be used semi-permanently. Not only that, but the sound quality of the reproduced audio is also extremely good.

Here, an example of a conventional digital audio disc system with two left and right channels of stereo signals will be briefly described.

The audio signal is converted into 16-bit sample data using a 44.1 kHz summing frequency, and further converted into 8-bit sample data.
Divide into bits. Note that 8 bits is called 1 symbol, and 1 sample data becomes 2 symbol data.

Then, 2×2×6=24 symbols of sample data are arranged in units of 6 sample data from the left and right channels. This unit array of sample data is appropriately processed and a parity signal of 8 symbols in total, 4 VC symbols every 12 symbols, is added to form a 32-symbol signal.

This signal is further modulated into a code with 14 bits per symbol after adding a 1 symbol control signal.

The frequency of the clock pulse for a 14-bit code is approximately 4.3 M)iz, and this 14-bit code has a high level so that less than 3 bits and more than 11 bits of the clock pulse do not have the same level continuously. This is a code that performs level reversal between the low level and the low level. Note that each bit of the code is called a channel bit.

Next, a combination bit of 3 channel bits and a synchronization signal of 24 channel bits are added to the code modulated signal every 14 channel bits. In this way, an encoded signal forming one frame is obtained for a total of 12 sample data, 6 sample data for each of the left and right channels. One frame consists of 588 channel bits, and a synchronization signal is added at the beginning of one frame.The period of the synchronization signal is 588 channel bits, or 136 I in 588/(4,3X10').
It is tsec.

Signals encoded in this way have a narrow transmission band and do not include low-frequency components in order to avoid overlapping the frequency band with the control signal for operating the servo system. Therefore, the inversion interval of the encoded signal is such that the minimum inversion interval T maim is 3 bits, that is, the repetition period of the 4.3 MHz clock pulse is T
(:=0.23μ5ec), the maximum inversion interval T wax is defined to be 3T and IIT.

Therefore, as mentioned above, each data part of one symbol consisting of 14 channel bits is a code in which the same level is less than 3T and does not continue beyond IIT.
In adjacent data parts, the same level may continue to be less than 3T or more than ]1'I', and this is adjusted by the combination bit of 3 channel bits added between the adjacent data parts. . In addition, the synchronization signal of 24 channel bits inverts the level every 11T, for example, 11T high level, 11T low level, 2T (
7) It consists of A-levels.

The signals encoded as described above (hereinafter referred to as encoded signals) are recorded on a disc, and an audio disc player reproduces audio signals from such a disc.

The encoded signal reproduced from the pickup is supplied to the demodulation circuit, where the synchronization signal is separated and the data is decoded.
Furthermore, the desired stereo audio signal is obtained by D/A conversion.

The separated synchronization signal is supplied to a disk drive circuit so that the disk rotates at a predetermined rotational speed.

Note that a one-symbol control signal added to each frame of the encoded signal is used to control the system, and enables operations such as access to a desired song.

An example of a conventional audio disc system has been briefly described above, and next, driving of the disc will be described.

Conventionally, the so-called constant angular velocity drive method, in which the number of revolutions of the disk is always kept constant, has been common as a method for driving a disk. Since this driving method is sufficient, a motor powered by a commercial AC power source can be used as the drive motor, and the servo system of the drive motor does not have as complicated a structure as the one shown above. Further, in a disc system that uses video signals such as a video disc, the constant angular velocity driving method is very convenient because special playback can be performed using the periodicity of the video signal.

However, in recent years, there has been an increasing demand for higher recording densities in recording media to promote increased recording capacity, and audio disc systems have also been able to satisfy these demands↑
There is a growing need to configure 5VC.

Therefore, in order to satisfy this demand, the recording track width and recording track spacing on the disc were made extremely narrow, and as a result, the recording density was significantly improved compared to conventional audio records. 〇However, when a constant angular velocity drive method is adopted as the disk drive method, the rotational speed of the disk is different between the inner and outer circumferences of the disk, and therefore, the recording density is lower at the outer circumference where the rotational speed is higher, and the disk The disadvantage was that the utilization efficiency of

On the other hand, another method for driving the disk is to change the number of rotations of the disk according to the position of the pickup in the radial direction of the disk, so that no matter where the pickup is in the radial direction of the disk, the disk is paired with the pickup. There is a so-called constant linear velocity driving method in which the linear velocities of the two are made equal.

According to this driving method, the recording density is constant regardless of the inner or outer circumference of the disk, and the recording capacity can be further increased.

In audio disc systems, unlike video signals, there is no problem with the periodicity of the recording signal and its use, so when adopting the constant linear velocity drive method, there is no restriction due to such problems and high recording density can be achieved. And, conversely, can the same amount of audio information be achieved? When recording, the disc can be made more compact than when a constant angular velocity drive method is used.

FIG. 1 is a block diagram showing an example of a conventional σ) disk drive circuit for constant linear speed drive, in which 1 is an input terminal, 2
3 is a synchronous signal detection circuit, 3 is a crystal oscillation circuit, 4 is a frequency dividing circuit, 54 is a phase comparison circuit, and 6 is a drive motor.

Next, the operation of this prior art will be explained.

In FIG. 1, the rotation of the drive motor 6 causes the disc (
(not shown) rotates, the aforementioned encoded signal is reproduced from the disk, and this signal is supplied from the input terminal 1 to the synchronization signal detection circuit 2, where the synchronization signal is detected. On the other hand, a pulse signal with a constant repetition frequency from the crystal oscillation circuit 3 is supplied to a frequency dividing circuit 4VC, and becomes a pulse signal with a predetermined repetition frequency.

The synchronizing signal from the synchronizing signal detection circuit 2 and the pulse signal from the frequency dividing circuit 4 are compared in a phase comparator circuit 5, and an error voltage is generated to control the rotation speed of the drive motor 6.

On a disk (not shown), encoded signals are distributed in spiral recording tracks at a uniform recording density in the radial direction of the disk, and for this reason, the synchronization signal included in the encoded signal is . J:5c.

The clock pulses for the encoded signal are recorded at a period of 588 channel bits (2), so that they are recorded at equal intervals along the recording track over the entire recording area on the disk.

On the other hand, the period of the pulse signal from the frequency dividing circuit 4 is the period of the synchronization signal when recording the encoded signal, f, that is, 588/4,
It is set equal to 136μsec in 3X10',
Therefore, the drive motor 6 should be controlled so that the period of the synchronization signal is equal to the period of the pulse signal. Therefore, since the synchronization signal is recorded at equal intervals along the recording track over the entire upper recording area of the disk, the rotation speed of the drive motor changes depending on the position of the pickup in the radial direction of the disk. However, the disk rotates so that its linear velocity relative to the pickup becomes a predetermined linear velocity.

As described above, equal linear speed driving can be performed, but the above conventional technology has a slow response speed (and as shown in FIG. 2, the synchronization signal and the output pulse signal of the frequency dividing circuit 4 Since there is a pull-in range from the comparability limit of , there is a drawback that if the rotation speed of the drive motor 6 is significantly different from the rotation speed depending on the position of the pickup, the rotation speed of the drive motor 6 cannot be controlled. This is especially true when performing random access for music selection, etc.
This is a problem because the number of revolutions must be changed rapidly.

In Fig. 2, the horizontal axis represents the repetition frequency fs of the synchronizing signal from the synchronizing signal detection circuit 2 (Fig. 1), and the vertical axis represents the error voltage x from the phase comparator circuit 5 (Fig. 1). ,
f8. , f□ are the lower limit repetition frequency and upper limit repetition frequency of the synchronization signal in the pull-in range, and fx is the repetition frequency of the pulse signal from the frequency dividing circuit 4 (Fig. 1), which is the target of the synchronization signal. is the repetition frequency.

Furthermore, as shown in FIG. 2, the disk drive circuit of FIG.
is generated to increase the rotation speed of the drive motor 6, and when it is low, a low error voltage Mv is generated to lower the rotation speed of the drive motor 6, so that the frequency fs of the synchronization signal becomes equal to fx, that is, , the VC1 drive motor 6 is controlled so that the disk rotates at a constant linear speed with respect to the pickup.

An object of the present invention is to eliminate the drawbacks of the prior art described above, to make it possible to rapidly change the rotational speed of the disk over a wide range, and to quickly bring the rotational speed to a predetermined linear velocity for the pickup. An object of the present invention is to provide a disk drive circuit according to the present invention.

In order to achieve this object, the present invention provides an auxiliary circuit that generates a voltage according to the maximum inversion interval T of the reproduced encoded signal, and the frequency of occurrence of an inversion interval exceeding 8. It is characterized by the ability to significantly and rapidly change the rotation speed of the motor.

Hereinafter, embodiments of the present invention will be explained with reference to the drawings.

FIG. 3 is a block diagram showing an embodiment of the disk drive circuit according to the present invention, in which 7 is a control circuit, 8 is an input terminal,
9 is an auxiliary circuit, 10 is a maximum inversion interval or more detection circuit, 11
1 is a low-pass filter, 12 is a changeover switch, and portions VC corresponding to those in FIG. 1 are given the same reference numerals.

Next, the operation of this embodiment will be explained.

Hereinafter, in this embodiment, the disk system has a maximum reversal interval T max of 1 on the disk as described above.
The following description will be made assuming that a digital audio disc system is recorded with an encoded signal of 1T (where T is the period of channel bits) and a minimum inversion interval T, .

In FIG. 3, the control circuit 7 includes a synchronizing signal detection circuit 2, a crystal oscillation circuit 3, a frequency dividing circuit 410, and a phase comparator circuit 5 in FIG. The detection circuit 2 outputs an error voltage Mv corresponding to the phase difference between the synchronization signal and the pulse signal from the frequency divider 4.

When this error voltage Mv is supplied to the drive motor 6VC via the changeover switch 12, the disk (not shown) rotates at a predetermined uniform linear speed (hereinafter referred to as the specified linear speed) with respect to the pickup (not shown). The dynamic motor 6 is controlled.

On the other hand, an auxiliary circuit 9 is provided, and an encoded signal is supplied from an input terminal 8 so that the inversion interval of the encoded signal exceeds the maximum inversion interval TIIIK. is generated, and the generated frequency voltage M'y is applied to the drive motor 6VC via the changeover switch 12.
When supplied, the rotation speed of the drive motor 6 is high, and
The rotational speed of the drive motor 6 suddenly changes and the rotational speed of the drive motor 6 approaches the specified linear speed.

The auxiliary circuit 9 includes a maximum inversion interval or more detection circuit 10 and a low-pass filter 11. The maximum reversal interval or more detection circuit 9 is
The encoded signal supplied from input terminal 8 has a maximum inversion interval T.
This is detected when the inversion interval exceeds m & X, and a pulse signal having a constant amplitude and a sufficiently large pulse width is generated. The frequency of occurrence of this pulse signal changes depending on the linear velocity of the disk relative to the pickup. The frequency of occurrence of the pulse signal of the output signal of the maximum reversal interval or more detection circuit 10, therefore, the DC voltage according to the linear velocity of the disk relative to the pickup, that is, the frequency of occurrence voltage M
'7 occurs.

Here, the point that the maximum reversal interval or longer detection circuit 10 generates a pulse signal with a frequency of occurrence depending on the linear velocity of the disk relative to the pickup will be explained.

As mentioned earlier, the encoded signal recorded on the disc has a maximum inversion interval T. , X are defined as IIT, and there is no inversion interval between them.

However, when reproducing encoded signals from a disk, the reversal interval of the reproduced encoded signal (hereinafter referred to as the reproduced encoded signal) changes depending on the linear velocity of the disk relative to the pickup, and the linear velocity of the disk relative to the pickup changes. When the linear velocity becomes smaller than the specified linear velocity, an inversion interval exceeding the maximum inversion interval T□8 appears in the reproduced encoded signal. Such inversion intervals may also appear in the data part, but
As mentioned earlier, the synchronization signal consists of 24 channel bits that are inverted every maximum inversion interval T□8 in the encoded signal, so the inversion interval always exceeds the maximum inversion interval T□8 in the synchronization signal part. It turns out.

On the other hand, when a disk rotates, wow and flutter occur due to uneven rotation and eccentricity of the disk, and for this reason, the reproduced encoded signal contains jitter. This jitter changes the inversion interval of the reproduced encoded signal. Generally, this change is periodic with respect to the rotation of the disk;
For this reason, the reversal interval periodically expands and contracts.

However, the actual linear velocity of the disk relative to the pickup does not change periodically with respect to the rotation of the disk;
It consists of a linear velocity that changes according to the DC component of the control signal to the drive motor 6 (hereinafter referred to as average linear velocity), and a linear velocity that changes periodically due to jitter (hereinafter referred to as periodic linear velocity). Therefore, due to the periodic linear velocity, even if the average linear velocity of the disc relative to the pickup becomes less than the specified linear velocity, the maximum reversal interval T of the code IHI signal recorded on the disc is reproduced. Depending on the temperature, the maximum reversal interval may not be exceeded, and conversely, even if the average linear velocity exceeds the specified linear velocity, the maximum reversal interval may be exceeded. However, as the average linear velocity decreases, the reversal interval of the reproduced encoded signal increases on average and becomes thicker (as it decreases on average, the reversal interval that exceeds the maximum reversal interval of the reproduced encoded signal The frequency of occurrence of the interval increases as the average linear velocity decreases, and as the average linear velocity increases (indeed, it decreases), the frequency of occurrence changes according to the average linear velocity.

Such a reproduced encoded signal is supplied to the maximum inversion interval or more detection circuit 10, and the maximum inversion interval or more detection circuit 10 generates a pulse signal at a frequency corresponding to the average linear velocity of the disk relative to the pickup. This pulse signal is supplied to a low-pass filter IIVc, and a DC voltage M/ is generated according to the frequency of occurrence.

FIG. 4 shows how the output DC voltage M'v of the low-pass filter 11 changes with respect to the synchronizing signal frequency f8. Synchronization signal frequency f
8. Below, the output DC voltage M/ becomes constant.

This means that the maximum inversion interval T
The speed (frequency f, ,
This is because when the maximum inversion interval or more is less than (equivalent to vc), the frequency of generation of pulse signals of the maximum inversion interval or more detection circuit 10 becomes maximum. Further, when the synchronizing signal frequency f84 or higher is reached, the output DC voltage M'v becomes constant at this time as well. This means that the average linear velocity of the disc relative to the pickup is greater than or equal to a certain value (
This is because when the frequency reaches '54 VC), an inversion interval of the maximum inversion interval T7.8 or more no longer appears in the reproduced encoded signal.

The error voltage Mv from the control circuit 7 and the frequency-of-occurrence voltage M'9 from the auxiliary circuit 9 are supplied to the drive motor 6 via a selective switch 12. The selector switch 12 is configured so that the frequency f8 of the synchronizing signal is a frequency near the frequency fX! 1B+'86 (FIG. 4), it closes to the control circuit 7 side and the frequency f8. It closes to the auxiliary circuit 9 side when it is within the following A region (FIG. 4) or within the C region (FIG. 4) where the frequency is higher than f86. Region B is within the pull-in range in the control operation of the drive motor 6 by the control circuit 7.

However, the linear velocity of the disk relative to the pickup is
When the linear velocity is significantly different from the specified linear velocity, the drive motor 6 is controlled by the frequency of occurrence voltage M'v from the auxiliary circuit 9, and the drive motor 6 is controlled so that the frequency f8 of the periodic signal is equal to the frequency fx.
As VC approaches quickly, the rotational speed changes rapidly. Note that the changeover of the changeover switch 12 is performed by detecting the length, interval, etc. of the synchronization signal separated by a demodulation circuit of the reproduced encoded signal (not shown), and determining the A, B, and C areas (FIG. 4). This can be done by

However, even if the linear velocity of the disc relative to the pickup is significantly different from the specified linear velocity, such as during an access operation to select a desired song or due to rapid displacement of the pickup, the rotational speed of the disc may change rapidly. This means that the specified linear velocity can be quickly reached.

The auxiliary circuit 9 is provided with region B in FIG. 4 to have the function of detecting the frequency of occurrence of an inversion interval greater than or equal to the maximum inversion interval T□8.

FIG. 5 is a block diagram showing a specific example of the auxiliary circuit 9 in FIG.
digit counter, 16 is an inversion detection circuit, 17 is an AND circuit,
18 is a 几S flip-flop circuit, 19 is a latch circuit, 2o is an inverter, 21 is an amplifier circuit, and 22 is an output terminal. Components corresponding to those in FIG. 3 are given the same reference numerals. A) and (B) are timing charts for explaining the operation of FIG. 5 using signals from each part of FIG. 5, and signals corresponding to those in FIG. 5 are given the same reference numerals.

Next, the operation of this specific example will be explained.

Figures 5 and 6 (A), (B) Clock pulse a is input from the input terminal 13 to the 4-bit binary counter 15.
The 4-bit binary counter 15 counts the clock pulses a. On the other hand, the reproduced encoded signal s is supplied from the input terminal 8 to the inversion detection circuit 16VC, and the inversion detection circuit 16 detects the inversion of the level of the reproduced encoded signal and generates a clear signal d. The clear signal d is supplied to the clear terminal Cvc of the 4-bit binary counter 15, and the 4-bit bit 2
The advance counter 15 is cleared every time the reproduced encoded signal is inverted.

The repetition frequency of the clock pulse a is equal to the repetition frequency of the channel bits of the encoded signal when recording on the disk, that is, 4.3 MHzK, and the 4-bit binary counter 15 reproduces the repetition period T of the clock pulse 8 as a unit length. It has a function of detecting the inversion interval of the encoded signal. Then, the 4-bit binary counter 15 has a count number of "
12" or more, the upper two bits are both "11"
It becomes a pit and outputs a high level "1" bit to the sQc+Qn terminals, respectively. The output signals of the Qc and QD terminals are logically operated by an AND circuit 17 and sent to a cell 7 of an RS flip-flop circuit 18).

Therefore, when the inversion interval of the reproduced encoded signal becomes 12T or more, the output signal of the QCyQ terminal of the 4-bit binary counter 15 becomes ! 11'', and a set pulse e is generated from the AND circuit 17 to set the R-8 flip-flop circuit 18.

On the other hand, from the input terminal 14, a clock pulse C of 3.7 kHz having a period corresponding to y2 frames of the encoded signal is supplied, and from this clock pulse clc, R-
8 flip-flop circuit 18 is reset. Therefore, from the R-8 flip-flop circuit 18, the pulse width t
, generates a pulse signal f. By the way, the pulse signal f
The pulse width 1, is the R-8 flip-flop circuit 18 (
7') Depending on the timing of set and reset, if this pulse signal f is directly supplied to the low-pass filter III/C to form the frequency of occurrence voltage M'7, the frequency of occurrence voltage M'7
includes the timing-dependent quantities mentioned above.Drive motor 6
(FIG. 5) cannot perform the desired operation.

Therefore, the output signal f of the R-8 flip-flop circuit 18 is supplied to the latch circuit 19 and latched by the clock pulse C from the input terminal 19. Latch circuit 1
9 is latched at a high level π near the trailing edge of the pulse signal f when the pulse signal f is supplied from the R-S flip-flop circuit 18, and is latched at a low level when there is no pulse signal f. Therefore, from the latch circuit 19,
A pulse signal with a pulse width equal to the period of the clock pulse C is obtained, and is inverted by the inverter 20 to become a pulse signal g. The pulse signal g is a reproduction encoded signal of 12T or more,
That is, an inversion interval exceeding the maximum inversion interval T1.8 occurs with a frequency of occurrence, and in particular, after the pulse signal g is generated and before the next clock pulse C appears, the maximum inversion interval T□8 is generated in the reproduced encoded signal. When a reversal interval that exceeds appears,
The pulse width of the pulse signal g is longer than the period of the clock pulse C. However, the pulse width of the pulse signal g is
Since the latch circuit 190 operates, it is an integer multiple of the clock pulse C.

The pulse signal g is fed to a low pass filter II.

A DC voltage is obtained from the low-pass filter 11, which varies according to the frequency of occurrence of the pulse signal g, and hence the linear velocity of the disk relative to the pickup. Output terminal 22
The selector switch 12 (third
Figure).

As described above, according to this specific example, the inversion interval exceeding the maximum inversion interval T□8 of the reproduced encoded signal is accurately detected, and the pulse signal g
Since the pulse width of is determined by the period of the clock pulse C, the frequency of occurrence voltage M' obtained from the auxiliary circuit 9
v is a voltage corresponding to the frequency of occurrence of an inversion interval exceeding the maximum inversion interval T□8 of the reproduced encoded signal, and no matter what the linear velocity of the disk to the pickup is, It is obtained as a voltage. Therefore, the rotation speed of the drive motor 6 (FIG. 3) can be changed significantly and rapidly.

Further, in the above specific example, the circuit configuration is not as complicated as the one shown above, and can be constructed using conventionally known circuits, and does not significantly increase the cost of the audio disc player.

FIG. 7 is a block diagram showing another specific example of the auxiliary circuit of FIG. 3, in which 23 is an inversion detection circuit, 24 is a retrigger monostable multivibrator circuit, 25 is a monostable multivibrator circuit, and 26 is an amplifier circuit. , 27 are output terminals, and parts corresponding to those in FIG. 3 are given the same reference numerals.

FIG. 8 is a timing chart for explaining the operation of FIG. 7 using signals from each part of FIG. 7, and signals corresponding to those in FIG. 7 are given the same reference numerals.

Next, the operation of this specific example will be explained.

In FIGS. 7 and 8, the reproduced encoded signal p is supplied from the input terminal 8 to the inversion detection rotation 23, and the reproduced encoded signal p
An inverted pulse signal representing the inversion of is obtained.

Pulse signal q is a retrigger monostable multivibrator 24
trigger. The time constant t of the retrigger monostable multivibrator circuit 24 is determined by the resistor R1, capacitor C, and VC, and the maximum reversal interval T□.

1xT(z, 54μ5ec)c is set.

Therefore, when the inversion interval of the reproduced encoded signal p exceeds 11T, the retrigger monostable multi-by-break circuit 24 inverts the low level r and inverts it to a higher level than the next inverted pulse signal qVc. However, the re-trigger multivibrator circuit 24 triggers the e-break circuit 25 when the inversion interval of the reproduced encoded signal p exceeds IIT. Time constant of monostable multivibrator circuit 25 1. is determined by the resistor R7 and capacitor Ct, and is determined by the clock pulse C in Fig. 5.
The period of is set equal to y.

However, from the monostable multipipe lake 25, the fifth
A pulse signal S equivalent to the pulse signal g obtained from the inverter 20 shown in the figure can be obtained. Pulse signal S is passed through low-pass filter 1
1, it is converted into a DC voltage, amplified by the amplifier circuit 26, and supplied from the output terminal 27 to the selector switch 12 (FIG. 3) as the frequency-of-occurrence voltage M'7.

According to this specific example, the circuit configuration is further simplified, and the cost increase of the audio disc player can be further suppressed.

Two specific examples have been shown above as auxiliary circuits, but the circuit is not limited to these specific examples, and is configured to generate a control voltage according to the frequency of occurrence of an inversion interval that exceeds the maximum inversion interval of a reproduced encoded signal. It is clear that other circuits described above could be employed as auxiliary circuits of the present invention. Furthermore, in the above embodiment, the frequency f81* in FIG.
f88 can be set arbitrarily.

Further, in the above embodiment, the disk system has been described as a conventional digital audio disk system, but this is not limited to VC, and is a signal that includes a synchronization signal and whose level is inverted, and whose level inversion interval is a predetermined interval. It is clear that the invention can be applied to any 'disk system that replays signals defined within the range of nCC.

As explained above, according to the present invention, the rotational speed of the drive motor can be changed significantly and rapidly, so no matter what the linear velocity of the disk relative to the pickup is, it can quickly reach the specified speed. The present invention provides a disc drive circuit with superior functionality, which eliminates the drawbacks of the prior art described above, by allowing the disc to be drawn to a linear velocity and allowing the disc to start normal play quickly when the disc is driven at a constant linear velocity. f
Be able to do it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional example of a conventional disk drive circuit, FIG. 2 is an explanatory diagram showing the retracting range of FIG. 1, and FIG.
The figure is a block diagram showing an embodiment of the KJ and filter disk drive circuit of the present invention, Figure 4 is a characteristic diagram showing the relationship between the synchronizing signal frequency of the auxiliary circuit of Figure 3 and the output voltage of the filter, and Figure 5. is a block diagram showing one specific example of the auxiliary circuit in FIG. 3, FIG. 6 is a timing chart for explaining the operation of FIG. 5, and FIG. 7 is a block diagram showing another specific example of the auxiliary circuit in FIG. 3. The block diagram, FIG. 8, is a timing chart for explaining the operation of FIG. 7. 1... Input terminal, 2... Synchronous signal detection circuit, 3... Crystal oscillation circuit, 4... Frequency dividing circuit, 5...・Phase comparison circuit, 6...
Drive motor, 7... Control circuit, 8...
Input terminal, 9... Auxiliary circuit, 10...
Maximum inversion interval or more detection circuit, 1]...Low pass filter, 12...Switch switch, 13.14...
...Clock pulse input terminal, 15...4
Bit binary counter, 16...inversion detection circuit,
17...AND circuit, 18...R-S
Flip-flop circuit, 19...Latch circuit,
20... Inverter, 2J... Amplifier circuit, 22... Output terminal, 23... Reversal detection circuit, 24... Retrigger single Stable multivibrator, 25...monostable multipipe rake, 26...amplifier circuit, 27...output terminal.

Claims (1)

[Claims] (1) A synchronizing signal is separated from a coded signal that is reproduced from a disk and whose inversion interval should be within a predetermined range, and the phase of the synchronizing signal and a reference signal of a constant frequency is compared, and the obtained signal is obtained. an output signal corresponding to the frequency of occurrence of an inversion interval exceeding the predetermined range of the encoded signal in a disk drive circuit equipped with a margin control circuit for rotating the disk at a predetermined uniform linear speed based on the error signal obtained by the encoded signal; The present invention is characterized in that the rotational speed of the disk can be brought close to the predetermined constant linear speed by providing an auxiliary circuit that generates the output signal and changing the rotational speed of the disk using the output signal. Disk drive circuit. (2. In claim (1), the auxiliary circuit includes a maximum inversion interval or more detection circuit that generates an output signal when the inversion interval of the encoded signal exceeds the predetermined range; A disk drive circuit comprising: an r-wave generator to which a signal is supplied. (3) In claim (2), the maximum inversion interval or longer detection circuit counts first clock pulses. a counter that is cleared every time the encoded signal is inverted and generates an output pulse signal when the inversion interval of the encoded signal exceeds the predetermined range; and a second counter that is set by the output pulse signal of the counter. a flip-flop circuit that is reset by the second clock pulse, and a latch circuit that latches the output level of the flip-flop circuit by the second clock pulse, and when the inversion interval of the encoded signal exceeds the predetermined range. The disk drive circuit is characterized in that the disk drive circuit is configured to generate the output signal having a pulse width equal to the repetition period of the second clock pulse. In item 2), the maximum inversion interval or greater detection circuit is a re-triggering monostable multi-byte circuit which is triggered every time the encoded signal is inverted and has a first time constant equal to the maximum inversion interval within the predetermined range. It consists of a predicator circuit and a monostable multivibrator circuit triggered by the output pulse signal from the first retrigger monostable multivibrator circuit and having a second time constant, the inversion interval of the encoded signal is 2. A disk drive circuit characterized in that said output signal can be generated with a pulse width equal to said second time constant when said second time constant exceeds said predetermined range.