JPS5977529A - Constant-current circuit - Google Patents
Constant-current circuitInfo
- Publication number
- JPS5977529A JPS5977529A JP18855882A JP18855882A JPS5977529A JP S5977529 A JPS5977529 A JP S5977529A JP 18855882 A JP18855882 A JP 18855882A JP 18855882 A JP18855882 A JP 18855882A JP S5977529 A JPS5977529 A JP S5977529A
- Authority
- JP
- Japan
- Prior art keywords
- current
- transistors
- constant current
- voltage drop
- constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/26—Current mirrors
- G05F3/265—Current mirrors using bipolar transistors only
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は一定の電流を得る定電流回路に関するもので、
竹に電源又はアースの電圧変動を抑圧するS V RR
(Supply Voltage Rejection
Ratio)%性の改善を図ったものに関するもので
ある。[Detailed Description of the Invention] The present invention relates to a constant current circuit that obtains a constant current.
S V RR that suppresses voltage fluctuations in the power supply or ground on bamboo
(Supply Voltage Rejection
Ratio) This relates to a product that aims to improve the ratio.
第1図に従来の定電流回路を示す。図において、q】は
ダイオード接続されたトランジスタ、Q2はトランジス
タQ1とベースおよびエミッタが共通接続されたトラン
ジスタ、rは両トランジスタQ+ r Q2のエミッタ
間の配線が有する抵抗、IRはトランジスタ窃に流れる
基準電流、IaはトランジスタQ2に流れる定電流、I
aはアルスミ流、△Vは上記抵抗1による両エミッタ間
の電圧降下である。FIG. 1 shows a conventional constant current circuit. In the figure, q] is a diode-connected transistor, Q2 is a transistor whose base and emitter are commonly connected to transistor Q1, r is the resistance of the wiring between both transistors Q+ r and the emitter of Q2, and IR is the reference current flowing through the transistor. The current Ia is the constant current flowing through the transistor Q2, I
a is the aluminum current, and ΔV is the voltage drop between both emitters due to the resistor 1.
次に動作について説明する。Next, the operation will be explained.
第1図において、コレクタベース短絡されたトランジス
タQ1はダイオードとして動作するもので、トランジス
タQ、にはこのトランジスタ(1に流す基準電流IRに
等しい定電流IOが流れる。但し、ここでトランジスタ
Q、、Q2のベース電流は無視し1両トランノスタ窃+
Qtの特性は等しいとしている。In FIG. 1, the collector-base shorted transistor Q1 operates as a diode, and a constant current IO equal to the reference current IR flowing through this transistor (1) flows through the transistor Q. Ignore the base current of Q2 and steal 1-car transistor +
It is assumed that the Qt characteristics are the same.
この定電流回路を集積回路(以ドICと称す)で実現す
る場合、第2図に示す接続となる。同図において、第1
図と同一符号は同一のものを示し、Bはベース、Eはエ
ミッタ、Cはコレクタ、(1)はアルミ配線、(2)は
コンタクトである。When this constant current circuit is implemented using an integrated circuit (hereinafter referred to as an IC), the connections are as shown in FIG. In the same figure, the first
The same reference numerals as in the figure indicate the same parts, B is the base, E is the emitter, C is the collector, (1) is the aluminum wiring, and (2) is the contact.
次に動作について説明する。Next, the operation will be explained.
接続のためのアルミ配線(1)は有限の抵抗値を持ち、
一般に面抵抗約50mΩの値を有する。このため、トラ
ンジスタW+、Q2の各エミッタEを結ぶ配線(1)は
抵抗rを有し、この配線(1)に他の系からの電流も含
め、アース電流IQが流れると、この抵抗rの両端に電
圧降下△V−rxlaが生じる。この時、基準電流IR
と定電流10との比は次式で表わされる。The aluminum wiring (1) for connection has a finite resistance value,
It generally has a sheet resistance of about 50 mΩ. Therefore, the wiring (1) connecting the emitters E of transistors W+ and Q2 has a resistance r, and when the earth current IQ flows through this wiring (1), including current from other systems, this resistance r A voltage drop ΔV-rxla occurs across both ends. At this time, the reference current IR
The ratio between the constant current 10 and the constant current 10 is expressed by the following equation.
IO/1R−exP(轟Δv)(1)
但し、qは電子の電荷、Kはボルツマン定数、Tは絶対
温度である。IO/1R-exP (Todoroki Δv) (1) where q is the electron charge, K is Boltzmann's constant, and T is the absolute temperature.
ココテ、△V −2mVの時”Ipt−1,08となり
、わずか2mV (r−100mΩとしテIG−20m
A) (D 電圧降下jcよって8%もの誤差が生じ、
定電流弔−性゛に及ぼす影響は太きい。特にアース電流
1oに交流成分が含まれると、交流的な電流変化により
上記電圧降下△Vが生じ、該電圧降下ΔVがトランジス
タ<22で増幅され、出力に大きな誤差信号が生じてし
まうという弊害があった。When △V is -2mV, "Ipt-1,08" is obtained, which is only 2mV (r-100mΩ, and IG-20m
A) (D Voltage drop jc causes an error of 8%,
The effect on constant current resistance is significant. In particular, if the earth current 1o contains an alternating current component, the above voltage drop △V will occur due to alternating current changes, and this voltage drop △V will be amplified by the transistor <22, resulting in a large error signal in the output. there were.
本発明は上記のような従来のものの欠点を除去するため
になされたもので、定電流回路を構成するベースおよび
エミッタがすべて共通接続されたトランジスタを3個以
上とし、上記エミッタを共通接続する配線に流れる回路
電流により生じるflj圧降下による各トランジスタの
電流誤差分がなくなるようIこ所要のトランジスタのコ
レクタ同志を接続することにより、5VRR竹性の改善
を1ヌすることができる定電流回路を提供することを目
的としている。The present invention has been made in order to eliminate the drawbacks of the conventional ones as described above, and includes a constant current circuit including three or more transistors whose bases and emitters are all connected in common, and a wiring that connects the emitters in common. By connecting the collectors of the required transistors to each other so as to eliminate the current error of each transistor due to the flj pressure drop caused by the circuit current flowing in the circuit, we provide a constant current circuit that can improve the VRR performance by 1. It is intended to.
以下、この発明の一実施例を図について説明する。An embodiment of the present invention will be described below with reference to the drawings.
第3図は本発明の一実施例による定電流回路を示す。図
において、Q+、 Qt、 Q3. Q、はベースおよ
O・エミッタが共通接続されたトランジスタであり、こ
のうちトランジスタQ1はダイオード接続されでいる。FIG. 3 shows a constant current circuit according to an embodiment of the present invention. In the figure, Q+, Qt, Q3. Q is a transistor whose base and O emitter are commonly connected, and among these transistors Q1 is diode-connected.
またrll r2. rHはそれぞれトランジスタ90
見21 Q31 Q4 のエミッタ間の配線が何する
抵抗、1(3はアース電流、I ni1基準重’1AL
−ICは定電流である1、第4μmは第3図の回路をI
C化した時の〕くターンを示し、図において、第2rA
と同一符号は同一のものを示す。Also rll r2. rH is each transistor 90
See 21 Q31 What resistance does the wiring between the emitters of Q4 have? 1 (3 is the ground current, I ni1 standard weight '1AL
-IC is a constant current 1, 4th μm is the circuit shown in Figure 3.
The second rA turn is shown in the figure.
The same symbol indicates the same thing.
木定電流回路では、トランジスタQ、−Q、をハjい、
アース電流IQにより生ずる電圧降下の一術太きいトラ
ンジスタQ4と一番少ないトランジスタQ1のコレクタ
同志を接続し、さらに上記電圧降下が2番目と3番目に
大きいトランジスタQ21Qa ノコレクタ同志を接続
し、上記寄生抵抗r1r r2. rHによる影響をお
互いにキャンセルするようにしている。In the tree constant current circuit, the transistors Q, -Q, are
The collectors of the transistor Q4, which has the largest voltage drop caused by the earth current IQ, and the transistor Q1, which has the smallest voltage drop, are connected together, and the collectors of the transistors Q21Qa, which have the second and third largest voltage drops, are connected, and the parasitic resistance r1r r2. The effects of rH are tried to cancel each other out.
ここで寄生抵抗’1+ ”2+ rjはアルミ配線(1
)の形状によりその大きさの比を正確に設定することが
できるので、上記抵抗r、、 r2. rHの比および
アース電流IGの値を選ぶことによって、定電流1cを
アース電流1aに影響されないように設定することがで
きる。Here, the parasitic resistance '1+ "2+ rj is the aluminum wiring (1
), the size ratio can be set accurately depending on the shape of the resistors r, , r2. By selecting the ratio of rH and the value of the earth current IG, the constant current 1c can be set so as not to be influenced by the earth current 1a.
本実施例は以上のように構成されており、従来のものよ
りもトランジスタの数は増えるが、トランジスタはIC
において最も安価、即ち面積が小さい部品であり、この
ため全体のコストアップに及ぼす影魯の割合は少ない。This embodiment is configured as described above, and although the number of transistors is increased compared to the conventional one, the transistors are integrated into ICs.
It is the cheapest component, that is, it has the smallest area, and therefore has a small impact on the overall cost increase.
第5図は本発明の他の実施例による定・電流回路を示し
、トランジスタQt、Qs 、)ランジスタQl、Q4
をそれぞれマルチエミッタトランジスタで構成した例で
あり、この場合、トランジスタQ2. Q、とトランジ
スタQl、 Q、はそれぞれコレクタ、ベースを共通に
することが市米るため、同一ベースの中に2つのエミッ
タを構成することができる。このため第3図の実施例に
比較【7てトランジスタ面積を小さくし、且つマツチン
グ%1」゛を改善することができる。FIG. 5 shows a constant current circuit according to another embodiment of the present invention, in which transistors Qt, Qs,) transistors Ql, Q4
In this example, transistors Q2 . Since it is common practice to have a common collector and base for transistors Q and transistors Ql and Q, respectively, two emitters can be formed in the same base. Therefore, compared to the embodiment shown in FIG. 3, the transistor area can be reduced by 7, and the matching %1 can be improved.
なお1本発明による定電流回路はPNP)ランジスタに
より構成することも出来、上+Tc’:実施例と同様に
電源電流によるS V RRを改善することができる。Note that the constant current circuit according to the present invention can also be constituted by a PNP transistor, and the S V RR due to the power supply current can be improved as in the above +Tc' embodiment.
また、定電流回路を子細以上の多数のトランジスタ接カ
バ、・により構成してもよく、この場合さらによい効果
を得ることができる。Further, the constant current circuit may be constructed of a large number of transistor contacts, which are more than thin.In this case, even better effects can be obtained.
以上のように本発明によれば、定電流回路を構成するベ
ースおよびエミッタが共通接続されたトランジスタを3
個以上とし、上記エミッタ間の配線に流れる回路電流に
より生じる電圧降下による各トランジスタの電流誤差分
がなくなるように所要のトランジスタのコレクタ同志を
接続したので、特にICにおける定電流源の場合、その
5VRR%性を著しく改善できる効果がある。As described above, according to the present invention, three transistors constituting a constant current circuit whose bases and emitters are commonly connected are
In particular, in the case of a constant current source in an IC, the 5VRR It has the effect of significantly improving the % property.
第1図は従来の定電流回路の回路図、第2図は第1図の
回路をic化した時のパターン図、第3図は本発明の一
実施例による定電流回路の回路図。
第4図は第3図の回路をIC化した時のパターン図%第
5図は本発明の他の実施例による定電流回路をIC化し
た時のパターン図である。
Q、 −Q、・・・トンンジスタ、(1)・・・アルミ
配線。
なお図中同一符号は同−又は相当部分を示す。
代理人 葛 野 信 −
手続補正書(自発)
特許庁長官殿
1、事件の表示 特願昭57−188558
号2、発明の名称
定電流回路
3、補正をする者
事件との関係 特許出願人
住 所 東f、C都千代ITI区丸の内二丁1
12番3号名 称((iol) 三菱゛市機株式会
社代表者片由仁八部
5、補正の対象
明細書の発明の詳細な説明の欄
6、補正の内容FIG. 1 is a circuit diagram of a conventional constant current circuit, FIG. 2 is a pattern diagram when the circuit of FIG. 1 is integrated into an IC, and FIG. 3 is a circuit diagram of a constant current circuit according to an embodiment of the present invention. FIG. 4 is a pattern diagram when the circuit of FIG. 3 is implemented as an IC. FIG. 5 is a pattern diagram when the constant current circuit according to another embodiment of the present invention is implemented as an IC. Q, -Q,... Tongister, (1)... Aluminum wiring. Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Makoto Kuzuno - Procedural amendment (spontaneous) Commissioner of the Japan Patent Office 1, Indication of case Patent application 188558/1982
No. 2, Name of the invention Constant current circuit 3, Relationship with the case of the person making the amendment Patent applicant address East F, 2-1 Marunouchi, Chiyo ITI-ku, C
No. 12 No. 3 Name ((iol) Mitsubishi City Machinery Co., Ltd. Representative Katayuni Part 5, Detailed explanation of the invention in the specification subject to amendment 6, Contents of the amendment
Claims (1)
エミッタがすべて共通接続された3個以上のトランジス
タを備え、上記エミッタを共通接続する配線に流れる回
路電流により上記トランジスタの各エミッタ間に生じる
電圧降下による上記各トランジス−タの電流誤差分がな
くなるように上記所要のトランジスタのコレクタ同志を
接゛続したことを特徴とする定電流回路。(1) Comprising three or more transistors, at least one of which is diode-connected, and whose bases and emitters are all commonly connected, and a voltage drop that occurs between the emitters of the transistors due to a circuit current flowing through the wiring that commonly connects the emitters. A constant current circuit characterized in that the collectors of the required transistors are connected to each other so that the current error of each of the transistors due to the current error is eliminated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18855882A JPS5977529A (en) | 1982-10-25 | 1982-10-25 | Constant-current circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18855882A JPS5977529A (en) | 1982-10-25 | 1982-10-25 | Constant-current circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5977529A true JPS5977529A (en) | 1984-05-04 |
JPH0117170B2 JPH0117170B2 (en) | 1989-03-29 |
Family
ID=16225790
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18855882A Granted JPS5977529A (en) | 1982-10-25 | 1982-10-25 | Constant-current circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5977529A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60222168A (en) * | 1984-04-19 | 1985-11-06 | Canon Inc | Film forming device |
EP3979036A1 (en) * | 2020-09-30 | 2022-04-06 | Ams Ag | Current mirror arrangement |
-
1982
- 1982-10-25 JP JP18855882A patent/JPS5977529A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60222168A (en) * | 1984-04-19 | 1985-11-06 | Canon Inc | Film forming device |
EP3979036A1 (en) * | 2020-09-30 | 2022-04-06 | Ams Ag | Current mirror arrangement |
WO2022069131A1 (en) * | 2020-09-30 | 2022-04-07 | Ams Ag | Current mirror arrangement |
Also Published As
Publication number | Publication date |
---|---|
JPH0117170B2 (en) | 1989-03-29 |
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