JPS597483U - LCD matrix panel drive device - Google Patents
LCD matrix panel drive deviceInfo
- Publication number
- JPS597483U JPS597483U JP10288482U JP10288482U JPS597483U JP S597483 U JPS597483 U JP S597483U JP 10288482 U JP10288482 U JP 10288482U JP 10288482 U JP10288482 U JP 10288482U JP S597483 U JPS597483 U JP S597483U
- Authority
- JP
- Japan
- Prior art keywords
- electrode
- matrix panel
- liquid crystal
- source
- drive device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、液晶マトリクスパネルの一般的構成を示す分
解斜視図、第2図はその一部回路図、第°3図は従来例
正面図、第4図は第2図I−7’断面図、第5図は本考
案−実施例正面図である。
1・・・前面ガラス基板、2・・・共通電極、3・・・
液晶層、5・・・背面ガラス基板、6・・・表示電極、
7・・・絶a層、10・・・テスト電極、A・・・アモ
ルファスシリコン層。Fig. 1 is an exploded perspective view showing the general configuration of a liquid crystal matrix panel, Fig. 2 is a partial circuit diagram thereof, Fig. 3 is a front view of a conventional example, and Fig. 4 is a cross section along I-7' in Fig. 2. FIG. 5 is a front view of an embodiment of the present invention. 1... Front glass substrate, 2... Common electrode, 3...
Liquid crystal layer, 5... Back glass substrate, 6... Display electrode,
7... Absolute a layer, 10... Test electrode, A... Amorphous silicon layer.
Claims (1)
ゲート及びドレインに接続してなりドレイン及びソース
間にアモルファスシリコン層が形成されてなるFETと
、該FETのソースに接続された表示電極と、該表示電
極に相対して配置された共通電極と、該共通電極と上記
表示電極間に充填された液晶とを備えてなる液晶マトリ
クスパネルにおいて、上記ソースはアモルファスシリコ
ン層の存在しない上記絶縁層領域であってかつ直下にゲ
ートが存在しない領域に延在されたテスト電極を備えた
ことを特徴とする液晶マトリクスパネル駆動装置。An FET in which a scanning electrode and a signal electrode that are perpendicular to each other are connected to the gate and the drain, respectively, through an insulating layer, and an amorphous silicon layer is formed between the drain and the source, and a display electrode connected to the source of the FET, In a liquid crystal matrix panel comprising a common electrode disposed opposite to the display electrode, and liquid crystal filled between the common electrode and the display electrode, the source is located in the insulating layer region where no amorphous silicon layer is present. What is claimed is: 1. A liquid crystal matrix panel driving device comprising a test electrode extending in a region where no gate exists directly below.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10288482U JPS597483U (en) | 1982-07-06 | 1982-07-06 | LCD matrix panel drive device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10288482U JPS597483U (en) | 1982-07-06 | 1982-07-06 | LCD matrix panel drive device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS597483U true JPS597483U (en) | 1984-01-18 |
Family
ID=30242292
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10288482U Pending JPS597483U (en) | 1982-07-06 | 1982-07-06 | LCD matrix panel drive device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS597483U (en) |
-
1982
- 1982-07-06 JP JP10288482U patent/JPS597483U/en active Pending
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