JPS5973857U - Distribution line carrier signal receiving device - Google Patents
Distribution line carrier signal receiving deviceInfo
- Publication number
- JPS5973857U JPS5973857U JP17122382U JP17122382U JPS5973857U JP S5973857 U JPS5973857 U JP S5973857U JP 17122382 U JP17122382 U JP 17122382U JP 17122382 U JP17122382 U JP 17122382U JP S5973857 U JPS5973857 U JP S5973857U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- receiving device
- distribution line
- signal receiving
- carrier signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Remote Monitoring And Control Of Power-Distribution Networks (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は配電線搬送信号受信装置が適用される一般的な
配電系統図、第２図は従来の配電線搬送信号受信装置を
示すブロック線図、第３図ばこの考案に係る配電線搬送
信号受信装置の一実施例を示すブロック線図、第４図ａ
”−ｄは第３図の各構成回路の出力波形図である。
図において、各図中同一部分には同一符号を付しており
、３は高圧配電線、５は低圧配電線、６は送信装置、７
はフィーダ変流器、８は配電線搬送信号受信装置、９は
補助変流器、１０は第１のフィルタ回路、１１は第１の
増幅回路、１２はクランプ回路、１４はリミッタ回路、
１５は復調回路、１６はデータ処理回路、１７は第２の
フィルタ回路、１８は第２の増幅回路、１９は整流回路
、２０は積分回路である。Fig. 1 is a general distribution system diagram to which a distribution line carrier signal receiving device is applied, Fig. 2 is a block diagram showing a conventional distribution line carrier signal receiving device, and Fig. 3 is a distribution line carrier according to this invention. A block diagram showing an embodiment of the signal receiving device, FIG. 4a
"-d is an output waveform diagram of each component circuit in FIG. transmitting device, 7
is a feeder current transformer, 8 is a distribution line carrier signal receiving device, 9 is an auxiliary current transformer, 10 is a first filter circuit, 11 is a first amplifier circuit, 12 is a clamp circuit, 14 is a limiter circuit,
15 is a demodulation circuit, 16 is a data processing circuit, 17 is a second filter circuit, 18 is a second amplifier circuit, 19 is a rectifier circuit, and 20 is an integration circuit.
Claims (2)
号に対応する信号周波数帯域を有する第１のフィルタ回
路、前記信号周波数帯域の近傍の周波数帯域を有する第
２めフィルタ回路、前記第２のフィルタ回路の出力信号
をクランプレベルとして前記第１のフィルタ回路の出力
信号をクランプするクランプ回路、及び前記クランプ回
路の出力信号を復調する復調回路を備えた配電線搬送信
号受信装置。(1) a first filter circuit having a signal frequency band corresponding to a signal from a transmitting device superimposed on the commercial frequency of the distribution line; a second filter circuit having a frequency band near the signal frequency band; A distribution line carrier signal receiving device comprising: a clamp circuit that clamps the output signal of the first filter circuit using the output signal of the second filter circuit as a clamp level; and a demodulation circuit that demodulates the output signal of the clamp circuit.
流され、積分回路で平滑された後、クランプレベルとし
てクランプ回路に印加される実用新案登録請求の範囲第
（１）項記載の配電線搬送信号受信装置。(2) The output signal of the second filter circuit is rectified by a rectifying circuit, smoothed by an integrating circuit, and then applied to the clamp circuit as a clamp level. Wire carrier signal receiving device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17122382U JPS5973857U (en) | 1982-11-10 | 1982-11-10 | Distribution line carrier signal receiving device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17122382U JPS5973857U (en) | 1982-11-10 | 1982-11-10 | Distribution line carrier signal receiving device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5973857U true JPS5973857U (en) | 1984-05-19 |
Family
ID=30373563
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17122382U Pending JPS5973857U (en) | 1982-11-10 | 1982-11-10 | Distribution line carrier signal receiving device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5973857U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007063584A1 (en) * | 2005-11-30 | 2007-06-07 | Fujitsu Limited | Demodulator circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5019309A (en) * | 1973-04-10 | 1975-02-28 |
-
1982
- 1982-11-10 JP JP17122382U patent/JPS5973857U/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5019309A (en) * | 1973-04-10 | 1975-02-28 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007063584A1 (en) * | 2005-11-30 | 2007-06-07 | Fujitsu Limited | Demodulator circuit |
| JPWO2007063584A1 (en) * | 2005-11-30 | 2009-05-07 | 富士通株式会社 | Demodulator circuit |
| US7855596B2 (en) | 2005-11-30 | 2010-12-21 | Fujitsu Limited | Demodulation circuit |
| JP4778524B2 (en) * | 2005-11-30 | 2011-09-21 | 富士通株式会社 | Demodulator circuit |
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