JPS59144952U - level detection circuit - Google Patents
level detection circuitInfo
- Publication number
- JPS59144952U JPS59144952U JP3895583U JP3895583U JPS59144952U JP S59144952 U JPS59144952 U JP S59144952U JP 3895583 U JP3895583 U JP 3895583U JP 3895583 U JP3895583 U JP 3895583U JP S59144952 U JPS59144952 U JP S59144952U
- Authority
- JP
- Japan
- Prior art keywords
- level detection
- circuit
- detection circuit
- signal
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例のブロック図、第２図は本考案の一実施
例を示すブロック図、第３図は第２図の周波数変換回路
のブロック図、第４図は第１図および第２図の各部波形
を同一時間軸上に示した図である。
図において、１・・・・・・信号増幅回路、２・・・・
・・整流回路、３・・・・・・平滑回路、４・・・・・
・比較回路、５゜１５〜５３・・・・・・周波数変換回
路、６・・・・・・分岐回路、７・・・・・・増幅器、
８・・・・・・二重平衡変調回路。FIG. 1 is a block diagram of the conventional example, FIG. 2 is a block diagram showing an embodiment of the present invention, FIG. 3 is a block diagram of the frequency conversion circuit of FIG. 2, and FIG. 4 is a block diagram of the frequency conversion circuit of FIG. FIG. 3 is a diagram showing waveforms of various parts in the figure on the same time axis. In the figure, 1...signal amplification circuit, 2...
... Rectifier circuit, 3 ... Smoothing circuit, 4 ...
・Comparison circuit, 5゜15-53...Frequency conversion circuit, 6...Branch circuit, 7...Amplifier,
8...Double balanced modulation circuit.
Claims (1)
波数変換回路と、前記周波数変換信号を整流・平滑する
整流・平滑回路と、前記整流・平滑されれた信号を所定
のレベル値と比較してレベル検出信号を出力する比較回
路とから構成されたことを特徴とするレベル検出回路。a frequency conversion circuit that converts the frequency of the detected signal by 2n times (n: integer); a rectification/smoothing circuit that rectifies and smoothes the frequency-converted signal; and a rectification/smoothing circuit that converts the rectified/smoothed signal to a predetermined level value. A level detection circuit comprising: a comparison circuit that compares and outputs a level detection signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3895583U JPS59144952U (en) | 1983-03-17 | 1983-03-17 | level detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3895583U JPS59144952U (en) | 1983-03-17 | 1983-03-17 | level detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59144952U true JPS59144952U (en) | 1984-09-27 |
Family
ID=30169616
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3895583U Pending JPS59144952U (en) | 1983-03-17 | 1983-03-17 | level detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59144952U (en) |
-
1983
- 1983-03-17 JP JP3895583U patent/JPS59144952U/en active Pending
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