JPS5972788A - Embedded type semiconductor laser - Google Patents
Embedded type semiconductor laserInfo
- Publication number
- JPS5972788A JPS5972788A JP18322282A JP18322282A JPS5972788A JP S5972788 A JPS5972788 A JP S5972788A JP 18322282 A JP18322282 A JP 18322282A JP 18322282 A JP18322282 A JP 18322282A JP S5972788 A JPS5972788 A JP S5972788A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- laminated
- type
- type inp
- mesa stripe
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/227—Buried mesa structure ; Striped active layer
- H01S5/2275—Buried mesa structure ; Striped active layer mesa created by etching
- H01S5/2277—Buried mesa structure ; Striped active layer mesa created by etching double channel planar buried heterostructure [DCPBH] laser
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は活性層を迂回して流れる漏れ電流を大幅に減少
させた埋め込み形半導体レーザに関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a buried semiconductor laser in which leakage current flowing around an active layer is significantly reduced.
幅2μm程度の活性層光導波路領域を活性層よシもバン
ドギャップエネルギーが大きく屈折率が小さい半導体層
で囲繞する構造の埋め込み形半導体レーザは発振閾値が
5〜20mA程度と低く、高出力まで安定な基本横モー
ド発振が可能でありまた高温CW動作が可能である等の
すぐれた性能を有する。A buried semiconductor laser has a structure in which an active layer optical waveguide region with a width of about 2 μm is surrounded by a semiconductor layer with a large band gap energy and a small refractive index. It has excellent performance such as being capable of fundamental transverse mode oscillation and high-temperature CW operation.
埋め込み形半導体レーザの作製において、とれらの高性
能を実現するためには、狭い活性層光導波路領域に効率
良く注入電流を集中させることが重要な課題である。一
般に埋め込み形半導体レーザでは活性層光導波路領域に
形成されるrn接合は、周囲のバンドギャップエネルギ
ーの大きな半導体層で形成されるrn接合に連続してお
沙、これら2種類のPn接合に拡散電位の差があるため
、電流は活性層光導波路領域のpn接合に集中して流れ
発光再結合を生じる。従って活性層光導波路領域を囲繞
する半導体層が形成するμn接合が良好であれば活性層
光導波路領域へ効率良〈電流を集中させることができる
。しかしながらこのpn接合は、一般に、メサエッチン
グにより活性層光導波路領域を含むメサストライプを形
成したあとの、エツチングによシ露出された半導体層の
上に埋め込み成長を行い、この半導体層と反対導電形の
半導体層を積層させることにより形)成されている。メ
サエッチングで露出した半導体表面の凹凸、汚れ、又は
、埋め込み成長を行う前に、高温雰囲気中に保持される
ことによる結晶表面の熱ダメージ等のためこのエピタキ
シャル層界面は必ずしも良好ではなく界面準位が生じ易
い。この界面準位を介しての注入キャリアの再結合は活
性層光導波路領域を迂回して流れる漏洩電流を生じさせ
埋め込み形半導体レーザの発振閾値を上昇させる。光出
力が注入電流の増加に対し飽和傾向を示等の悪影響を及
ぼし、また素子作製において良品の収率歩留まりを低下
させていた。In the fabrication of buried semiconductor lasers, in order to achieve high performance, it is important to efficiently concentrate the injection current in the narrow active layer optical waveguide region. In general, in a buried semiconductor laser, the rn junction formed in the active layer optical waveguide region is continuous with the rn junction formed in the surrounding semiconductor layer with large bandgap energy, and the diffusion potential between these two types of Pn junctions exists. Because of the difference in the current, the current flows concentratedly at the pn junction in the active layer optical waveguide region, causing radiative recombination. Therefore, if the .mu.n junction formed by the semiconductor layers surrounding the active layer optical waveguide region is good, current can be efficiently concentrated in the active layer optical waveguide region. However, this pn junction is generally formed by mesa etching to form a mesa stripe including the active layer optical waveguide region, and then buried and grown on the semiconductor layer exposed by the etching. It is formed by stacking semiconductor layers. This epitaxial layer interface is not necessarily good due to unevenness and dirt on the semiconductor surface exposed by mesa etching, or thermal damage to the crystal surface due to being held in a high temperature atmosphere before buried growth, and the interface state is likely to occur. Recombination of the injected carriers via this interface state causes a leakage current that flows around the active layer optical waveguide region, increasing the oscillation threshold of the buried semiconductor laser. The optical output tends to be saturated with an increase in the injection current, which has an adverse effect, and the yield of good products during device fabrication has been reduced.
従って本発明の目的は活性層光導波路を囲繞する半導体
が形成するpn接合を良好にすることにより、艮好な素
子特性が得られ、また素子製作歩留まりを向上できる埋
め込み形半導体レーザを提供することにある。Therefore, an object of the present invention is to provide a buried semiconductor laser which can obtain excellent device characteristics and improve the device manufacturing yield by improving the pn junction formed by the semiconductor surrounding the active layer optical waveguide. It is in.
本発明によれば半導体基板の上に第1導電形のバッファ
層と活性層と第2導電形のクラッド層の少くとも3層が
順次積層されたメサストライプを備え、最初に積層する
第2導電形の埋め込み半導体層を少くとも含む複数の半
導体層で前記メサストライプを囲繞する構造の埋め込み
形半導体レーザにおいて、前記第2導電形の埋め込み半
導体層中(又は第1導電形のバッファ層中)の不純物が
前記第1導電形のバッファ層(又は第2導電形の埋め込
み半導体層)に拡散されて形成される1)n接合部が、
前記第2導電形の埋め込み半導体層と前記第1導電形の
バッファ層とのエピタキシャル成長界面から分離されて
いることを特徴とする埋め込み形半導体レーザ等が得ら
れる。According to the present invention, a mesa stripe is provided on a semiconductor substrate in which at least three layers of a buffer layer of a first conductivity type, an active layer, and a cladding layer of a second conductivity type are sequentially laminated, and a mesa stripe is provided on a semiconductor substrate, and a mesa stripe is provided on a semiconductor substrate, and a mesa stripe is provided in which at least three layers of a buffer layer of a first conductivity type, an active layer, and a cladding layer of a second conductivity type are laminated in sequence. In the buried semiconductor laser having a structure in which the mesa stripe is surrounded by a plurality of semiconductor layers including at least a buried semiconductor layer of the shape of 1) an n-junction formed by diffusing impurities into the buffer layer of the first conductivity type (or the buried semiconductor layer of the second conductivity type);
A buried semiconductor laser or the like is obtained, which is separated from the epitaxial growth interface between the buried semiconductor layer of the second conductivity type and the buffer layer of the first conductivity type.
実施例の前に本発明の基本概念を簡単に説明すると、活
性層光導波路領域を囲繞する半導体層が形成するpn接
合を良好にするために、埋め込み成長の際に成長層の不
純物濃度を比較的高くすることによりエピタキシャル成
長界面から成長層中の不純物を固相から同相へと拡散を
生じさせて、Pn接合面をエピタキシャル成長界面から
遠ざけて形成することによシエビタキシャル成長界面に
生じ易い界面準位の悪影響を小さくしようとするもので
ある。このような固相から同相への拡散は、例えば■−
V族化合物半導体においては、Zn等の拡散係数の大き
い不純物を用いることにより容易に生じさせることがで
きる。Before explaining the examples, the basic concept of the present invention will be briefly explained. In order to improve the pn junction formed by the semiconductor layer surrounding the active layer optical waveguide region, the impurity concentration of the grown layer is compared during buried growth. By increasing the target height, impurities in the growth layer are diffused from the epitaxial growth interface from the solid phase to the same phase, and by forming the Pn junction away from the epitaxial growth interface, the interface quasi that tends to occur at the epitaxial growth interface is reduced. The aim is to minimize the negative effects of Such diffusion from the solid phase to the same phase is, for example, ■−
In group V compound semiconductors, this can be easily caused by using an impurity with a large diffusion coefficient such as Zn.
次に図面を用いて本発明の詳細な説明する。Next, the present invention will be explained in detail using the drawings.
第1図に本発明の第1の実施例を示す埋め込み形半導体
レーザの作製法及び断面構造図を示す。FIG. 1 shows a manufacturing method and a cross-sectional structural diagram of a buried semiconductor laser according to a first embodiment of the present invention.
第1図(a)は第1回目のLPE成長過程で形成された
、面方位(001)のn形InP基板1(不純物濃度2
X 10”cm−” )の上に、2 X 101?α−
3と比較的不純物濃度を低くしたn形InPバッファ層
2(膜厚3μm)とInPに格子整合のとれた発光波長
にして1.3μmのバンドギヤ、プエネルギーを有する
InGaAsp+活性層3(膜厚0.15μm 、ノン
ドープ)、P形不純物としてCdを用いた不純物濃度I
X 10”m−3のr形InPクラッド層4(膜厚3
μm)およびInPに格子整合のとれた発光波長にして
、1.2μm組成のp形InGaAsP電極形成層5(
膜厚0.6μm。FIG. 1(a) shows an n-type InP substrate 1 (with an impurity concentration of 2
x 10"cm-") on top of 2 x 101? α−
3 and a relatively low impurity concentration n-type InP buffer layer 2 (film thickness 3 μm) and InGaAsp+ active layer 3 (film thickness 0 .15 μm, non-doped), impurity concentration I using Cd as the P-type impurity
x 10”m-3 r-type InP cladding layer 4 (thickness 3
The p-type InGaAsP electrode formation layer 5 (
Film thickness: 0.6 μm.
不純物濃度2 X 10”tm−” )の4層を積層さ
せた多層膜構造ウェハである。次に第1図(b)に示す
様に通常のフォトリングラフィの手法によ!0<110
)方向に平行に幅5μmのSin、膜ストライプ5oを
形成したあとBr−メタノールのエツチング液を用いて
深さ約4μmとn形InPバッファ層に到達するまでメ
サエッチングを行ない逆三角形の形状のメサストライプ
20を形成する。第1図(c)は、第2回目のLPE成
長後素子化した半導体レーザの断面図である。第2回目
のLPE成長過程では、メサストライプ20の上にSt
O,膜50を残したまま最初に2形不純物としてZnを
用いたp形InP電流ブロック層6を約1μmの厚さで
積層する。不純物濃度を2X 10”cm−”と高くす
るとLPE成長中KP形InP電流ブロック層6からZ
nが拡散し、不純物濃度の低いn形InPバッファ層2
の表面はP形に反転される。This is a multilayer film structure wafer in which four layers with an impurity concentration of 2×10"tm-" are laminated. Next, as shown in Figure 1(b), use the normal photolithography method! 0<110
After forming a Sin film stripe 5o with a width of 5 μm parallel to the ) direction, mesa etching is performed using a Br-methanol etching solution to a depth of about 4 μm and reaching the n-type InP buffer layer to form an inverted triangular mesa. Form stripes 20. FIG. 1(c) is a cross-sectional view of a semiconductor laser device formed after the second LPE growth. In the second LPE growth process, St
First, a p-type InP current blocking layer 6 using Zn as a type 2 impurity is laminated to a thickness of about 1 μm while leaving the O2 film 50 intact. When the impurity concentration is increased to 2X 10"cm-", the KP-type InP current blocking layer 6 to Z
n-type InP buffer layer 2 with low impurity concentration and n diffusion
The surface of is inverted into a P shape.
従ってInPのpn接合30はエピタキシャル成長界面
31から0.3μm程度離れて形成される。次にn形I
nP電流閉じ込めN13(キャリアm、度5 X 10
I7tnl−3)を全体を埋め込む形状で株層する。第
2回目のLPE成長後、Sin、膜ストライプ50を剥
離する。Therefore, the InP pn junction 30 is formed at a distance of about 0.3 μm from the epitaxial growth interface 31. Next, n-type I
nP current confinement N13 (carrier m, degree 5 x 10
I7tnl-3) was layered in such a way that it was completely embedded. After the second LPE growth, the Sin film stripe 50 is peeled off.
P側型イ返60は、表面に5i02膜51を形成したあ
とμ形TnGaAsP電極形成層5の上シて窓をあけ0
.5μmの深さでZn拡1抄層40を形成し、表面典嵐
を制くした後にAu−Zn系の材料を周込て形成する。The P-side type mirror 60 is formed by forming a 5i02 film 51 on the surface and then opening a window on the μ-type TnGaAsP electrode forming layer 5.
.. A Zn expansion layer 40 is formed at a depth of 5 μm, and after controlling the surface diffusion, an Au-Zn material is formed around it.
n側電極61はAu−Ge−Ni系の材料を用いて形成
する。The n-side electrode 61 is formed using an Au-Ge-Ni based material.
この構造では第2回]」のLPE成長でr形InP電流
ブロック層31が積層されるまで高温雰囲気中に曝され
ているn形1nPクラッド層2の表面3Jから、InG
aAsP活性層光導波路領域301と繋がるInPのp
n接合30が離れて形成される。6Lりてp側電極60
を正、n側電極61を負とする順方向バイアス電圧を印
加するとInGaAsP活1生層光導波路領域301の
InGaAsPのPn接合とInPのrn接合30の拡
散1「位の差が約400meVと高く、またInPの?
n接合30において界面準位を介してキャリアの111
結合が生じる様な電流通路がないだめ注入電流は効率良
(InGaAsP活性層光導波路領域301に集中して
流れる。発振閾値電流値は室温で15から20m1.と
小さく、注入電流−光出力特性における微分量子効率も
60〜70%と高い値を示した。また0、100m程度
の抵抗率を有すると形InP電流ブロック層の膜厚が1
μmと薄いためr形InPクラッド層4からP形InP
電流ブロック層6へ拡がって流れる電流に対する抵抗が
高く、発振夙後更にバイアス電圧を増加させた場合でも
InPのPn接合30を通じて流れる電流がほとんど増
加しないため、光出力は500 mA程度以上のパルス
注入電流量までほぼ直線的に増大し100 mW以上の
片側パルス光出力が得られた。温度特性も良好でI t
hd−exp (π)で表現される特性温度T0は75
に程度、ダイアモンドヒートシンクにr側電極60を下
方にして組立てた場合の最高CW湿温度110℃と高い
値を示した。また成長したウエノ・内での特性のばらつ
きが少なく良品収率は70チと良好な値が得られた。In this structure, the InP layer is grown from the surface 3J of the n-type 1nP cladding layer 2, which is exposed to a high temperature atmosphere until the r-type InP current blocking layer 31 is laminated by LPE growth.
InP p connected to aAsP active layer optical waveguide region 301
N-junctions 30 are formed separately. 6L p-side electrode 60
When a forward bias voltage is applied with positive on the n-side electrode 61 and negative on the n-side electrode 61, the difference in diffusion potential between the Pn junction of InGaAsP and the rn junction 30 of InP in the InGaAsP active layer optical waveguide region 301 is as high as about 400 meV. , also InP?
111 of carriers via the interface state in the n-junction 30
Since there is no current path that would cause coupling, the injected current is efficient (concentrated in the InGaAsP active layer optical waveguide region 301).The oscillation threshold current value is as small as 15 to 20 m1 at room temperature, and The differential quantum efficiency also showed a high value of 60 to 70%.Also, when the resistivity is about 0.100 m, the film thickness of the InP current blocking layer is 1.
Because it is as thin as μm, the r-type InP cladding layer 4 is replaced with p-type InP.
The resistance to the current spreading to the current blocking layer 6 is high, and even if the bias voltage is further increased after oscillation, the current flowing through the InP Pn junction 30 hardly increases, so the optical output is pulse injection of about 500 mA or more. The current amount increased almost linearly, and a one-sided pulsed light output of 100 mW or more was obtained. It also has good temperature characteristics.
The characteristic temperature T0 expressed by hd-exp (π) is 75
The maximum CW humidity temperature when assembled on a diamond heat sink with the r-side electrode 60 facing downward was as high as 110°C. In addition, there was little variation in properties within the grown Ueno film, and a good yield of 70 pieces was obtained.
第2図に本発明の第2の実施例の作製法及びその断面図
を示す。第1回目のLPE成長過程では、第1の実施例
と同様に、面方位(001)のn形InP基板1に不純
物濃度が2 X 10”cm−”と低いn形InPバッ
ファ層2(膜厚3μm)と、発光波長1.3μm1lh
成のInGaAsP活性層3(膜厚0.15μm、ノン
ドープ)、および不純物として、Cdを用いたP形In
Pクラッド層4(不純物濃度I X 10”cm−”
、膜厚1μm)を順次積層させた多層膜構造ウニ/・を
作製する。これを第2図(&)に示す。次に第2図(b
)に示す様にフォトレジスト80をマスクとして、 <
110)に平行な2本の溝90.91を形成する。溝幅
は約7μm1深さは約2μmである。2本の溝90.9
1に挾まれて幅約2μmのメサストライプ20が形成さ
れる。フォトレジストマスクを用いBr−メタノール系
の溶液で工、チングを行うと、フォトレジストマスクの
内側への工、チング、所謂サイドエツチングが進行する
。このためメサストライプ20の側面は、上に向って次
第に細まった形状となる。フォトレジスト膜80を剥離
した後に第2回目のLPE成長を行う。第2図(C)は
LPE成長後、素子化した断面図である。最初にr形I
nP電流ブロック層8を積層する。平坦部での積層膜厚
を0.5μm程度jでおさえれば、中央のメサストライ
プ20付近では、メサ側面への成長が速いためメサ上部
へは積層しない。また、P形の不純物Znの濃度を2×
10I″cnT−”と高くしておけば、第1の実施例と
同様に、n形LnPバッファ層20表面がP形に反転さ
れ、InPのrn接合30は、エピタキシャル成長界面
31から0.3μm程離れて形成される。次にn形In
P電流閉じ込め層9(不純物:Te、lXl0”6n−
” )を、平坦部で同じく0.5μm程度の膜厚で積層
しメサストライプ20の上部には積層させない。FIG. 2 shows a manufacturing method and a sectional view of a second embodiment of the present invention. In the first LPE growth process, as in the first embodiment, an n-type InP buffer layer 2 (film) with a low impurity concentration of 2 x 10"cm-" is formed on an n-type InP substrate 1 with a plane orientation of (001). thickness 3μm) and emission wavelength 1.3μm1lh
InGaAsP active layer 3 (film thickness 0.15 μm, non-doped), and P-type InGaAsP active layer 3 using Cd as an impurity.
P cladding layer 4 (impurity concentration I x 10"cm-"
, a film thickness of 1 μm) are sequentially laminated to produce a multilayer film structure. This is shown in FIG. 2 (&). Next, Figure 2 (b
), using the photoresist 80 as a mask, <
Two grooves 90 and 91 parallel to 110) are formed. The groove width is about 7 μm and the depth is about 2 μm. Two grooves 90.9
A mesa stripe 20 having a width of about 2 μm is formed between the stripes 1 and 1 . When etching and etching are performed using a Br-methanol solution using a photoresist mask, the etching and etching progress to the inside of the photoresist mask, so-called side etching. Therefore, the side surface of the mesa stripe 20 has a shape that gradually tapers upward. After removing the photoresist film 80, a second LPE growth is performed. FIG. 2(C) is a cross-sectional view of the device after LPE growth. First r form I
An nP current blocking layer 8 is laminated. If the thickness of the laminated film in the flat part is kept to about 0.5 μm, the layer will not be laminated on the upper part of the mesa near the central mesa stripe 20 because the growth on the side surfaces of the mesa is fast. In addition, the concentration of P-type impurity Zn was increased by 2×
If the value is set as high as 10I"cnT-", the surface of the n-type LnP buffer layer 20 is inverted to P-type as in the first embodiment, and the InP rn junction 30 is approximately 0.3 μm from the epitaxial growth interface 31. formed apart. Next, n-type In
P current confinement layer 9 (impurities: Te, lXl0"6n-
”) is laminated with a film thickness of about 0.5 μm on the flat portion, and is not laminated on the upper part of the mesa stripe 20.
次にe形InP埋め込み層10(不純物Zn、7X1o
1″crn−3>を、平坦部で約2μmの厚さで積層す
ることによりメサストライプ20の上部をも含み全体を
埋め込んで成長させ、最後にP形InGaAsP電極形
成層11(発光波長にして1.2μm組成、不純物Zn
、不純物濃度5 X 10”crn−” )を平坦部
で約1μmの膜厚で積層させる。InGaAsPは(0
01)面内での成長速度が速いためメサ上部の凹部は児
全に埋められ表面は平坦になる。r側電極60にはAu
−Zn系電極材料を、n側電極61にはAu−Ge−N
t系電電極材料用いる。第2の実施例の特性も、メサス
トライプ20内のInGaAgP活性層光導波路佃域3
01に繋がるInPのpn接合30がエピタキシャル成
長界面31から離れているため、界面準位等の悪影響を
受けない。また平坦部はp”戸”接合となっているため
、10v程度の高い電圧を印加しないと電流が流れない
。従ってメサストライプ20の領域に電流が集中して流
れる。発振閾値は10〜20m1へ微分量子効率は60
〜70俤、片側当シ50mW以上の光出力が得られた。Next, e-type InP buried layer 10 (impurity Zn, 7X1o
1"crn-3> is deposited to a thickness of about 2 μm on the flat part, thereby filling the entire area including the upper part of the mesa stripe 20. Finally, the P-type InGaAsP electrode forming layer 11 (at the emission wavelength 1.2 μm composition, impurity Zn
, an impurity concentration of 5×10"crn-") are deposited to a thickness of approximately 1 μm on the flat portion. InGaAsP is (0
01) Since the in-plane growth rate is fast, the concave part at the top of the mesa is completely filled in and the surface becomes flat. The r-side electrode 60 is made of Au.
- Zn-based electrode material, and Au-Ge-N for the n-side electrode 61.
T-type electrode material is used. The characteristics of the second embodiment are also the same as those of the InGaAgP active layer optical waveguide region 3 in the mesa stripe 20.
Since the InP pn junction 30 connected to 01 is away from the epitaxial growth interface 31, it is not affected by the adverse effects of interface states and the like. Also, since the flat part is a p-type junction, current will not flow unless a high voltage of about 10V is applied. Therefore, current flows in a concentrated manner in the area of the mesa stripe 20. The oscillation threshold is 10-20m1 and the differential quantum efficiency is 60
~70 yen, and a light output of 50 mW or more per side was obtained.
特性温度T。は70〜90に、最大CW温度130℃と
いう艮好な結果が得られた。良品収率も良好であり約8
0チという値になった。またとの構造は、内部にn形I
nP電流閉じ込め層9を有しているため、片側電極60
を全面に形成すれば良いので、第1の実施例の場合の様
に、Znを選択的に拡散するといった必要がなく作製が
容易である。Characteristic temperature T. Excellent results were obtained with a maximum CW temperature of 70 to 90 and a maximum CW temperature of 130°C. The yield of good products is also good, about 8
The value became 0chi. Also, the structure is that there is an n-type I inside.
Since it has the nP current confinement layer 9, one side electrode 60
Since it is sufficient to form Zn on the entire surface, there is no need to selectively diffuse Zn as in the case of the first embodiment, and manufacturing is easy.
本発明は上記2種の実施例に限定されることはない。例
えばA/xGa1−xAm系の埋め込み形半導体レーザ
に応用することも可能である。The present invention is not limited to the above two types of embodiments. For example, it is also possible to apply it to an A/xGa1-xAm type buried semiconductor laser.
最後に本発明の特徴をまとめると、活性層光導波路佃域
のpn接合に繋がる埋め込み層のpn接合を良好にする
ことにより、活性層光導波仙域への電流集中度が艮〈な
って、発振閾値が低く、微分童子効率が高く、温度特性
の良好な埋め込み形半導体レーザが収率良く得られるこ
とでちる。Finally, to summarize the features of the present invention, by improving the p-n junction of the buried layer connected to the p-n junction of the active layer optical waveguide region, the degree of current concentration in the active layer optical waveguide region can be reduced. This is because a buried semiconductor laser with a low oscillation threshold, high differential Doji efficiency, and good temperature characteristics can be obtained in good yield.
第1図(a) 、 (b) 、 (c)は本発明の第1
の実施例の作製法及び断面構造図、第2図(a) 、
(b) 、 (e)は本発明の第2の実施例の作製法及
び断面構造図を示す。
図中1はn形InP基板、2はn形InPバッファ層、
3はInGaAsP活性層、301はInGaAsP活
性層光導波j18飴域、4は戸形InPクラッド層、5
および11は1形InGaAsP電極形成層、6および
8はP゛形InP@流プo、り層、7および9はn形I
nPjft流閉じ込め層、10はr形InP埋め込み層
、20はメサストライプ、30はInPの層接合、31
はエピタキシャル成長界面、4oはZn拡散領域、50
および51はSin、膜、6oは片側電極、61はn側
電極、8oは7オトレジス)II、9oおよヒ91は溝
部を示す。
代理人弁理士内旅
0
0FIGS. 1(a), (b), and (c) are the first embodiments of the present invention.
Manufacturing method and cross-sectional structure diagram of the example, FIG. 2(a),
(b) and (e) show the manufacturing method and cross-sectional structural diagram of the second embodiment of the present invention. In the figure, 1 is an n-type InP substrate, 2 is an n-type InP buffer layer,
3 is an InGaAsP active layer, 301 is an InGaAsP active layer optical waveguide j18 candy area, 4 is a door-shaped InP cladding layer, 5
and 11 are 1-type InGaAsP electrode formation layers, 6 and 8 are P-type InP@flow layers, and 7 and 9 are n-type I
nPjft flow confinement layer, 10 is an r-type InP buried layer, 20 is a mesa stripe, 30 is an InP layer junction, 31
is the epitaxial growth interface, 4o is the Zn diffusion region, 50
and 51 is a Sin film, 6o is an electrode on one side, 61 is an n-side electrode, 8o is a 7-hole resistor II, 9o and 91 are grooves. Representative patent attorney trip 0 0
Claims (1)
と第2導電形のクラ、ド層の少くとも3層が順次積層さ
れた多層膜メサストライプを備え、最初に積層する第2
導電形の埋め込み半導体層を少くとも含む複数の半導体
層で前記メサストライプを囲繞する構造の埋め込み形半
導体レーザにおいて、前記第2導電形の埋め込み半導体
層中(又は第1導電形のバ、ファ層中)の不純物が前記
第1導電形のバ、ファ層中(又は第2導電形の埋め込み
半導体層中)に拡散されて形成されるpn接合部が、前
記第2導電形の埋め込み半導体層と前記第1導電形のバ
ッファ層のエピタキシャル成長界面から分離されている
ことを特徴とする埋め込み形半導体レーザ。1. A multilayer mesa stripe is provided on a semiconductor substrate in which at least three layers, a buffer layer of a first conductivity type, an active layer, and a clad layer and a do layer of a second conductivity type, are laminated in sequence, and a second layer is laminated first.
In a buried semiconductor laser having a structure in which the mesa stripe is surrounded by a plurality of semiconductor layers including at least a buried semiconductor layer of a conductivity type, the buried semiconductor layer of the second conductivity type (or a buffer layer of a first conductivity type) A pn junction formed by diffusion of impurities into the first conductivity type B, F layer (or second conductivity type buried semiconductor layer) is connected to the second conductivity type buried semiconductor layer. A buried semiconductor laser, wherein the buried semiconductor laser is separated from an epitaxial growth interface of the buffer layer of the first conductivity type.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18322282A JPS5972788A (en) | 1982-10-19 | 1982-10-19 | Embedded type semiconductor laser |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18322282A JPS5972788A (en) | 1982-10-19 | 1982-10-19 | Embedded type semiconductor laser |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5972788A true JPS5972788A (en) | 1984-04-24 |
Family
ID=16131923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18322282A Pending JPS5972788A (en) | 1982-10-19 | 1982-10-19 | Embedded type semiconductor laser |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5972788A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5543355A (en) * | 1994-04-18 | 1996-08-06 | Nec Corporation | Method for manufacturing semiconductor laser device having current blocking layers |
-
1982
- 1982-10-19 JP JP18322282A patent/JPS5972788A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5543355A (en) * | 1994-04-18 | 1996-08-06 | Nec Corporation | Method for manufacturing semiconductor laser device having current blocking layers |
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