JPS5969791A - Color graphic display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a color graphic display device, and relates to an improvement in a means for creating figures whose interiors are sometimes filled with color.

Prior Art and Problems Filled figures (
In order to display a plane figure (hereinafter referred to as a plane figure), the area corresponding to the display figure in the screen RAM provided corresponding to each color must be set to 1".
You need to fill it in. Conventionally, this coloring and printing work has been performed only by software processing, which has the drawback of requiring a lot of time to create the figures.

OBJECTS OF THE INVENTION It is an object of the present invention to make it possible to create such planar figures in a short time.

According to the present invention, this object is achieved by writing only the outline of the figure into the screen RAM by software processing and filling it in by hardware processing. Examples will be described in detail below.

Embodiment of the Invention FIG. 1 is a block diagram showing an example of the hardware configuration of the color graphic display device of the present invention, in which 1 is a microcomputer, 2 and 3 are its data bus and address bus, 4R is a red screen RAM, Is 4G recording i? i
RAM for i, 4B is RAM for front screen, 5 is work RAM
, 6.7 is a parallel to serial converter, 8 is a CRI' controller, 9 is a solid flop, 10 is a serial
Parallel converter, 11 is an address decoder, 12 is a screen designation information latch circuit, 13 is a vertical synchronization signal synchronization circuit, 1
4 to 19. 21 is an input switching circuit, 20 is an OR circuit, 22
is a data driver, 26R, 23G, 2377 is a latch circuit, 24 is a color graphic display section,
25 is a RAM write valve generation circuit, and 26 is a gate circuit.

In the Wc1 diagram, red, a, W screen RAM4
R, 4G, and 4E are writable and readable memories that respectively store red colored figures, green colored figures, and blue colored figures to be displayed on the screen, and have storage areas corresponding to the display screen. The work RAM 5 is a slot 9 used for coloring work described later. It is a readable memory and has a storage area corresponding to the storage area of the screen RAM. Although this work RAM 5 is generally not used for display, it can also be used as a display RAM after the coloring work is completed. These R
AM 4R, 4G, 4B, and 5 can load information from the microcomputer 1 to any address,
In addition to being able to read, the CRI' controller 8
All areas are sequentially and synchronously accessed by the scanning address of RAM 4R, 4G, 4B,
The contents of 5 are repeatedly output to parallel/serial converters 6 and 7 at regular intervals. In addition, the output of the serial/parallel converter 1o is connected to the R for the screen via the input switching circuits 14 to 16.
It is added to the input of AM 4R, 4G, 4B,
These RAA(s) can also be changed to 1 by their input.

The screen designation information wrap circuit 12 is a screen designation information wrap circuit 11 that is replaced by the output of the serial/parallel converter 10.
It specifies AM, and includes latch circuit 2311 used when specifying RAM4R for red screen, shoe 1 to circuit 23G used when specifying RAM4G for recording section, and RAM4 for front screen.
It has a latch circuit 2377 used when specifying B. This wrap-time Jl18237i' + 23G-237
After being synchronized by a vertical synchronizing signal synchronizing circuit 13+2 to which a vertical synchronizing signal is applied from the CR1' controller 8, the output of No. 3 is input to the depth select terminal C8 of the screen 11AM4R, 4G, and 4B.

Screen RAM input to parallel/serial converter 6
The parallel bit outputs of 4R, 4G, and 4E and the soak RAII input to the parallel-to-serial converter 7 (the parallel bit outputs of 5 are both converted to serial bit outputs, and the output of the parallel-to-serial converter 6 is a Noritsu flop. 9
The output of the parallel-to-serial converter 7 is input to the set input terminal of , and the output of the parallel-to-serial converter 7 is input to its reset input terminal. This control flop 9 is also reset by the horizontal synchronizing signal inputted from the CRI' controller 8 via the MORE circuit 20. The output of the solid flop 9 is converted into parallel bit output by the serial/parallel converter 10, and fed back to the inputs of the screen RAMs 4R, 4G, and 4B as described above.

The color graphic display unit 24 has a parallel
The outputs of the serial converter 6 are input as a red video signal, a green video signal, and a portrait video signal, respectively, and a figure with a color determined by the combination is displayed on the display screen. The container 6 is shown as one block in the figure for convenience, but in reality it is red, green,
It has a number of parallel-to-serial converters corresponding to blue, and is configured so that the output thereof is switched to the display section 24 and the solid flop 9. Of course, a parallel/serial converter for coloring work may be provided in addition to the one for display.

FIG. 2 is a flowchart showing an example of software that implements a part of the plane figure creation function of the graphic display device of the present invention. For example, when displaying a figure with the shape shown in Figure 5 (A) in red, it is necessary to write "1" in the red screen RAM 4B area corresponding to the plane figure. The operation of the device of this embodiment will be explained.

Graphic data regarding the outline of a plane graphic is created or input separately and stored in the memory of the microcomputer 1. For example, when this device is used as a display device for a numerical system, graphic data is input as tool movement data. The microcomputer 1 first approximates all the graphic data with straight lines using a known technique such as arc/straight line conversion (step P2). This is shown in Figure 3 (A
) means converting the figure shown in Figure 6 CB>.

Next, the outline of the figure approximated by a straight line is stored in the red screen RAM 4.
In order to fill in the end point of the figure approximated by a straight line into the work RAM 5, first check in which quadrant the straight line exists, using the starting point of each straight line as the origin (step 7'3). ). This is possible by determining the signs of the coordinate values of the starting point and the ending point. Then, based on the results of this quadrant analysis and information regarding the filling direction that is input separately, the microcomputer 1 executes the following processing (steps P4 to P9).

(1) When the straight line is in the first or second quadrant and the filling is on the left with respect to the direction of travel, and when the straight line is in the third or fourth quadrant and the filling is on the right with respect to the traveling direction, Linearly interpolate the straight line and store the result in RAM4R for red screen.
and the work RAM 5.

(2) When the straight line is in the first or second quadrant and the filling is to the right with respect to the direction of travel, and when the straight line is in the sixth or fourth quadrant and the filling is to the left with respect to the direction of travel, Linearly interpolate the straight line and store the result in RAM4H for red screen.
Go in and out.

This means that when filling in the left side of the line α to d in the direction of movement as shown in Figure 4, the lines α and d in the first and second quadrants will be the end points of the filling, as shown in Figure 5. This is because when coloring the right side with respect to the advancing direction of straight lines α to d, the straight line C in the third and fourth quadrants becomes the end point of the coloring. In the case of Figure 3(B), i
7! (If the 11 red line direction of l!jl is set as clockwise, the side to be filled in will be on the right side, and the straight line lI + l! + '
l. is determined to be the 1st quadrant or the 2nd quadrant, and the straight line 13~l,
is determined to be in the 3rd or 4th quadrant, and as a result, R for red screen
AM4R has a shape outline (l) as shown in Figure 3 CG).
+ ~ 11°) Car: 1 is written, and the position of the end point of filling ('
s~to) are written. In addition, Figure 3 ((,')
, CD> indicates the scanning direction. Also X
When it matches the axis, the process moves to step P7 (step 511).

Now, when the above processing is completed, the microcomputer 1 specifies the screen RAM to be filled in and activates the CR'l' controller 8 in order to perform the filling operation by the A-doware process. 1 for screen? ,
The AAI is designated by the screen designation information latch circuit 12, and in this example, since the red screen RAA (4R) is filled in, the latch circuit 26R is set.

By this operation, red screen RAM411 and work RAM5
All areas of the RAM 4R for red screen are accessed synchronously.
The output of the work RAM 5 is sent to the set terminal of the solve flop 9 via the parallel/serial converter 6, and the output of the work RAM 5 is sent to the set terminal of the solve flop 9 via the parallel/serial converter 7.
input to the reset terminal of

FIG. 6 is a timing chart showing an example of signal waveforms of each part of the first illustrated device when the filling operation is being performed in the hardware processing;
A read cycle is generated at the Ar1 stage of the scan address output from the red screen RAM 5, and the contents of the red screen 11AM4R and work RAM 5 are read out synchronously.
The flip-flop IJ knob 9 is set by the 1.4 of "'1" in the serial conversion output of M4R, and the flip-flop IJ knob 9 is reset by the signal of '1°' in the serial conversion output of the work RAM 5. It is.

In addition, the output of the solid flop 9 is converted into parallel data by the serial/parallel converter 10, and a write cycle is generated after the scan address, and the contents of the red screen RAM 4R are converted to the serial/parallel converter 9. Change the needle using the output. As mentioned above, the outline of the figure is written in the red screen RAM 4E, and the end point of filling is specified in the workpiece R□5, so the solve flop 9 is written.
indicates the area to be filled in. As a result, the red screen RAM 4R is replaced as shown in FIG. 3(E), and a filled-in plane figure is obtained.

In addition, during this coloring process, microcomputer 1
The display is controlled by row 1 [not displayed], and after the filling operation is completed, the display returns to the normal display mode.

Further, the configuration in which the Noritsubu flop 9 is reset by the horizontal synchronizing signal is taken into consideration for convenience when filling the entire screen.

The second explanation below is for creating a planar figure in RAM4R for the red screen, but for the RAA for the green and front screen (4G, 4R).
When creating a planar figure on B, the work RAII 45 is used in the same manner. In addition, in this embodiment, the three screen RAMs 4R, 4G, and 4B are set to red,
green.

Although it is made to correspond to blue, the color and RAA (which correspondence can be set freely, and it is also possible to use two or four or more screen RAMs).

As described in detail, according to the present invention, a work RAM that is accessed in synchronization with the screen RAM is provided separately from the screen RAM.
In each case, the end point of filling is set by software processing and output from the screen RAM.
The content of the screen RAM is changed to blue by the output of the solve flop that is reset by the output of "M", and the planar figure is obtained by hardware processing, so the time to create the planar figure in color graphic display is significantly reduced. It has the advantage that it can be shortened to

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of the hardware configuration of the color graphic display device of the present invention, Fig. 2 shows a part of the plane figure creation function, and Fig. 6 shows an example of signal waveforms of each part of the device shown in the first drawing. It is a line diagram. 1 is a microcomputer, 4R is a red screen RAM, 4
G is 11AM for recorded music, 4B is a RAM for the previous screen, 5 is a work RAM, 9 is a solve flop, 12 is a screen designation information latch circuit, and 16 is a vertical synchronization signal synchronization circuit. Patent applicant: Agent for FANUC Co., Ltd. Patent attorney: Kyugobe Tamabatake (6 others) 62

Claims (1)

[Claims] In a color graphic display device that obtains a video signal by reading out a plurality of screen RAMs having storage areas corresponding to display screens in synchronization with a scanning address of an fcRT controller, the screen RAM
a work RAM which has a storage area corresponding to the storage area of and is read out in synchronization with the screen 11AM by the CR'l'controller; a figure writing means for drawing the end point of filling in, and a flip-flop which is set by the output of the screen RAM into which the contour line force is written and reset by the output of the work RAM into which the end point of filling is accepted. and a feedback circuit that feeds back the output of the solve flop to the plurality of screen RAAs,
A color graphic display device comprising: i!1 switching screen specifying means for specifying an RAA for a screen to be switched using the output of the feedback circuit.