JPS5967724A - Semiconductor switch circuit - Google Patents

Abstract

PURPOSE:To obtain a switch circuit protecting a power MOS transistor(TR), less in switching drive current and power loss and having a protecting circuit possible for circuit integration, by discriminating short-circuit of a load with the drain potential of the said TR switching the load. CONSTITUTION:When the load 7 is short-circuited, an output potential of an integrating circuit 12 is increased and exceeds a thershold voltage of a TR9 after a minute time, a gate potential of a TR6 is decreased and a drain current ID is interrupted. Since the short-circuit of the load 7 is detected on the basis of the drain potential of the TR6 in this protection circuit, useless power is not consumed much because of a minute resistance value. Since N-channel common-source power MOS TRs 6, 9 are used as switching elements, an MOS resistor 10 and an MOS capacitor 11 are used as an integrating circuit, and common-source MOSTRs are used as a discharge element 13 and an inverter element 16, the circuit is integrated without applying special isolation even if longitudinal elements having small ON resistance are used.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor switch circuit in which the current flowing through a load is switched by a power MOS transistor, and in particular, when the load is short-circuited, the current flowing through the power MOS transistor is cut off, This invention relates to a semiconductor switch circuit having a function of protecting the transistor.

In recent years, due to the desire to simplify and integrate drive circuits and lower their power supply voltages, there has been a movement to apply power-to-power OS transistors, especially vertical power MOS transistors, which have low on-resistance and are suitable for power switching, to switching applications. .

However, in a semiconductor switch circuit using such a power MOS transistor, when the load connected to the drain side is short-circuited, the gate potential is “
When the voltage becomes H'', the drain current increases in addition to the drain potential, so the power loss determined by the product of both rapidly increases, and there is a problem in that the power MOS transistor is eventually destroyed.

For this reason, as a countermeasure, conventionally, as shown in FIG. 1, the change in the drain current Io is converted into voltage and detected by a microresistance 3 connected in series to the source S side of the power MOS transistor 1, and this detected voltage is sent to the comparator. 4, it is compared with a predetermined reference voltage Vref, and the comparison output drives the drive circuit 5 inserted between the gate G and the input terminal IN, and when the load is short-circuited, the potential of the gate G is forcibly set to "1". Attempts have also been made to protect the power MOS transistor 1 by lowering the voltage to 1.

However, with such a circuit configuration, the microresistance 3 constantly consumes wasted power, which hinders the reduction in loss of the entire switch circuit.Furthermore, when integrating on a semiconductor substrate, the microresistance is generally unused. There was a problem in that the large area hindered high integration.

Furthermore, if a vertical power MOS transistor with low on-resistance is used as a power MOS transistor, and the entire circuit is integrated on the same semiconductor substrate, the substrate itself acts as a drain in the case of a vertical power MOS transistor. The problem is that the substrate potential is not stable, and therefore it is difficult to integrate other circuit components (for example, comparator 4, drive circuit 5, etc.) into the substrate, and the problem must be solved by using external components that are disadvantageous in terms of cost. was there.

The present invention was made in view of these conventional problems, and its purpose is to provide a semiconductor switch circuit that has a small switch drive current and power loss, and is equipped with a protection circuit that can be integrated. It's about doing.

In order to achieve the above object, the present invention includes a protection circuit that determines a short circuit in a load and protects the power MOS transistor that switches the load based on the drain potential of the power MOS transistor that switches the load.
It is characterized in that it is composed of an OS resistor, a MOS capacitor, and a resistor formed on silicon oxide.

Hereinafter, details of the present invention will be explained based on the embodiments shown in FIGS. 2 to 7.

FIG. 2 is a circuit diagram showing an embodiment of the semiconductor switch circuit according to the present invention.

In FIG. 2, 6 is an n-channel vertical power MOS transistor, the source S5 of this transistor 6 is installed, and the drain D6 is connected to the power source VO via a load 7.
The gate G5 is connected to the control input terminal IN via a resistor 8.

Therefore, when the potential VIN of the control input terminal IN instantaneously changes from "L" to "H" or from "H" to "L", the potential of the gate G5 changes according to a time constant curve determined by the resistor 8 and the gate capacitance CG. The transistor 6 is turned on or off, thereby switching the current ID flowing to the load 7.

Reference numeral 9 denotes an n-channel lateral MOS transistor, whose source S9 is grounded and whose drain D9 is connected to the gate G5 of the transistor 6.

Therefore, when the gate potential VG9 of the transistor 9 reaches its threshold voltage VT9, the transistor 9 is turned on, thereby lowering the gate potential VG6 of the transistor 6 to the ground potential.

Between the drain D6 of the transistor 6 and the ground, there is an M
An integrating circuit 12 is provided, which is formed by connecting an OS resistor 10 and a MOS capacitor 11 in series, and in particular, in this example, M
Since an n-channel lateral MOS transistor whose gate and drain are short-circuited is used as the OS resistor 10, the MOS resistor 10 also functions as a constant current source. Furthermore, the output of the integrating circuit 12 is supplied to the gate G9 of the transistor 9, and therefore, as soon as the output of the integrating circuit 12 rises and exceeds the threshold voltage VT9 of the transistor 9, the transistor 9 is turned on. Become.

Reference numeral 13 denotes an n-channel lateral MOS transistor that forms a discharge path for the capacitor 11 of the integrating circuit 12. Its source S13 is grounded, and its drain D13 is connected to the output terminal of the integrating circuit 12. Therefore, when the gate potential VG13 of the transistor 13 rises and exceeds the threshold voltage VT13, the transistor 13 is turned on, the charge in the capacitor 11 is rapidly discharged, and the output of the integrating circuit 12 falls to approximately zero potential. becomes.

14 is an inverter circuit formed by connecting a resistor 15 and an n-channel lateral MOS transistor 16 in series;
The inverter circuit 14 is supplied with the drain potential VD6 of the transistor 6 as a power source, and the gate G15 of the transistor 16 is connected to the control input terminal IN.

Therefore, the inverter circuit 14 inverts and outputs the switching input supplied to the control input terminal IN, and the transistor 13 is controlled to be turned on or off by this inverted output.

Next, the operation of the semiconductor switch circuit explained above will be explained in the third section.
Referring to the time chart in the figure, the explanation will be made separately for normal load and short-circuit conditions.

An operation time chart when the load is normal is shown in FIG. 3(a). As shown in the figure, when the input potential VIN rises from "L" to "H" to turn on the transistor 6, the gate potential VG6 of the transistor 6 is determined by the resistance value R of the resistor 8 and the gate capacitance C6 of the transistor 6. Determined time constant τ (=C
c・R) begins to rise slowly.

Next, when time t1 has passed since the rise of the input potential VIN and the gate potential VG6 of the transistor 6 exceeds its threshold voltage VT6, the transistor 6 turns on, and the drain current ID begins to flow through the load 7. At the same time, due to the voltage drop due to load 7, transistor 6
The drain potential VD6 begins to decrease.

On the other hand, at the same time that the input potential VIN rises from "L" to "H", the output of the inverter circuit 14 changes from "H" to "H".
As a result, the transistor 13 turns on, charging of the capacitor 11 of the integrating circuit 12 is started, and the value of the output potential V1 of the integrating circuit 12 becomes even more moderate than the gate potential VG6 of the transistor 6. rise to

Therefore, before the output potential V1 of the integrating circuit 12 reaches the threshold voltage VT9 of the transistor 9, that is, at the time t2 has elapsed since the rise of the input potential VIN, the drain potential VD6 of the transistor G reaches the threshold voltage VT9 of the transistor 9. As a result, the output potential V1 of the integrating circuit 12 becomes lower than VT9.
1-VD6-VT10-VBC VD6: Value when V1 stops rising VT10: MO
Threshold voltage V8G of S resistor 10; clipped to a value given by back gate effect.

Here, if it is set so that V1<VT9, the value of the integral output V1 will not rise to VT9, so the gate potential VG6 of the transistor 6 will be maintained in the "H" state, and the current 1D will flow through the transistor 6. It will continue to flow.

Next, in order to turn off the transistor 6, when the input potential VIN is instantaneously lowered from "H" to "L", the transistor 6
The charge charged in the gate capacitance C6 is discharged through the resistor 8, and then at the time when VG5<VT6,
Transistor G is completely turned off, and drain current ID no longer flows.

Furthermore, the electric charge charged in the capacitor 11 is also rapidly discharged through the transistor 13, and as a result, the integrator circuit 12
The output potential V1 of V1 drops to approximately zero volts.

In this way, as long as the load 7 is normal, the transistor 6
is normally switched in accordance with the input potential VIN of "H°" and "L".

Next, FIG. 3(b) shows an operation time chart when the load is short-circuited. In the figure, when the input potential VIN is raised from "L" to "H" in order to turn on the transistor 6, the gate potential VG6 of the transistor 6 draws a predetermined time constant curve in the same way as when the load is normal as described above. When VG6=Vt6 after time t1 has elapsed, transistor 6 turns on and drain current 10 starts to flow.

Also, since the load 7 is short-circuited, the transistor 6
The power supply voltage VD6 is applied as is to the drain D6 of the transistor, and therefore the drain potential VD6 is maintained at VDD.

On the other hand, the output potential Vt of the integrating circuit 12 is also equal to the input potential VIN.
However, even when the transistor 6 is turned on, the drain potential VD6 is maintained at the power supply potential VDD. The output potential V1 continues to rise further, and eventually exceeds the threshold voltage VT9 of the second transistor 9 after time t3 has elapsed.

Then, the transistor 9 is turned on and the gate potential VG6 of the transistor G starts to decrease, and the drain current ID also starts to decrease gradually. Then, when time t4 has passed and VG6=VT5, the drain current ID completely stops flowing.

Therefore, since the drain current ID flows only for a very short time (t4-t1) from the time when the input potential VIN rises from "L" to "H", the switching element is destroyed due to power loss as in conventional switching circuits. It is possible to prevent this from happening.

Here, the values of the times t1, t2, and t4 are the values of the MOS resistor 1
It can be set appropriately by changing the gate width/gate length of 0, the capacitance of the MOS capacitor 11, and the resistance value of the resistor 8.

Next, when the input potential VIN falls from "H" to "L", the charge in the capacitor 11 is rapidly discharged through the transistor 13 in the same way as when the load is normal, and the integrating circuit is reset. state.

Note that if the load 7 is suddenly short-circuited while the load 7 is normal and the transistor 6 is on, the output potential V1 of the integrating circuit 12 will change to the previous level as shown in FIG. 3(a). After a short period of time, the transistor 9 begins to rise as shown in FIG. 3(b).
The threshold voltage VT9 is exceeded, and the gate potential of the transition transistor 6 decreases as shown in FIG.
The drain current ID will be cut off.

Thus, in the protection circuit shown in this example,
Since a short circuit in the load 7 is detected based on the value of the drain potential VD5 of the transistor 6, a minute resistance is inserted on the source side of the transistor 6 to detect a short circuit in the load 7 based on a change in the load current. Unlike the conventional example in which the transistor 7 is turned on, power is not wasted due to the minute resistance.

Further, according to this embodiment, M constituting the integrating circuit 12
A discharge transistor 13 is connected in parallel with the OS capacitor 11.
is connected, and this transistor 13 is controlled on and off by the inverted signal of the switching input via the inverter circuit 14, so that the input potential VIN is "
When it falls from "H" to "L", the output V1 of the integrating circuit 12 immediately becomes "L", and even when "H" is repeatedly supplied to the input terminal IN at minute intervals, the output V1 of the integrating circuit 12
There is little variation in the delay time of MOS
Since a constant current source formed by shorting the drain and gate is used as the resistor 10, the output potential Vt of the integrating circuit 12
increases temporarily as a function of time, making it easier to set the delay time and construct a highly accurate integration circuit than when using a simple linear resistor.

Further, in this embodiment, an n-channel source-grounded power MOS transistor 6 is used as a power switching element, and an n-channel source-grounded power MOS transistor 6 is used as a gate shorting element.
Since the source-grounded MOS transistor 9 of the channel is used, the MOS resistor 10 and MOS capacitor 11 are used as the integration circuit, and the n-channel source-grounded MOS transistor is used as the discharge element 13 and the inverter element 16, it is extremely suitable as a power MOS transistor. Even when vertical elements with low on-resistance are used, they can be easily integrated within the same semiconductor substrate without any special isolation.

Furthermore, regarding the input resistor 8 connected to the gate of the power transistor and the load resistor 15 of the inverter circuit,
Since all of them require a relatively large resistance value, their occupied area is small, and high-density integration is therefore possible.

Furthermore, in this embodiment, since the drain potential VD6 of the power MOS transistor G is used as the power source of the integrating circuit 12 that drives the transistor 9 and the gate voltage of the MOS resistor 10, the Even in the case of a large-capacity lamp load where the drain potential VD6 slowly decreases, the output ratio of the integrating circuit 12 (short-circuited/normal) can be made large, thereby shortening the time required to determine whether there is a short-circuit or not. It has the effect of being able to

This effect can be observed when determining whether a short circuit occurs by directly detecting the drain voltage VD5 of the power MOS transistor 6, that is, even if a certain period of time has passed after the input potential rises from "L" to "H". A comparison will be made with reference to FIG. 4 in comparison with a case where a short circuit is detected based on the fact that the drain potential VD5 is "H".

Figure 4(a) shows the drain potential VD6 when the load is normal.
FIG. 4(b) shows changes in the drain potential VD6 and the integral output V1 when the load is short-circuited.

As shown in FIG. 4(a), when a large-capacity lamp is used as the load 7 with the power supply voltage VDD=12 ports and the input potential VIN "H" set to 5 volts, if the load 7 is normal, , at least T1 time is required for the drain potential VD6 to drop to the threshold voltage VT (≈1 to 2 volts) of the MOS transistor.

Therefore, if the threshold voltage V of the MOS transistor is
If we try to determine whether the load 7 is short-circuited using T and based on whether the drain potential VD5 decreases below VT, at least the time T1 after the switching input VIN becomes "H" can be determined. I need. Here, since current continues to flow through the transistor 6 during the time T1, if the load 7 has a large capacity, the time T1 becomes longer (≧1
0ms), there is a possibility that the transistor 6 may be damaged.

However, in this embodiment, since the drain potential VD6 is used as the input of the integrating circuit 12, the load 7
There is a significant difference between the rise curve of the integral output V1 in a state where the drain potential VD5 is normal and the drain potential VD5 is decreasing, and the rise curve of the integral output V1 in a state where the load is shorted and the drain potential VD5 is maintained constant. . That is, when the load is normal, the integrated output V1 does not exceed the threshold voltage Vt9 of the transistor 9, whereas when the load is short-circuited, V1 exceeds Vt3 in just T2 time after VIN rises. ,
It is possible to determine whether the load is normal or short-circuited within time t2, which is shorter than T1, and damage to the transistor 6 can be prevented.

Next, the structure of each part when the semiconductor switch circuit described above is integrated on the same chip will be explained with reference to FIGS. 5 to 7.

5 shows the structure of the transistor 6, FIG. 6 shows the structure of the MOS resistor 10 and MOS capacitor 11, and FIG. 7 shows the structure of the resistor 8.
and the structure of another MOS transistor 9 are respectively shown.

FIG. 5 shows the structure of a known vertical MOS transistor, where 61 is a source electrode, 62 is a gate electrode, 63 is a drain electrode, 64 is a source region, 65 is a channel forming region, 66 is a drain region, and 67 is a drain electrode. is the high concentration area, 68
is the substrate.

Then, the radio wave flows from the n-type drain region 66 to the n-type source region 64 through a channel formed under the gate electrode of the p-type channel formation region 65. According to this structure, the on-resistance can be reduced because current can flow in a substantially vertical direction, making it suitable for power switching.

FIG. 6 shows a channel forming region 105 formed in the drain region 66 of the vertical MOS transistor shown in FIG.
A resistor 10 and a MOS capacitor 11 are shown. In the figure, 101 is a source electrode, 102 is a gate electrode, 1
03 is a drain electrode, 104 is a source region, 105 is a channel forming region, 106 is a drain region, 107 is a high concentration region, and 11 is a MOS capacitor.

As shown in the figure, the capacitor 11 is formed by sandwiching a gate SiO2 film between a grounded n-type impurity high concentration region as a lower surface electrode and Al as an upper surface electrode.
Since the resistor 10 and the MOS capacitor 11 are formed in the grounded channel forming region 105, the vertical power MOS transistor 6 is turned on and the drain region 6 is turned on.
Even if the potential of 6 changes, its characteristics do not change.

Similarly to FIG. 6, FIG. 7 also shows a p-type channel forming region 9 in the drain region 66 of the vertical power MOS transistor 6.
5 is formed, and a lateral MOS transistor 9 is formed therein. The figure also shows an input resistor 8 made of poly-Si.

In the figure, 8 is a poly-Si resistor, 91 is a source electrode, 92 is a gate electrode, 93 is a drain electrode, 94 is a source region, 95 is a channel forming region, 96 is a drain region, and 97 is a high concentration region.

Since both the source region 94 and the channel forming region 95 are grounded by the source electrode 91, the vertical power MO
Even if the electrode of the drain region 66 changes due to the switching of the S transistor 6, the potential of the channel forming region 95 is not affected, so that the lateral MOS transistor 9 operates normally. Also, pol
The y-Si resistor 8 is made of poly-Si on the field SiO2.
Since it is made of Si, it is completely insulated from the drain region 66 and is not affected by potential fluctuations in the drain region 66.

Thus, with the structure shown in FIGS. 5 to 7, the semiconductor switch circuit shown in FIG. 2 and the vertical MOS transistor 6 can be integrated on the same chip.

In the above embodiment, each circuit element is integrated on the same chip, but it is of course possible to obtain the desired circuit effect even if each circuit element is composed of discrete components.

As is clear from the description of the embodiments above, according to the present invention, it is possible to provide a semiconductor switch circuit with a short switch protection circuit that has a small switch drive current and power loss and can be integrated. The circuit has the advantage of having high short circuit detection responsiveness.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing a conventional semiconductor switch circuit, Figure 2 is a circuit diagram showing a conventional semiconductor switch circuit.
The figure is a circuit diagram showing a semiconductor switch circuit according to the present invention, Figure 3 is a waveform diagram showing the operation of the circuit of the present invention divided into normal load and load short-circuit, and Figure 4 is a waveform diagram showing the operation of the circuit of the present invention in other cases. A diagram showing a comparison of circuit operation, Figure 5 is a vertical power M
Figure 6 shows the structure of the OS transistor, Figure 6 shows the structure of the MOS resistor and MOS capacitor, Figure 7 shows the structure of the poly
- It is a diagram showing the structure of a Si resistor and a lateral MOS transistor. 6...First MOS transistor 7...
・Load 8...Input resistance 9...Second MOS transistor 10...Integrated circuit 13...Third MOS transistor 14...Inverter circuit Patent applicant Nissan Motor Co., Ltd. Company agent Patent attorney Shigenori Wada VO2 Figure 2 Figure 3 (a) (b) Figure 4 (0) (b) 12〆' Figure 5 Figure 7

Claims (1)

[Claims] (1) First MO that switches the current flowing to the load
an input resistor connected between the gate of the first MOS transistor and an input terminal; an integrating circuit charged with the drain potential of the first MOS transistor; the source is grounded, and the drain is connected to the 1st MO
a second MOS transistor that is connected to the gate of the S transistor and performs a switching operation using the output of the integrating circuit; an inverter circuit that inverts the switching input at the input terminal; the source is grounded and the drain is connected to the integrating circuit; A semiconductor switch circuit comprising: a third MOS transistor connected to an output terminal and performing a switching operation using the output of the inverter circuit.