JPS5965446A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form an element isolating region even under the condition where a groove is narrow and deep by forming a side etching at the time of etching a substrate, leaving poly-Si at the side surface of groove utilizing an overhanging and filling such groove by oxidation. CONSTITUTION:A first SiO2 film 2 is formed on a wafer and an Si3N4 film 3 is deposited. Thereafter, a photo resist pattern 4 for isolation is formed. The first SiO2 film 2 and the Si3N4 film 3 are etched. Thereafter, a groove 5 is formed by etching the wafer 1 in such a way that the side etching of the specified amount is generated. A second SiO2 film 21 is formed on the bottom surface and side surface of the groove 5, and a poly-Si film 22 is deposited. When the poly-Si film 22 is etched, the first SiO2 film 2 and Si3N4 film 3 under the overhanging part are not etched. Thereby the poly-Si film 22 can be left only under the overhanging part. Thereafter, the poly-Si film 22 is oxidized and the isolating region 23 can be formed.

Description

DETAILED DESCRIPTION OF THE INVENTION - Industrial Field of Application The present invention relates to a method for manufacturing a semiconductor integrated circuit, and particularly to a method for forming high-density L-3I isolation between elements.

Conventional Structure and Problems The conventional insulation isolation method using the LOCOS oxidation method is shown in FIGS. 1a-'-e.

First, a substrate (hereinafter referred to as a wafer) 11: [first S z
02 Film 2 is formed at a thickness of, for example, 300 to 200 degrees, and the first S Z 3N4 film 3 is formed thereon at a thickness of, for example, 1000 to 200 degrees.
After 0oO deposition, photosensitive resin (
A pattern 4 (hereinafter referred to as photoresist) is formed (FIG. 1a).

Next, using the photoresist pattern 4 as a mask, an anisotropic etching method such as reactive ion etching is used to first remove the first S 102 film 2 and the first S 102 film 2.
The i3N4 film 3 is etched, and then the wafer 1 is further etched by an anisotropic etching method to form grooves 5 for separation patterns (FIG. 1b).

A second Si3N4 film 6 is deposited on the wafer 1 (FIG. 1C). Next, the entire surface of the second Si3N4 film 6 is etched using an anisotropic dry etching method, leaving the second Si3N4 film 6 only on the side surfaces of the grooves 5 (FIG. 1d).

The wafer 1 is then oxidized to form a third SiO2 layer in the groove 5.
Separation is performed by forming a membrane 7 (FIG. 1e).

In the above method, since the substrate is oxidized using the Si3N4 film 3 as a mask, the substrate is likely to be strained during oxidation, causing crystal defects, and also has the drawback of forming narrow, courier grooves on the side surfaces of the grooves. be.

Furthermore, if a taper is formed when etching the trench, the self-line Si3N4 film will be left behind on the side surface of the trench and will be left behind, making it easy to cause bird's beak in the step of forming the third oxide film.

An example of the inter-element isolation method using the embedding method is shown in Figure 2a.
- Shown in d.

First, a first layer of 5lo22 is deposited on the wafer 1 using a thermal oxidation method.
A photoresist pattern 4 for isolation formation is formed after a plasma CVD test N 3 and a second 5io211 are formed thereon (FIG. 2a).

Using the photoresist pattern 4 as a mask, the first SiO2, Si3N43 and second 8
10211, and then the substrate is etched using an anisotropic dry etching method to form grooves 5.

Next, a third layer 31 is formed on the bottom and side surfaces of the groove 5 by thermal oxidation.
After forming the 02 film 12, Po1ySi is deposited by low pressure CVD method.
13 (Figure 2b).

After that, the wet etching method is applied to
Etch 3 and add Po1y 5i13 only in groove 5.
(Figure 2C).

Next, the Po1ySi 13 is oxidized by a thermal oxidation method to form a fourth S 10214 (FIG. 2d).

In the above method, since it is necessary to completely bury PolySt by the depth of the groove, it is possible to form a fine pattern when the depth of the groove is shallow, but as the depth of the groove increases, the pattern width Po1y into the groove depending on the dimensions of
There is a drawback that St 2 is not deposited and cavities are generated, and the pattern width is restricted by the depth of the groove, and fine patterning is also restricted.

Purpose of the Invention The present invention forms side etching when etching a substrate, and uses the eaves of the side etching to form PolySi
By leaving -C1 on the sides of the trench and filling the trench through a subsequent oxidation process, we provide a method that allows isolation between elements to be formed even if the trench is narrow and deep. be.

Structure of the Invention The present invention provides an inter-element isolation method using a embedding method.
When etching the substrate, side etching is performed to form a canopy, and using the canopy, a layer of Po1ySi is left under the canopy in a self-line manner, and then Po1ySi is etched.
The 1y Si film is oxidized to completely fill the groove.

DESCRIPTION OF THE EMBODIMENTS A first embodiment of the present invention is shown in FIG. 3a"we and FIG. 4.

First, a first Si○2 film 2 of about 0.03 to 0.1 pm is formed on a wafer 1 by a thermal oxidation method, and a Si3N film is formed on it.
4 film 3 is deposited to a thickness of, for example, 0.05 to 0.2 μm by low-pressure CVD, etc., a photoresist pattern 4 for separation formation is formed.
(Figure 3a).

Using the photoresist pattern 4 as a mask, the first Sio
2. Film 2 and Si3N4 film 3 are etched by an anisotropic dry etching method, and then a predetermined amount of UNINO. The grooves 5 are formed by etching using a dry etching method that causes side etching or the like (FIG. 3b).

Next, a second 5i is applied to the bottom and side surfaces of the groove 5 by thermal oxidation.
02 film 21 is formed to have a thickness of, for example, 0.2 to 0.5 pm, and the PolySi film 22 is formed to have a thickness of, for example, 0.2 to 1.0 pm.
0 deposited by low pressure CVD method etc. on the order of μm, at this time Po1
The thickness of the ySt film 22 is selected to be such that it can fill up the pores 5 in the subsequent oxidation process (FIG. 3C).

Next, when the Po1ySi film 22 is etched by an anisotropic etching method until the Si3N4 film 3 is etched, the area under the eaves of the first SiO2 film 2 and the 513N4 film 3 is not etched, so Po1 is etched only under the eaves.
The y Si film 22 can be left behind (FIG. 3d).

Thereafter, the PolySi film 22 is oxidized by a thermal oxidation method to the extent that the grooves can be filled, thereby forming a -C separation region 23 (FIG. s3 e).

As shown in Fig. 4, when forming a groove, if we consider the case where the side surface of the groove is tapered, even if the side surface is tapered, if polySi is anisotropically etched, the first The S z 02 film 2 and the Si3N4 film 3 under the eaves are etched, and the Po1ySi film 22 can be easily left under the eaves.

A second embodiment of the invention is shown in Figures 5a-f.

First, a first SiO2 film 2 is formed on a wafer 1 by thermal oxidation.
o, about 0.3 to 0.111 m, and the first 8 m
The 13N4 membrane 3 is subjected to a reduced pressure CV of, for example, about 0.05 to 0.2 μn.
After deposition by the D method or the like, a photoresist pattern 4 for isolation formation is formed (FIG. 6a).

Using the photoresist pattern 4 as a mask, the first 3
102 membrane 2 and first 313. The Na film 3 is etched using an anisotropic dry etching method, and then
1 is processed and notched by anisotropic etching, isotropic etching, dry etching with side etching, etc. to form grooves 5 so as to cause side etching of a predetermined amount, for example, about 0.2 to 1.0 μm. (Figure 5b
).

Next, a second layer 51 is formed on the bottom and side surfaces of the groove 5 by thermal oxidation.
The o2 film 21 is formed to a thickness of, for example, 0.2 to 0.511 m, and then the second 513N4 film 31 is formed to a thickness of, for example, 0.05 to 0.511 m.
It is deposited to a thickness of about 0.2 μm by low-pressure CVD or the like (Fig. 5C).

Next, the Po1y, St film 22 is made of, for example, 0.2 to 1.0
A thickness of about 1 tm is deposited by low pressure CVD method or the like. At this time Po
The thickness of the 1y St film 22 is increased by the groove 5 in the subsequent oxidation process.
(Fig. 5d).

When the PolySt film 22 is etched by an anisotropic dry etching method to the extent that the 1813N4 film 3 is etched, the first SiO2 film 2 and the first Si3N4 film 3 are etched.
The Po1y, Si film 22 can be left only under the canopy which is not etched (FIG. 6e).

Thereafter, the PolySt film 22 is oxidized by a thermal oxidation method to the extent that the groove 5 can be drilled into it to form a thinning region 23 (FIG. 6f). The case where tape is formed in the groove is the same as in the first embodiment.

J, J, □. Yo9. To □3, it's 41 degrees, □ Even if a groove is formed, there is no need to deposit Po1ySi to the depth of the groove.If it is deposited at least 1y4 of the pattern width, the rest is done during oxidation. Grooves can be filled by the expansion of the PolySi film/The thickness of the PolySt film can be made thinner, making it very easy to reduce the width of the butter 7.

In addition, the process of leaving PolySi requires the use of the eaves created by side etching, and PolySt can be left only under the eaves in a self-aligned manner, which simplifies the process.

In this example, all of the deposited PolySi was oxidized, but after filling the trench, the unoxidized P
It goes without saying that o1ySi may remain, and if the Si3N4 film is deposited before depositing the Po1ySi film as in the second embodiment! l)
When oxidizing PolySt, even if the oxidation time becomes too long and the substrate is overoxidized, the substrate will not be oxidized, so the oxidation can be carried out with ample time.

In this embodiment, PolySi was used as the embedding material, but it goes without saying that it may be a material that expands and can be embedded through some kind of treatment.

Effects of the Invention As described above, with the method of the present invention, it is possible to reduce the thickness of the film such as PolySi deposited with respect to the depth of the groove, and also to reduce the thickness of the film such as PolySi deposited within the groove. It is now possible to perform the process of leaving a cell in a self-aligned manner using the canopy, allowing for easy and reliable isolation between elements. It has great industrial value.

[Brief explanation of drawings]

Fig. 1 a-e, Fig. 2 a, d are cross-sectional views of the process of F Yorai's device isolation method, Fig. 3 a-e, Fig. 4, and Fig. 5 a-
f is a process sectional view of the first and second embodiments of the labor separation method of the present invention, respectively. 1...Substrate, 2...SiC film, 3,3
1...513N4 film, 4...Photoresist pattern, 5...m, 22...
PolySi film. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure f4 f3 Figure 3 Figure 3 Figure 4

Claims (3)

[Claims] (1) forming at least an oxidation-resistant film on the substrate; forming a predetermined oxidation-resistant film pattern; and forming a predetermined portion of the substrate from the oxidation-resistant film pattern described in -. A process of forming a groove by etching a predetermined amount inward, a process of forming an insulating film on at least the etched surface of the substrate, and an expansion process of forming a film that expands by post-processing. a step of etching the film by an anisotropic etching method;
(a step of expanding a film to fill the trench). (2) The method for manufacturing a semiconductor device according to claim 1, wherein the insulating film is an oxidation-resistant film. (3) The method for manufacturing a semiconductor device according to claim 1, wherein the insulating film has two layers: an insulating film and an oxidation-resistant film.