JPS5963758A - Laminated type charge coupled device solid-state image pickup element - Google Patents

Abstract

PURPOSE:To improve resolution by periodically arranging two series picture element electrodes displaced in the half picture element size horizontal direction at every row in the substrate constitution of a two-stoired image pickup element and changing optical signal charges stored so as to be distributed and transferred to two series of vertical CCDs. CONSTITUTION:The second ground 1-b of picture element electrodes is displaced and arranged only by half picture element size to the first grop 1-a, and the first and second vertical CCDs are disposed on both sides of an insulating isolation band 17. The electrodes 1-a, 1-b are each connected to diffusion layers 11-a, 11-b through windows 10-a, 10-b. With the signal charges of each electrode group, transfer gates are opened by using predetermined pulses, and they are each transferred alternately in vertical CCD groups and transmitted over a horizontal CCD 3, and transmitted over an output 4 by pulses phiH1-phiH3. Accordingly, the signals of adjacent rows are transferred at the same time in the vertical CCDs and transferred displaced for a fixed time in the horizontal CCD, signals are processed easily, and resolution can be improved both in the horizontal and vertical directions.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an improvement of a two-dimensional solid-state image sensor in which a photoconductive membrane is laminated on the top of a semiconductor substrate in which a strain-transmitting element and a group of switch elements are integrated. be.

[Prior art]

The homogeneous image carrier requires an image pickup plate with the resolving power of the imaging electron tube used in current television broadcasting.
A picture element matrix in which 000 picture elements (photoelectric conversion elements) are arranged and a scanning element corresponding to the picture element matrix are required. To date, CCDs have been used as an effective means of realizing solid-state image sensors.
Two types have been considered: type and MOS type (an element that uses the source junction of an MO8 switch as a photodiode).

All of these devices have the advantage that they can be manufactured using MO8 process technology with a high degree of integration. However, since the photosensitive part is under the electrode (in the case of CCD type) and still on the same plane as the scanning switch and the No. 16 output line (in the case of MOS type), the incidence of light on the electrode and switch part The disadvantage is that there are many areas where the light is obstructed, that is, the optical loss is large. Furthermore, since the photosensitive section and the scanning section are on the same plane as described above, the area occupied by the picture element becomes large. That is, there is a problem in that the resolution cannot be increased because the degree of integration of picture elements cannot be increased.

As a structure to solve these problems (photosensitivity, resolution), we have applied for a solid-state image sensor with a two-story structure in which a photosensitive photoelectric conversion film is laminated on top of a substrate on which scanning switches and the like are integrated.

The above-mentioned CC is used as a carrier constituting the substrate of the seed image sensor.
D type and MOS type can be considered.

Recently, a double-decker image sensor using a CCD type scanning substrate has been reported.
A CCDHmager Using Zn 5e-
Zn, -x Cdx'l'e) (eterojunc
tion photocorductor, Jap
aneseJ.

Appl phys,, vol, 21. p'9
．． 237-242. (1982) The configuration and structure of this device are shown in FIG. In FIG. 1(a), 1 is a picture element electrode that determines the dimensions of one picture element, 2 and 3 are vertical COD shift registers and horizontal ones for taking out optical signals accumulated in the picture element electrode group to an output amplifier 4. This is a CCD shift register (hereinafter simply referred to as vertical and horizontal COD).

5.6 is a clock pulse generator that produces clock pulses for driving the vertical cCl') and the horizontal CCI). Although a two-phase clock pulse generator is illustrated here, either a four-phase or three-phase clock format may be adopted. In addition, 7 is a CC which carries the charge accumulated in the picture element electrode.
The transfer gates 8 and 9 feeding into D are each vertical [COD
and the direction of charge transfer within the horizontal CCD. The structure of the above element is shown in FIG. 1(b). The picture element electrode 1 is connected to a diffusion layer 11 (composed of impurity atoms different from the substrate 12) via a contact hole 10. 2-1゜2
-2 is the electrode that constitutes the vertical CCD (generally polycrystalline silicon is used), 2-3 is the vertical [diffusion layer that makes the COD a buried type (composed of the same impurity atoms as the diffusion 1111, but with a lower concentration) ), 13 is an oxide film (generally 5in2) that insulates the vertical CCD groups from each other by p4, and 14
15 is a photoconductive film, and 15 is a transparent direct product (for example, Ind
ium TinQxide). In its current form, this element is a monochrome image sensor, but if a color filter is laminated on top, each photodiode will be provided with color information, making it a 2-color image sensor.

This two-story image sensor has the excellent advantages of higher pixel integration than conventional image sensors, and low noise (i.e., high sensitivity) because it uses a COD shift register for scanning. There is.

However, the number of picture elements is still 500 (vertical direction) x 4
00 (horizontal direction), and the resolution is still half of the required specification. Also, due to the configuration constraints of the vertical shift register, interlacing requires a method in which odd columns (solid arrow 7-1) are read out in the first field and even columns (pointed arrow 7-2) are read out in the second field. As a result, there are problems caused by the interlace method, such as 50% of the image accumulated in the previous field remaining (afterimage) and low color resolution. Therefore, the application is also household VT)L
However, in order to develop a wide range of applications that take advantage of the advantages of solid-state devices, it is urgently necessary to improve the above-mentioned problems, including resolution. ing.

[Object of the present invention]

An object of the present invention is to solve the above-mentioned problems, that is, to improve the resolution of a two-story solid-state image sensor by devising a device configuration without relying on miniaturization technology for MO8 integrated circuits.

[Summary of the invention]

In order to achieve the above object, the present invention has a structure of a substrate used for scanning of a two-story image pickup device, in which two series of pixel electrodes are periodically arranged in each row with 172 pixel dimensions shifted in the horizontal direction, and each This system effectively improves the resolution by distributing and transferring the optical signal charges accumulated in the picture element electrodes of each series to separate (two series) vertical CODs. be.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using Examples.

FIG. 2 is a diagram showing the basic configuration of the two-story CCD image pickup device of the present invention. 1-a and 1-b are picture element electrode groups, but the second group (1-b) is horizontally only half the pixel size compared to the first group (1-a). Arranged. 2-a and 2-b are first and second vertical CCD groups arranged on both sides of the electrically insulating separation band 17. The insulating isolation band 17 is composed of, for example, a thick oxide film 13 and an impurity atomic layer 17' having the same type as the substrate and having a high concentration. Also, 17'' is an impurity atomic layer (same type as the substrate) for pixel separation, and the concentration should normally be the same as 17'.
’ is formed in the same process as ’. Electrode group 1-a is connected to diffusion layer 11-a through contact hole 10-a, and electrode group 1-a is connected to diffusion layer 11-a through contact hole 10-a.
-b is connected to the contact hole 10-b and the diffusion layer 11-b.

Light charge transfer gate 7 of No. 8 charge accumulated in electrode group 1-a
-a via it CCI) ff 2- a K,
The charges accumulated in the xi group 1-b are sent to the vertical CCD group 2-b via the transfer gate 7-b. The signal charges of each polarization group are sequentially carried within the vertical CCD group and sent to the horizontal CD3. The charges in the electrode group 1-a are sent to the electrode 3'-a in the previous stage in the horizontal CCD, and the charges in the negative electrode group 1-b are sent to the electrode 3'-b in the next stage. Each signal charge is sequentially carried within the horizontal CCD toward the output amplifier 4.

Here, three electrodes (3'-a, 3'
-b.

3/c), the charge is adjacent 2-polarized (3'
-a and 3'-b).

(Compared to the general transfer method that uses one of the three electrodes, the above transfer method is hereinafter referred to as double transfer). Also, φ Town, φM2. φH3 is a horizontal clock pulse that drives three electrodes.

FIG. 3 is a diagram showing an example of the structure of the image sensor of the present invention shown in FIG. 2. Figure (a) is a-a in Figure 2.
'Cross section, Φ) is the element structure representing the b-b/cross section; regions 2'-a and 2'-bt; are vertical CC1)
2-a and 2-b are shown. 2-3a and 2-3b in Fig. 8g2 are diffusion layers constituting the vertical (CCI) 2'-a and 2/l.

Here, electrodes 1-a and 1-b are spaced from each other by half (d/2) of the dimension of one pixel, where d is the dimension of one pixel (pitch interval of polarization 1-a, 1-b). They are placed out of alignment.

The optical signal transmitted to electrode 1-a or lb is transferred to electrode 2.
-1 when a high voltage (1" level in FIG. 5) is applied to the vertical CC through the transfer gate 7'-a or 7'-b.
It is sent to D2'-a or 2'-b (arrow 20
-a, 20-b).

FIG. 4 shows the clock pulses for driving the vertical shift register in the image sensor of the present invention shown in FIG. 2 and their timing. This pulse consists of three levels: "1", "M", and "0", and the "1" level (highest voltage) is the state in which the transfer gate 7 (7') is opened (polarization group 1-a,
1-b) State where charges can be transferred to the vertical shift register)
It shows. "M" level (intermediate 1 pressure) is vertical CCD
2-a and 2-b are driven by a droplet pressure, and 1" and 0" (for example, earth voltage) are applied alternately to the COD electrodes 2-1 and 2-2 constituting the vertical CCD. The signal charges are sequentially transferred within the vertical CCD toward the horizontal COD (downward).

Here, the "L" level and the following "M" level are contained within the vertical retrace period (TILL) in any pulse, but in the first field, the clock pulse φV
The 1" level of , is outputted a predetermined time (td' td) earlier than the "1" level of φV2, and conversely, the 1" level of φV2 is outputted earlier than the 1" level of φV, in the second field. Ru.

In this way, by applying to the image sensor of the present invention a pulse in which both φVI+φv2 have a 1" level and whose output time is reversed for each field, two columns shifted by one column in each field can be generated. 1 pole group 1-
It becomes possible to read signal 1 charges of a and 1-b. That is, in the first field, for example, the 11-1st column (electrode group 1-a) is selected by the pulse φvl, and the pnth column % electrode group 1-b is selected by φV2, and the electrodes are sent into the vertical CCD. The signal charges in each column are vertical C0D (2-a, 2-b
), in the second field, the pnth column (electrode group 1-b) is selected by φV2, the 9n+1st column electrode group 1-a is selected by φV, and Vertical CC
I) n-)-1 constituting (2-a, 2-b)
It is transferred below the C0Dt pole of the column. In this way, the signals of adjacent columns arranged in the same column are transferred within each vertical register at the same time, and finally transferred to the horizontal shift register 3. In transferring the signal charges in each column to the horizontal shift register, for example, the signal charges in the 11-1st column (or nth column) are one stage earlier than the charges in the nth column (or n+1st column).
Therefore, signal charges can be extracted from the output 4 in the order of n-1 and n columns in the first field and in the order of n and n+1 columns in the second field. In this way, signals in adjacent columns are displayed at the same time in the vertical CCD, and at a predetermined time (in the horizontal CCD) in the horizontal CCD.
The fact that the signals are transferred with a time lag (determined by the drive frequency of each stage) (meaning the double transfer described above) makes signal processing (separation of signals in adjacent columns) extremely simple. (In other words, even in the image sensor of the present invention that reads out two columns at the same time, signal processing can be performed in exactly the same manner as in the conventional one-column readout type element shown in FIG. 1.)

As a result, in the image sensor of the present invention, the signals of the electrode groups 1-a and 1-b, which are arranged spatially shifted by 1/2 picture in the horizontal direction for each column, are transmitted in two vertically adjacent columns. are read out as a set, and resolution can be improved both horizontally and vertically (up and down). When the inventor calculated the resolution of an image sensor having the structure of the present invention, it was found that the resolution was about 1.8 times higher than that of the conventional device. The number of picture elements (the number of picture element electrodes) remains the same as in conventional elements, and by changing the arrangement of picture element electrodes as described above, it is possible to improve the resolution due to the constraints of the element manufacturing technology. For current solid-state imaging devices, which have an upper limit on the degree of integration, this is extremely valuable in practice.

FIG. 5 shows an embodiment in which the direction of the transfer gate for transmitting the optical signal charges accumulated in the electrode groups 1-a and 1-b to the 1α CCD is completely different from that in FIG. 2.

(Capital) The load on the pole group 1-a is transferred to the vertical CCD 2-b via the transfer gates 7-b and 7-a in mutually different directions.

2-a, the charges of the electrode group 1-b are transferred to the opposing transfer gates) 7-a, ? -b through vertical CCl) 2-a.

2-b. Also in this example, vertical CC
The operation in which charges are transferred from L) to the horizontal COD is the same as in the embodiment of FIG. 2 described using FIG.

In FIGS. 2 and 5, a vertical CCD 2-a transfers the optical signal charges of the electrode groups 1-a and 1-s.

2-b are opposed to each other with the dielectric decomposition zone 17 in between. Vertical C for transferring signal charges of electrode groups 1-a and 1-b
FIG. 6 shows an example of a configuration in which C and D are arranged separately one by one. 18-a is a vertical CCD that transfers the signal charge of electrode group 1-a, and 18-b is a vertical CCD that transfers the signal charge of electrode group 1-b. Also, 19 is a horizontal CCD
It is. Here, an example is shown in which two series of horizontal CCDs 19-a and 19-b are provided in correspondence with the transfer of charges carried by the vertical CCDs 18-a and 18-b valleys (of course, the horizontal COD is As in the case of FIG. 2, it is also possible to perform double transfer operation using three-phase CCDi).

Here, the horizontal COD is a two-phase clock pulse φ”In
It is driven by φH2 (if the number of wires is acceptable, it may be driven by four-phase clock pulses).

4-a and 4-b are output amplifiers provided in each horizontal COD.

FIG. 7 is a diagram showing the structure of the image sensor shown in FIG. 6. FIG. 6(a) is a cross section of the image sensor shown in FIG.
(2) is the bb/cross section. 1-a, 1-b are picture element electrode groups, regions i s'-a, i s'-b are vertical [CC
Tail showing D18-a and 18-b.

Here, electrodes 1-a and 1-b are arranged as in the case of FIG. The charge transfer operation is exactly the same as that of the image sensor shown in FIG.

In the actual IJIJA examples so far, we have described a configuration in which the last phase of the picture element is shifted horizontally by 1/2 picture element for each vertically adjacent column, but the picture element electrode group is 1/n (n:al 4m・
...) picture element or m/n picture element (m: 1, 2, 3
,4. ...However, it may be shifted by m4n, m<n).

FIG. 8 shows the structure of an element in which the picture element'-electrode group is shifted from each other by 1/3 picture element.

Although the above description has been made with reference to a black-and-white image pickup device to avoid loss of generality, the configuration and operation of a color device are exactly the same as those of the image pickup device described above. - As an example, FIG. 9 shows an element configuration in which a complementary color filter is adopted for the element having the configuration shown in FIG. 2, and the color correspondence. For example, electrode group 1-a
The series has a cyan filter (C), a white filter (W), and a yellow filter (Y) in order from left to right, and the electrode group 1-b series has a yellow filter, which is equivalent to 1/2 a pixel in the front row. filter, cyan filter, and white filter will be assigned.

As described above with reference to the embodiments, the two-story image sensor of the present invention includes two series of picture element electrode groups arranged every seven columns of vertical COD, and both series are arranged m from each other.
/n Desirably, the pixels are arranged with a 1/2 pixel shift, and the above-mentioned -
By allocating each pole series to each of the shift registers and reading out one optical signal accumulated at the valley pole using an interlace method that selects two columns simultaneously, the resolution can be increased to about 2. It can be improved twice. In addition, conventional COD
By changing the 1-column selection interlacing used on the scanning board to 2-column selection, it is possible to prevent afterimages, prevent color mixtures, and make the flaw processing circuit more modular. The practical value of the present invention is extremely significant.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the basic configuration of a conventional CCD type two-story solid-state image sensor, FIG. 2 is a diagram showing the configuration of a CCD type two-story image sensor of the present invention, and FIG. 3 is a diagram showing the basic configuration of a conventional CCD type two-story solid-state image sensor. FIG. 4 is a diagram showing the structure of the image sensor of the invention, FIG. 4 is a diagram showing a pulse time chart for driving the image sensor of the invention shown in FIG. 2, and FIG. 5 is a diagram showing the structure of the vertical COD shift register. Figures 61 and 8 are diagrams showing embodiments different from those in Figure 2, and 1 is a vertical CCD and a horizontal CCD different from those in Figure 2.5.
7 is a diagram showing the structure of the element mounted on FIG. 6, and FIG. 9 is a diagram showing the configuration of the color CCD type two-story image pickup device of the present invention in which color filters are laminated. It is a diagram. 1... Pixel electrode, 2.18... Vertical CCD shift register □ star, 3.19... Horizontal CCD shift register, 4... Output amplifier, 5... Vertical clock pulse generator, 6...・Horizontal clock pulse generator, 7... Transfer gate, 10... Contact hole, 11... Diffusion layer, 12... Substrate, 13... Insulating oxide film, 14...
Photoconductive film, 15...transparent (b) ■zFig. 3 Fig. Kunihi 21 = 10 is 'f3 4 Fig. 1 1st field - sitot plexus 27゜/L t:
1 Figure 5 Kaya Figure 6

Claims (1)

[Claims] 1. Multiple vertical COD shift registers and horizontal CO
Laminated type C, in which a photoconducting film that plays the role of photoelectric conversion is laminated in a two-story pattern on a semiconductor substrate on which a D shift register is integrated.
In an OD solid-state image sensor, a matrix of picture element electrodes forming a picture element is arranged in sets every other row in the vertical scanning direction to provide a series of picture element electrode groups, and one series of picture element electrode groups is formed. is the horizontal arrangement pitch dimension of the picture element electrodes rn7'n (where m is an integer of 1 or more, n is an integer of 2 or more, m<n, m-kin ), and the optical signal charge accumulated in the picture element electrode group of the first series is divided into the first series, and the vertical CCl)
The vertical CCD is transferred to the horizontal CCD shift register by the shift register, and the optical signal load accumulated in the picture element electrode group of the second series is allocated to the second series.
The optical signal charges accumulated in the pixel electrodes in one set of two rows adjacent to each other in the vertical scanning direction are simultaneously read out for each field by transferring the pre-distributed water to the shift register toward the 1,000-CD shift register. A stacked CCD solid-state image sensor characterized by: