JP4075988B2 - Charge transfer device and solid-state imaging device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a charge transfer device and a solid-state imaging device using the charge transfer device, and more particularly to a charge discharge structure of the charge transfer device.
[0002]
[Prior art]
Conventionally, in a solid-state imaging device using a charge transfer device, for example, a charge discharge circuit for discharging a signal charge to the outside is provided on a vertical charge transfer device, and a signal charge of an arbitrary horizontal line of a photoelectric conversion element is selected. Thinning out is performed. (For example, refer to Patent Document 1.)
FIG. 5 is a diagram illustrating a charge discharging structure in a charge transfer device of a conventional solid-state imaging device. FIG. 5A is a plan view showing a charge discharging structure in a charge transfer device of a conventional solid-state imaging device.
[0003]
The solid-state imaging device 200 includes a large number of photoelectric conversion elements 81 arranged in a square matrix, a plurality of columns of vertical charge transfer devices (VCCD) 82, a horizontal charge transfer device (HCCD) 83, and an output circuit 84. .
[0004]
The signal charge 87 accumulated in the photoelectric conversion element 81 is vertically transferred from the upper side to the lower side by the adjacent vertical charge transfer device 82. The horizontal charge transfer device 83 receives in parallel the signal charges 87 transferred by the plurality of columns of vertical charge transfer devices 82 and sequentially transfers them to the output circuit 84. The output circuit 84 outputs the signal charge 87 transferred by the horizontal charge transfer device 83 to the outside of the solid-state imaging device 200.
[0005]
A charge discharging circuit 90 is formed in the vicinity of the horizontal charge transfer device 83 at the end of the vertical charge transfer device 82. The charge discharge circuit 90 includes a transfer path 91, a discharge control gate 93, and a discharge drain 95, and can discharge the signal charge 87 transferred by the vertical charge transfer device 82 to the outside of the solid-state imaging device 200.
[0006]
FIG. 5B is a schematic cross-sectional view showing the configuration of the charge discharging circuit 90.
[0007]
The transfer path 91 is formed above the transfer channel 91c with an n-type transfer channel (hereinafter simply referred to as a transfer channel) 91c formed on the surface of the p-well (or p-type substrate) 85 and an insulating film 86 interposed therebetween. The transfer electrode 91e forms one transfer stage of the vertical charge transfer device 82. The transfer voltage supply line 92 supplies the control voltage Φvn to the transfer electrode 91e.
[0008]
The discharge control gate 93 is formed above the discharge channel 93 c, which is a region sandwiched between the transfer channel 91 c of the transfer path 91 and the n-type region formed as the discharge drain 95, and the insulating film 86. And a discharge control gate electrode 93e. The discharge control gate 93 is controlled to be turned on / off by a control voltage Φrc supplied by a discharge control voltage supply line 94. The control voltage Φrc is on when it is in a high level state and off when it is in a low level state.
[0009]
The discharge drain 95 is an n-type region formed on the surface of a p-well (or p-type substrate) 85, and is a drain for discharging the signal charge 87 from the vertical charge transfer device 82 (transfer path 91). It is. The drain voltage supply line 96 supplies the drain voltage Vdr to the drain 95.
[0010]
FIG. 5C is a potential distribution diagram formed in the semiconductor of the charge discharging circuit 90 shown in FIG.
[0011]
The potential 97 is the channel potential of the transfer channel, the potential 98off is the channel potential when the discharge operation of the discharge channel 93c is off (the control voltage Φrc is low level), the potential 98on is the discharge operation of the discharge channel 93c (the control voltage Φrc is high level). ) Channel potential, the potential 99 indicates the drain potential of the charge discharge drain 95.
[0012]
During the normal operation of the solid-state imaging device 200, the charge discharge control electrode 93e maintains an off state (the control voltage Φrc is at a low level), and the signal charge 87 transferred through the vertical charge transfer path 82 is not discharged outside. Then, it is transferred to the horizontal charge transfer device 83. Here, as necessary, when the signal charge 87 is transferred to the transfer channel 91c, the charge discharge control electrode 93e is turned on (the control voltage Φrc is at a high level), and is indicated by a dotted arrow in the figure. As described above, the signal charge 87 can be discharged from the transfer channel 91c to the charge discharge drain 95 via the discharge channel 93c.
[0013]
According to the above-described discharging operation, since it is performed at a time by the plurality of charge discharging circuits 90 arranged in parallel, by switching on / off of the charge discharging control electrode 93e at a specific timing, the photoelectric conversion element 81 The signal charges of one selected horizontal line can be selectively thinned out.
[0014]
[Patent Document 1]
JP-A-6-338524
[0015]
[Problems to be solved by the invention]
In general, a potential barrier 89 as shown in FIG. 5C may exist in the transfer channel 91c with a certain probability due to, for example, processing variations. If the potential barrier 89 is present, a certain amount or less of charge cannot be discharged to the charge discharge drain 95. In this case, in the above-described charge discharge circuit 90, when the charge discharge control electrode 93e is turned on and the signal charge 87 is discharged to the charge discharge drain 95, the transfer channel 91c having the potential barrier 89 has the potential barrier 89. As a result, the signal charge 87 may be left behind. The signal charge left here is output from the vertical charge transfer path 82 via the horizontal charge transfer device 83 after the discharge operation is completed.
[0016]
For example, when all the signal charges are discharged to the charge discharge drain 95 by the charge discharge circuit 90, the remaining discharge charges are output to the vertical line where the potential barrier 89 exists, and appear as a white line on the reproduction screen. This phenomenon appears as an image in which a white line is superimposed on a signal even in the case of a well-known vertical 1/2 line thinning with a digital still camera or the like, and the image quality is significantly deteriorated.
[0017]
An object of the present invention is to suppress the occurrence of vertical lines due to residual charge transfer caused by potential barriers or potential variations that exist probabilistically in a transfer channel of a vertical charge transfer device included in a charge discharging circuit.
[0018]
[Means for Solving the Problems]
According to one aspect of the present invention, the charge transfer device includes a plurality of transfer stages each formed by a transfer path including a transfer channel and a charge transfer electrode formed above the transfer channel. A plurality of vertical charge transfer devices arranged in parallel; It is disposed near the end of each of the vertical charge transfer devices, and includes the transfer path, A first charge discharging circuit for discharging signal charges transferred by the vertical charge transfer device; Arranged near the end of each of the vertical charge transfer devices, including a transfer path that forms a transfer stage different from the transfer stage of the transfer path included in the first charge discharging circuit, A second charge discharging circuit for discharging a signal charge transferred by the vertical charge transfer device; and an output circuit for outputting the signal charge transferred by the vertical charge transfer device to the outside.
[0019]
According to another aspect of the present invention, a solid-state imaging device includes a semiconductor substrate, a large number of photoelectric conversion elements that are formed in a matrix on the semiconductor substrate, and store signal charges, and are formed above the semiconductor substrate. A plurality of vertical charge transfer devices each having a plurality of transfer stages each formed by a transfer channel formed by a transfer channel and a charge transfer electrode formed above the transfer channel, , It is disposed near the end of each of the vertical charge transfer devices, and includes the transfer path, A first charge discharging circuit for discharging signal charges transferred by the vertical charge transfer device; Arranged near the end of each of the vertical charge transfer devices, including a transfer path that forms a transfer stage different from the transfer stage of the transfer path included in the first charge discharging circuit, A charge transfer device having a second charge discharge circuit for discharging a signal charge transferred by the vertical charge transfer device, and an output circuit for outputting the signal charge transferred by the vertical charge transfer device to the outside; The signal charges accumulated in the photoelectric conversion elements in a predetermined row and a predetermined column can be discharged.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a diagram showing a charge discharging structure in the vertical charge transfer device 2 of the solid-state imaging device 101 according to the first embodiment of the present invention.
[0021]
FIG. 1A is a plan view showing a charge discharging structure in the vertical charge transfer device 2 of the solid-state imaging device 101.
[0022]
The solid-state imaging device 101 includes a large number of photoelectric conversion elements 1 arranged in a square matrix, a plurality of vertical charge transfer devices (VCCDs) 2 formed adjacent to each column of the photoelectric conversion elements 1, and a plurality of vertical columns. A horizontal charge transfer device (HCCD) 3 formed at one end of the charge transfer device 2 and an output circuit 4 connected to one end of the horizontal charge transfer device 3 are configured.
[0023]
The signal charge 7 accumulated in the photoelectric conversion element 1 is vertically transferred from the upper side to the lower side by the adjacent vertical charge transfer device 2. The horizontal charge transfer device 3 receives in parallel the signal charges 7 transferred by the plurality of columns of vertical charge transfer devices 2 and sequentially transfers them to the output circuit 4. The output circuit 4 outputs the signal charge 7 transferred by the horizontal charge transfer device 3 to the outside of the solid-state imaging device 101.
[0024]
In the vicinity of the horizontal charge transfer device 3 at the end of the vertical charge transfer device 2, a first charge discharge circuit 10 and a second charge discharge circuit 20 are formed vertically. The first charge discharging circuit 10 includes a transfer path 11, a discharge control gate 13, and a discharge drain 15, and selectively converts the signal charge 7 that is photoelectrically converted at a predetermined position and transferred by the vertical charge transfer device 2. It can be discharged outside the solid-state imaging device 101. The second charge discharge circuit 20 includes a transfer path 21, a discharge control gate 23, and a discharge drain 25, and discharges the signal charge 8 left in the first charge discharge circuit 10 to the outside of the solid-state imaging device 101. can do.
[0025]
FIG. 1B is a schematic cross-sectional view showing the configuration of the first charge discharging circuit 10.
[0026]
The transfer path 11 is formed above the transfer channel 11c with an n-type transfer channel (hereinafter simply referred to as a transfer channel) 11c formed on the surface of the p-well (or p-type substrate) 5 and the insulating film 6 interposed therebetween. The transfer electrode 11e forms one transfer stage of the vertical charge transfer device 2. The transfer voltage supply line 12 supplies the first transfer control voltage Φvn1 to the transfer electrode 11e.
[0027]
The discharge control gate 13 is formed above the discharge channel 13 c, which is a region sandwiched between the transfer channel 11 c of the transfer path 11 and the n-type region formed as the discharge drain 15, and the insulating channel 6. And a discharge control gate electrode 13e. The discharge control gate 13 is controlled to be turned on / off by the first discharge control voltage Φrc1 supplied by the discharge control voltage supply line 14. The first discharge control voltage Φrc1 is on when it is in a high level state, and is off when it is in a low level state.
[0028]
The discharge drain 15 is composed of an n-type region formed on the surface of the p-well (or p-type substrate) 5 and is a drain for discharging the signal charge 7 from the vertical charge transfer device 2 (transfer path 11) to the outside. It is. The drain voltage supply line 16 supplies the first drain voltage Vdr1 to the discharge drain 15.
[0029]
FIG. 1C is a potential distribution diagram formed in the semiconductor of the first charge discharging circuit 10 shown in FIG.
[0030]
The potential 17 is the channel potential of the transfer channel, the potential 18off is the channel potential when the discharge operation of the discharge channel 13c is off (the control voltage Φrc1 is low level), the potential 18on is the discharge operation of the discharge channel 13c (the control voltage Φrc1 is high level). ) Channel potential, the potential 19 indicates the drain potential of the charge discharge drain 15.
[0031]
During the normal operation of the solid-state imaging device 101, the charge discharge control electrode 13e is kept off (the control voltage Φrc1 is at a low level), and the signal charge 7 transferred through the vertical charge transfer path 2 is not discharged outside. Then, it is transferred to the horizontal charge transfer device 3. Here, as necessary, when the signal charge 7 is transferred to the transfer channel 11c, the charge discharge control electrode 13e is turned on (the control voltage Φrc1 is at the high level), and is indicated by a dotted arrow in the figure. Thus, the signal charge 7 can be discharged from the transfer channel 11c to the charge discharge drain 15 through the discharge channel 13c.
[0032]
According to the above-described discharge operation, the signal charge photoelectrically converted by the photoelectric conversion element 1 at a predetermined position can be selectively thinned by switching on / off the charge discharge control electrode 13e at a specific timing.
[0033]
Here, for example, if the potential barrier 9 is present in the transfer channel 11c of the first charge discharging circuit 10, all the signal charges 7 cannot be discharged, and the remaining discharge charges 8 (FIG. 1E). ) May remain in the transfer channel 11c. In the present embodiment, the discharge remaining charge 8 (FIG. 1E) is discharged to the outside by the second charge discharge circuit 20.
[0034]
FIG. 1D is a schematic cross-sectional view showing the configuration of the second charge discharging circuit 20.
[0035]
The transfer path 21 is formed above the transfer channel 21c with the n-type transfer channel (hereinafter simply referred to as transfer channel) 21c formed on the surface of the p-well (or p-type substrate) 5 and the insulating film 6 interposed therebetween. The transfer electrode 21e forms one transfer stage of the vertical charge transfer device 2. The transfer voltage supply line 22 supplies the second transfer control voltage Φvn2 to the transfer electrode 21e.
[0036]
The discharge control gate 23 is formed above the discharge channel 23 c, which is a region sandwiched between the transfer channel 21 c of the transfer path 21 and the n-type region formed as the discharge drain 25, and the insulating channel 6. And a discharge control gate electrode 23e. The discharge control gate 23 is controlled to be turned on / off by the second discharge control voltage Φrc2 supplied by the discharge control voltage supply line 24. The second discharge control voltage Φrc2 is on when it is in a high level state and off when it is in a low level state.
[0037]
The discharge drain 25 is composed of an n-type region formed on the surface of the p-well (or p-type substrate) 5, and is left uncharged from the vertical charge transfer device 2 (transfer path 21) (FIG. 1E). Is a drain for discharging the gas to the outside. The drain voltage supply line 26 supplies the second drain voltage Vdr2 to the discharge drain 25.
[0038]
FIG. 1E is a potential distribution diagram formed in the semiconductor of the second charge discharging circuit 20 shown in FIG.
[0039]
The potential 27 is the channel potential of the transfer channel, the potential 28off is the channel potential when the discharge operation of the discharge channel 23c is off (the control voltage Φrc2 is low level), the potential 28on is the discharge operation of the discharge channel 23c (the control voltage Φrc2 is high level). ) Channel potential, the potential 29 indicates the drain potential of the charge discharge drain 25.
[0040]
During the normal operation of the solid-state imaging device 101, the charge discharge control electrode 23e maintains an off state (the control voltage Φrc2 is at a low level), and the signal charge 7 transferred through the vertical charge transfer path 2 is not discharged to the outside. Then, it is transferred to the horizontal charge transfer device 3. Here, after the charge discharging operation by the first charge discharging circuit 10 (after transferring the undischarged charge 8 to the transfer channel 21c), the charge discharging control electrode 23e is turned on (the control voltage Φrc2 is at the high level). As shown by the dotted arrow in the figure, the unremoved charge 8 can be discharged from the transfer channel 21c to the charge discharge drain 25 via the discharge channel 23c.
[0041]
As described above, in the first embodiment of the present invention, the second charge discharging circuit 20 is provided in the lower stage of the first charge discharging circuit 10, so that the remaining discharge left by the first charge discharging circuit 10 is left. The charge 8 can be discharged by the second charge discharging circuit 20. Therefore, the discharge remaining charge 8 can be almost completely eliminated.
[0042]
However, since the probability that the potential barrier 9 exists in the first charge discharging circuit 10 and the probability that the potential barrier 9 exists in the second charge discharging circuit 20 are considered to be equivalent, the first of the present invention. The charge remaining probability of charge discharge according to the embodiment is not “0”. However, when the charge leaving probability of each of the charge discharging circuits 10 and 20 is “1/100”, the probability that charges are left in both the first charge discharging circuit 10 and the second charge discharging circuit 20 is “1”. / 10,000 "and a significant improvement effect can be obtained.
[0043]
In the embodiment, only the first charge discharging circuit 10 and the second charge discharging circuit 20 are provided, but a third charge discharging circuit can be further provided. In this case, if the charge leaving probability of each charge discharging circuit is “1/100”, the probability that charges are left in all of the first to third charge discharging circuits is “1 / 1,000,000”. In practice, the probability of charge remaining after discharging is almost as close as “0”.
[0044]
The configuration shown in FIG. 1A is the same as that of a known square array CCD solid-state imaging device except for the first charge discharging circuit 10 and the second charge discharging circuit 20.
[0045]
FIG. 2 is a diagram showing a charge discharging structure in the vertical charge transfer device 2 of the solid-state imaging device 102 according to the second embodiment of the present invention.
[0046]
FIG. 2A is a plan view showing a charge discharging structure in the vertical charge transfer device 2 of the solid-state imaging device 102. FIG. The solid-state imaging device 102 according to the second embodiment differs from the first embodiment described above in that the charge discharging directions of the first charge discharging circuit 10 and the second charge discharging circuit 30 are different from each other. Since other structures and operations are the same as those of the first embodiment, description thereof is omitted.
[0047]
FIG. 2B is a schematic cross-sectional view showing the configuration of the first charge discharge circuit 10, and FIG. 2D is a schematic cross-sectional view showing the configuration of the second charge discharge circuit 30. The configuration of the first charge discharging circuit 10 is the same as the configuration of the charge discharging circuit 10 shown in FIG. Further, the second charge discharging circuit 30 is different from the charge discharging circuit 20 shown in FIG. 1D only in that the positional relationship between the members is different from that of the charge discharging circuit 20 shown in FIG. Is omitted.
[0048]
As shown in FIGS. 2B and 2D, in the first charge discharge circuit 10, the discharge control gate 13 is located on the left side with respect to the transfer path 11, and the signal charge 7 is transferred to the left drain. 15 is discharged. On the other hand, in the second charge discharging circuit 30, the discharge control gate 33 is positioned on the right side with respect to the transfer path 31, and the remaining signal charge 8 is discharged to the right drain 35.
[0049]
The advantages of reversing the charge discharging directions of the first charge discharging circuit 10 and the second charge discharging circuit 30 in this way will be described with reference to the potential distribution diagrams shown in FIGS. 2 (C) and 2 (E). I will explain.
[0050]
When the electron barrier 9 extends along the vertical direction in the vertical charge transfer device 2 (transfer channels 11c and 31c), the transfer channel 11c is present on the discharge channel 13c side as shown in FIG. In the channel 31c, it exists on the opposite side of the discharge channel 33c. In such a case, if the charge discharging directions of the first charge discharging circuit 10 and the second charge discharging circuit 20 are the same as in the first embodiment, it is not possible to eliminate the remaining discharge of charges. However, as in the second embodiment, the remaining charge 8 is removed from the first charge discharging circuit 10 by reversing the charge discharging directions of the first charge discharging circuit 10 and the second charge discharging circuit 30. Can be discharged to the discharge drain 35 in the opposite direction.
[0051]
Therefore, according to the second embodiment of the present invention, charge remaining by the charge discharging circuit can be greatly reduced even when a potential barrier having a spatial correlation exists.
[0052]
FIG. 3 is a diagram showing a charge discharging structure in the vertical charge transfer device 2h of the solid-state imaging device 103 according to the third embodiment of the present invention.
[0053]
FIG. 3A is a plan view showing a charge discharging structure in the vertical charge transfer device 2 of the solid-state imaging device 103. FIG.
[0054]
The photoelectric conversion elements 1h of the solid-state imaging device 103 are arranged in a matrix with a so-called pixel shift arrangement or a honeycomb arrangement. That is, the pixels in the odd rows and the pixels in the even rows are arranged with a half pitch shift in the horizontal direction, and the pixels in the odd column and the pixels in the even column are arranged with a half pitch shift in the vertical direction.
[0055]
The photoelectric conversion element 1h is basically a rhombus, but has a chamfered shape (strictly, an octagon). By adopting the rhombic pixels in the honeycomb arrangement, the ineffective area can be reduced and the width of the transfer path of the vertical charge transfer device (VCCD) 2h can be formed wide. A plurality of columns of vertical charge transfer devices (VCCDs) 2h arranged along the photoelectric conversion elements 1h in each column are formed by meandering in the vertical direction along the shape of the photoelectric conversion elements 1h.
[0056]
The signal charge 7 accumulated in the photoelectric conversion element 1h is vertically transferred from the upper side to the lower side of the drawing by the adjacent vertical charge transfer device 2h. The horizontal charge transfer device 3 receives in parallel the signal charges 7 transferred by the plurality of columns of vertical charge transfer devices 2 and sequentially transfers them to the output circuit 4. The output circuit 4 outputs the signal charge 7 transferred by the horizontal charge transfer device 3 to the outside of the solid-state imaging device 103.
[0057]
By providing a transfer stage 71 inclined to the vertical as shown in the figure in the vicinity of the horizontal charge transfer device 3 at the end of the vertical charge transfer device 2h, the two adjacent vertical charge transfer devices 2h in the horizontal direction are brought close to each other. Thus, the first charge discharging circuit 40 is formed in the enlarged space. The first charge discharging circuit 40 includes transfer paths 41L and 41R of the left and right vertical charge transfer devices 2h, left and right discharge control gates 43L and 43R, and one discharge drain 45, and is adjacent to the left and right in the horizontal direction. The signal charge 7 transferred by the vertical charge transfer device 2h can be discharged to the outside of the solid-state imaging device 103. That is, two adjacent vertical charge transfer devices 2h share one discharge drain 45.
[0058]
Further, as shown in the figure, a transfer stage 72 inclined in the direction opposite to the transfer stage 71 with respect to the vertical is provided at the rear stage of the first charge discharging circuit 40, and the space expanded by the inclined transfer stage 72. In addition, a second charge discharging circuit 50 having a charge discharging direction different from that of the first charge discharging circuit 40 is formed.
[0059]
FIG. 3B is a schematic cross-sectional view showing the configuration of the first charge discharging circuit 40. The second charge discharging circuit 50 is different from the first charge discharging circuit 40 in that it corresponds to the vertical charge transfer circuit 2h shifted by one column in the horizontal direction, and the other configuration and operation are substantially the same. Since there is, explanation is omitted.
[0060]
On both sides of the discharge drain 45, discharge control gates 43L and 43R each formed by a discharge control electrode 43e and a discharge channel 43c are formed, and further, outside the discharge control gates 43L and 43R, respectively, are transfer electrodes. Transfer paths 41L and 41R composed of 41e and transfer channel 41c are formed. The signal charges 7 of the transfer paths 41L and 41R are discharged from the same discharge drain 45 by the discharge control gates 43L and 43R which are simultaneously turned on.
[0061]
FIG. 3C is a potential distribution diagram formed in the semiconductor of the first charge discharging circuit 40 shown in FIG.
[0062]
The potential 47 is the channel potential of the transfer channel 41c, the potential 48off is the channel potential when the discharge operation of the discharge channel 43c is off (the control voltage Φrc3 is low level), the potential 48on is the discharge operation of the discharge channel 43c (the control voltage Φrc3 is high). The channel potential at the time of level) 49 indicates the drain potential of the charge discharge drain 45.
[0063]
When the signal charge 7 is transferred to the left and right transfer channels 41c, the left and right charge discharge control electrodes 43e are turned on (the control voltage Φrc3 is at the high level), so that the left and right charge discharge control electrodes 43e are turned on as shown by the dotted arrows in the figure. The signal charge 7 can be discharged from the left and right transfer channels 41c to the charge discharge drain 45 located in the center via the discharge channel 43c.
[0064]
The second charge discharging device 50 can perform the same operation, and discharge the remaining charge of the first charge discharging device 40 in the reverse charge discharging direction from the first charge discharging circuit 40.
[0065]
As described above, in the third embodiment of the present invention, the two vertical charge transfer devices 2h share one discharge drain 45, so the number of drains is halved and the horizontal integration degree is greatly increased. Can be increased. Further, when the second charge discharging circuit 50 having a different charge discharging direction is provided at the lower stage of the first charge discharging circuit 40, a potential barrier having a spatial correlation exists as in the second embodiment. In addition, it is possible to significantly reduce the charge remaining by the charge discharging circuit.
[0066]
By sharing the discharge drain 45, the number of drains is halved compared to the first and second embodiments described above, but in reality, the discharge drain cannot be shared for the vertical charge transfer devices at both ends. In some cases, the number of drains is about ½.
[0067]
FIG. 4 is a plan view showing a charge discharging structure in the solid-state imaging device 104 according to the fourth embodiment of the present invention. The description of the same configuration and function as those of the third embodiment will be omitted, and only the differences will be described below.
[0068]
The difference from the third embodiment is that the first charge discharging circuit 60 and the second charge discharging circuit 70 are formed in the same space. In this case, as shown in the figure, the discharge drains of the first charge discharge circuit 60 and the second charge discharge circuit 70 can be integrated into one discharge drain 65. Therefore, according to the fourth embodiment of the present invention, the degree of integration in the vertical direction as well as the horizontal direction can be significantly increased.
[0069]
As described above, according to the embodiment of the present invention, there is a problem in selectively discharging signal charges transferred through the vertical charge transfer device by providing a plurality of charge discharge circuits for one vertical charge transfer device. Therefore, it is possible to drastically reduce the remaining charge discharge.
[0070]
For example, if η is the probability that one charge discharging circuit will be left behind, the probability of charge remaining when n charge discharging devices are provided for one vertical charge transfer device is the nth power of η. Decrease. Here, η <1, n ≧ 2 (n is an integer).
[0071]
In each of the first to fourth embodiments described above, an example in which two charge discharging devices are provided has been described. However, by providing three or more charge discharging devices, there is still a charge left behind. Isolation can be reduced.
[0072]
In the first and second embodiments, a square array CCD solid-state imaging device has been described as an example. In the third and fourth embodiments, a pixel shift array CCD solid-state imaging device has been described as an example. The first and second embodiments can be applied to a pixel-shifted CCD solid-state imaging device, and the third and fourth embodiments can be applied to a square-array CCD solid-state imaging device.
[0073]
Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.
[0074]
【The invention's effect】
As described above, according to the present invention, the generation of vertical lines due to residual charge transfer due to potential barriers or potential variations that exist probabilistically in the transfer channel of the vertical charge transfer device included in the charge discharging circuit. Can be suppressed.
[Brief description of the drawings]
FIG. 1 is a diagram showing a charge discharging structure in a vertical charge transfer device 2 of a solid-state imaging device 101 according to a first embodiment of the present invention.
FIG. 2 is a diagram illustrating a charge discharging structure in the vertical charge transfer device 2 of the solid-state imaging device 102 according to the second embodiment of the present invention.
FIG. 3 is a diagram showing a charge discharging structure in a vertical charge transfer device 2h of a solid-state imaging device 103 according to a third embodiment of the present invention.
FIG. 4 is a diagram showing a charge discharging structure in a vertical charge transfer device 2h of a solid-state imaging device 104 according to a fourth embodiment of the present invention.
5 is a diagram showing a charge discharging structure in a vertical charge transfer device of a conventional solid-state imaging device 200. FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Photoelectric conversion element, 2 ... Vertical charge transfer apparatus, 3 ... Horizontal charge transfer apparatus, 4 ... Output circuit, 5 ... P well, 6 ... Insulating film, 7 ... Signal charge, 8 ... Left signal charge, 9 ... Potential barrier DESCRIPTION OF SYMBOLS 10, 40, 60 ... 1st electric charge discharge circuit, 20, 30, 50, 70 ... 2nd electric charge discharge circuit, 11, 21, 31, 41 ... Transfer path, 12, 22, 32 ... Transfer voltage supply line, 13, 23, 33, 43 ... discharge control gate, 14, 24, 34 ... discharge control voltage supply line, 15, 25, 35, 45 ... discharge drain, 16, 26, 36 ... Drain voltage supply line, 71, 72 ... Transfer stage, 101-104 ... Solid-state imaging device

Claims (6)

A plurality of vertical charge transfer devices arranged in parallel, each having a plurality of transfer stages formed by a transfer path formed by a transfer channel and a charge transfer electrode formed above the transfer channel;
A first charge discharging circuit disposed near the end of each of the vertical charge transfer devices, including the transfer path, and discharging a signal charge transferred by the vertical charge transfer device;
The vertical charge transfer device is configured to include a transfer path that is disposed near the end of each of the vertical charge transfer devices and forms a transfer stage different from the transfer stage of the transfer path included in the first charge discharging circuit. A second charge discharging circuit for discharging signal charges transferred by the device;
A charge transfer device comprising: an output circuit for outputting signal charges transferred by the vertical charge transfer device to the outside.   2. The charge according to claim 1, wherein each of the first charge discharge circuit and the second charge discharge circuit includes a charge discharge drain and a discharge control electrode disposed between the charge discharge drain and the transfer channel. Transfer device.   The charge transfer device according to claim 1 or 2, wherein a charge discharge direction of the first charge discharge circuit and a charge discharge direction of the second charge discharge circuit corresponding to the same vertical charge transfer device are opposite to each other. . 3. The charge transfer device according to claim 2, wherein the first charge discharge circuit and the second charge discharge circuit corresponding to the same vertical charge transfer device share a charge discharge drain. The first charge discharging circuit and the first charge disposed in the vicinity of the end of the vertical charge transfer device adjacent to one of the horizontal directions of the vertical charge transfer device in which the first charge discharging circuit is disposed. And the discharge circuit share the charge discharge drain,
  Arranged near the end of the vertical charge transfer device arranged adjacent to the one or the other in the horizontal direction of the second charge discharge circuit and the vertical charge transfer device in which the second charge discharge circuit is arranged The charge transfer device according to claim 2, wherein the second charge discharging circuit to be shared shares the charge discharging drain. A semiconductor substrate;
A number of photoelectric conversion elements that are formed in a matrix on the semiconductor substrate and accumulate signal charges;
The charge transfer device according to any one of claims 1 to 5,
A solid-state image pickup device capable of discharging signal charges accumulated by the photoelectric conversion elements in predetermined rows and predetermined columns.

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