JPS5961286A - Sound multiplexing system - Google Patents

Sound multiplexing system

Info

Publication number
JPS5961286A
JPS5961286A JP57172359A JP17235982A JPS5961286A JP S5961286 A JPS5961286 A JP S5961286A JP 57172359 A JP57172359 A JP 57172359A JP 17235982 A JP17235982 A JP 17235982A JP S5961286 A JPS5961286 A JP S5961286A
Authority
JP
Japan
Prior art keywords
signal
circuit
code
audio signal
sound signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57172359A
Other languages
Japanese (ja)
Other versions
JPS633512B2 (en
Inventor
Yoshiji Nishizawa
西沢 美次
Kiichi Matsuda
松田 喜一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57172359A priority Critical patent/JPS5961286A/en
Publication of JPS5961286A publication Critical patent/JPS5961286A/en
Publication of JPS633512B2 publication Critical patent/JPS633512B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/06Systems for the simultaneous transmission of one television signal, i.e. both picture and sound, by more than one carrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Receiver Circuits (AREA)

Abstract

PURPOSE:To multiplex a sound signal to a picture signal, by displaying the existence of the sound signal by using the uppermost bit, multiplexing the sound signal to the picture signal, and on the receiving side, discriminating the code indicating the existence of the sound signal to separate the sound signal. CONSTITUTION:On the transmitting side, an analog sound signal (b) applied to an input terminal 2 is converted into a digital signal (h) by an A/D converter 4 and the digital signal (h) is applied to a parallel/series converting circuit 9. The circuit 9 applies a signal (k) obtained by converting the digital sound signal into a series signal to a multiplexing circuit 11, which inverts the uppermost bit of the shortest code and adds the sound signal to the shortest code to multiplex the signals. On the receiving side, a multiplexed signal (n) applied to an input terminal 21 is added to a variable length decoding circuit 22 and a detecting circuit 23 and the circuit 23 detects a signal ''0111'' indicating the existence of the sound signal from the multiplexed signal (n). A separating circuit 24 can separate the sound signal following the signal ''0111'' obtained before decoding. Consequently, the sound signal can be multiplexed to the picture signal without constituting a frame.

Description

【発明の詳細な説明】 発明の技術分野 本発明は、デイジクル信号に変換したTV信号その他の
画像信号に、デイジタル信号に変換した音声信号を多重
化して伝送する音声多重化方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an audio multiplexing method for multiplexing and transmitting an audio signal converted into a digital signal onto a TV signal or other image signal converted into a digital signal.

従来技術と問題点 従来、画像信号に音声信号をデイジクル多重化して伝送
する場合、フレーム構成とするのが一般的であった。即
ち第1図に示すように、フレームの先頭を示す同期信号
Fと音声信号Sと画像信号VDとにより1フレiムを構
成するものであり、音声信号SはM信号VDに比較して
低速であるから、少ないビット数が割当てられている。
Prior Art and Problems Conventionally, when an audio signal is multiplexed onto an image signal and transmitted, it has generally been a frame configuration. That is, as shown in FIG. 1, one frame i is composed of a synchronization signal F indicating the beginning of the frame, an audio signal S, and an image signal VD, and the audio signal S is slower than the M signal VD. Therefore, a small number of bits are allocated.

受信側では同期信号Fを検出して同期化を行い、同期信
号Fの次の音声信号Sとその次の画像信号VDとを分離
するものである。従ってフレームの先頭を同期信号Fの
検出で識別する回路や音声信号Sを画像信号VDから分
離する為のハツファメモリ等を必要とし、送信側と受信
側との回路規模が大きくなる欠点があった。
On the receiving side, the synchronization signal F is detected and synchronized, and the audio signal S that follows the synchronization signal F and the image signal VD that follows it are separated. Therefore, a circuit for identifying the beginning of a frame by detecting the synchronization signal F and a memory for separating the audio signal S from the image signal VD are required, which has the drawback of increasing the circuit scale on the transmitting side and the receiving side.

発明の目的 本発明は、フレーム構成を必要とすることなく、画像信
号に音声信号を多重化して伝送することができるように
することを目的とするものである。以下実施例について
詳細に説明する。
OBJECTS OF THE INVENTION It is an object of the present invention to make it possible to multiplex an audio signal with an image signal and transmit the multiplexed image signal without requiring a frame structure. Examples will be described in detail below.

発明の実施例 第2図は本発明の実施例の送信側の要部プロツク図であ
り、■は画像信号の入力端子、2は音声信号の入力端子
、3.4はアナログ信号をデイジタル信号に変換するA
D変換器、5はクロック発生器、6は差分符号化回路、
7ば可変長符号化回路、8は分周回路、9は並列直列変
換回路、10は音声信号の挿入タイミング信号を発生す
るタイミング発生回路、11は多重化回路、12は多重
化信号の出力端子である。この実施例は、画像信号を差
分符号化し、その発生確率に応じて符号の長さを変化さ
せる可変符号化方式を採用した場合についてのものであ
る。
Embodiment of the Invention Fig. 2 is a block diagram of the main part of the transmitting side of the embodiment of the invention, where ■ is an input terminal for an image signal, 2 is an input terminal for an audio signal, and 3.4 is a block diagram for converting an analog signal into a digital signal. A to convert
D converter, 5 is a clock generator, 6 is a differential encoding circuit,
7 is a variable length encoding circuit; 8 is a frequency dividing circuit; 9 is a parallel-to-serial conversion circuit; 10 is a timing generation circuit that generates an insertion timing signal for audio signals; 11 is a multiplexing circuit; and 12 is an output terminal for multiplexed signals. It is. This embodiment is a case where an image signal is differentially encoded and a variable encoding method is adopted in which the length of the code is changed depending on the probability of occurrence.

クロツク発生器5は例えば1 0 M H zの周波数
のクロツクCを発生ずるものであり、分周回路8ば例え
ばそのクロツクを分周して10KHzのクロツクdとす
るものである。即ちクロツク発生器5は人力端子1に加
えられる画像信号のザンブリング周波数のクロツクを発
生し、分周回路8により入力端子2に加えられる音声信
号のサンプリング周波数のクロックとするものである。
The clock generator 5 generates a clock C having a frequency of, for example, 10 MHz, and the frequency divider circuit 8 divides the frequency of the clock to generate a clock d of 10 KHz, for example. That is, the clock generator 5 generates a clock at the sampling frequency of the image signal applied to the input terminal 1, which is used as a clock at the sampling frequency of the audio signal applied to the input terminal 2 by the frequency dividing circuit 8.

なおクロツク発生器5の出力を分周して画像信号の所望
のサンプリング周波数のクロックとすることも勿論可能
である。
Of course, it is also possible to frequency-divide the output of the clock generator 5 to obtain a clock having a desired sampling frequency of the image signal.

アナログの画像信号aはAD変換器3によりクロツクC
に従ってサンプリングされてデイジタル信号eに変換さ
れ、差分符号化回路6に加えられる。この差分符号化回
路6はデイジタル信号eの差分値を量子化した符号の信
号fを出力して可変長符号化回路7に加えるものである
。デイジタル化された画像信号の差分値は、画像信号の
性質上、第3図に示すように、0を中心として分布する
ものとなる。これを量子化して最も発生確率の高い0 
{=J近の値に最も短い符号を割当て、順次長い符号を
割当てることにより、伝送量を減少させることができる
ものであり、ゴV信号のデイジタル伝送等に於ける帯域
圧縮手段として既に知られている方式である。
The analog image signal a is sent to the clock C by the AD converter 3.
The digital signal e is sampled and converted into a digital signal e, which is applied to the differential encoding circuit 6. This differential encoding circuit 6 outputs a code signal f obtained by quantizing the difference value of the digital signal e, and applies it to the variable length encoding circuit 7. Due to the nature of the image signal, the difference values of the digitized image signal are distributed around 0, as shown in FIG. Quantize this to find 0, which has the highest probability of occurrence.
By assigning the shortest code to the value near {=J and sequentially assigning longer codes, the amount of transmission can be reduced, and is already known as a band compression means in digital transmission of GoV signals. This is a method that

第3図に於では、差分値が0付近の量子化信号Aに2ビ
ツ1・の“Ol” 、差分値がそれより大きい次の量子
化信号Bに3ビットの゛001”、次の量子化信号Cに
4ビットの”0001”、次の屋子化信号Dに5ビット
の“0000ビを割当てた場合を示している。可変長符
号化回路7レまこのような可変長符号に変換する動作を
行うものであり、既に知られている構成により容易に実
曳することができる。この可変長符号化回路7で変換さ
れた可変長符号の信号gは多重化回路11に加えられる
In Figure 3, the quantized signal A with a difference value near 0 has a 2-bit 1. “Ol”, the next quantized signal B with a larger difference value has a 3-bit “001”, and the next quantized signal This shows a case where 4 bits of "0001" are assigned to the conversion signal C, and 5 bits of "0000bi" are assigned to the next conversion signal D. The variable length encoding circuit 7 performs the operation of converting into such a variable length code, and can be easily implemented using a known configuration. The variable length code signal g converted by the variable length encoding circuit 7 is applied to the multiplexing circuit 11.

この実施例では、最も短い符号の2ビットの最上位ビッ
トを音声信号の挿入の有無を示すビットとして用いるも
のであり、例えば″01″の場合は音声信号無し、“1
l”の場合は音声信号有りとするものであって、多重化
回路11に於でタイミング発生回路10からの音声信号
挿入タイミング信号pに基づいて最上位ビットの制御が
行われる。
In this embodiment, the two most significant bits of the shortest code are used as bits indicating whether or not an audio signal is inserted. For example, "01" indicates no audio signal, and "1" indicates no audio signal.
In the case of "1", it is assumed that an audio signal is present, and the most significant bit is controlled in the multiplexing circuit 11 based on the audio signal insertion timing signal p from the timing generating circuit 10.

人力端子2に加えられたアナログの音声信冒bは、八1
〕変換器4によりクロツクdにfL’;>一でサンプリ
ングされてデイジタル信号hに変換さわ,、並列直列変
換回路9に加えられる。分周回路8の分同出力のクロツ
クdはAD変換器4及びタイミング発生回路10に加え
られるので、タイミング発生回路10ば音声信号の挿入
タイミング信号lを出力することができることになり、
このタイミング信号lは並列直列変換回路9及び多重化
回路11に加えられ、又可変長符号化回路7から最短符
号情報即ち可変長符号化したとき2ビツ1・である場合
の信号iがタイミング発生回路10に加えられるので、
音声信号挿入タイミング近傍に於ける最短符号情報が加
えられたときタイミング信号p.jを多重化回路11と
並列直列変換回路9とに加える。それにより並列直列変
換回路9はデイジタル音声信号を直列に変換した信号k
を 多重化回路11に加え、多重化回路11は最短符号
の最上位ビットを反転し、その最短符号の次に音声信号
を付加して多重化する。多重化された信号mは出力端子
12から送出される。デイジタル音声信号は、1ビツ1
・宛多重化することも又複数ヒ・シト宛多重化すること
も可能であり、予め定めた固定長のビツ1〜構成とする
ものである。
The analog audio signal b added to the human power terminal 2 is 81
] The signal is sampled by the converter 4 at fL'>1 on the clock d, and converted into a digital signal h, which is then applied to the parallel-serial conversion circuit 9. Since the divided output clock d of the frequency dividing circuit 8 is applied to the AD converter 4 and the timing generation circuit 10, the timing generation circuit 10 can output the audio signal insertion timing signal l.
This timing signal l is applied to the parallel-to-serial conversion circuit 9 and the multiplexing circuit 11, and from the variable length encoding circuit 7, the timing signal i is generated when the shortest code information, ie, 2 bits 1 when variable length encoded, is 1. Since it is added to the circuit 10,
When the shortest code information near the audio signal insertion timing is added, the timing signal p. j is added to the multiplexing circuit 11 and the parallel-to-serial conversion circuit 9. As a result, the parallel-to-serial conversion circuit 9 converts the digital audio signal into a serial signal k.
is added to the multiplexing circuit 11, the multiplexing circuit 11 inverts the most significant bit of the shortest code, adds an audio signal next to the shortest code, and multiplexes the signal. The multiplexed signal m is sent out from the output terminal 12. Digital audio signal is 1 bit 1
- It is possible to multiplex the data to multiple destinations or to multiplex the data to multiple sites, and has a predetermined fixed length of bits.

第4図は前述の動作説明図であり、音声信号の挿入周期
を]゛で示し、■は音声信号の1ビットを示ず。即ら周
期′F毎の最短符号を“11”として音声信号Vを挿入
して多重化するものである。この場合、周期T毎に最短
符号が丁度発生しないことがあるが、画像信号は音声信
号に比較して前述のように、約iooo倍の速度である
から、複数符号のずれがあっても実際上問題とはならな
い。
FIG. 4 is an explanatory diagram of the above-mentioned operation, in which the insertion period of the audio signal is shown by ], and 1 bit of the audio signal is not shown. That is, the shortest code for each cycle 'F is set to "11", and the audio signal V is inserted and multiplexed. In this case, the shortest code may not occur exactly every period T, but since the speed of the image signal is about iooo times faster than the audio signal as mentioned above, even if there is a shift in multiple codes, it is actually This is not a problem.

なお最短符号の発生確率が高いことによりほぼ周期T毎
に音声信号を挿入することができるものである。
Note that since the probability of occurrence of the shortest code is high, it is possible to insert an audio signal approximately every cycle T.

第4図に示す符号を直列に変換すると、第5図のように
なり、画像信号については、2ビット,3ビット,4ビ
ット.5ビットの区切りを順次行うことで符号識別が可
能であり、又4ビットの区切りで、” 0 1 1 1
 ’”のとき、音声信号有りを示す符号” l l″で
あることが識別できるので、その次の符号は音声信号で
あることが容易に判ることになる。即ち受信側では、“
0111”の4ビットを監視し、その4ビットが検出さ
れたとき、次のビットを音声信号として処理すれば良い
ことになる。
When the code shown in FIG. 4 is converted into serial data, it becomes as shown in FIG. 5, and the image signal is 2 bits, 3 bits, 4 bits, etc. Code identification is possible by sequentially dividing 5 bits, and by dividing 4 bits, "0 1 1 1
''', it can be identified that the code "l l" indicates the presence of an audio signal, so it is easy to know that the next code is an audio signal.In other words, on the receiving side, "
It is sufficient to monitor the four bits of "0111" and, when those four bits are detected, process the next bit as an audio signal.

第6図は本発明の実施例の受信側の要部ブロック図であ
り、21ば多重化信号の入力端子、22は可変長復号回
路、23は音声信号を挿入した符号を検出する検出回路
、24は画像信号から音声信号を分離する分離回路、2
5ば1友号回路、26はデイジタル信号をアナログ信号
に変換するI〕Δ変換器、27は直列並列変換回路、2
日はデイジタル信号をアナログ信号に変換するDA変換
器、29は画像信号の出力端子、30ば音声信号の出力
端子である。入力端子21に加えられた多重化信号nは
可変長復号回路22と検出回路23とに加えられ、検出
回路23により“Ol11”が多重化信号nの中から検
出され、その検出信号0が可変長復号回路22に加えら
れる。この可変長復号回路22は多重化信号nを復号し
て差分符号の信号pに復号するものであり、検出信号0
が加えられたとき、次の符号は音声信号であるから、そ
のまま復号することなく分離回路24に加える。
FIG. 6 is a block diagram of the main parts of the receiving side of the embodiment of the present invention, in which 21 is an input terminal for a multiplexed signal, 22 is a variable length decoding circuit, 23 is a detection circuit for detecting a code into which an audio signal is inserted; 24 is a separation circuit that separates the audio signal from the image signal;
5 ba 1 tomo circuit, 26 is an I] Δ converter that converts a digital signal to an analog signal, 27 is a serial-parallel converter circuit, 2
1 is a DA converter for converting a digital signal into an analog signal, 29 is an output terminal for an image signal, and 30 is an output terminal for an audio signal. The multiplexed signal n applied to the input terminal 21 is applied to the variable length decoding circuit 22 and the detection circuit 23, and the detection circuit 23 detects "Ol11" from the multiplexed signal n, and the detection signal 0 is variable. It is added to the long decoding circuit 22. This variable length decoding circuit 22 decodes the multiplexed signal n into a differential code signal p, and detects the detection signal 0.
Since the next code is an audio signal, it is added to the separation circuit 24 without being decoded.

又可変長復号回路22は復号した差分符号の符号長を示
す信号qを分離回路24に加える。
The variable length decoding circuit 22 also applies a signal q indicating the code length of the decoded differential code to the separation circuit 24.

分離回路24は可変長復号回路22の出力の差分符号信
号pから画像信号rと音声信号Sとを分離するもので、
検出信号0と符号長信号qと6こより、復号前の“′O
l1ビの後の音声信号を分離することができる。分離さ
れた画像信号rは差分符号信号であるから復号回路25
で復号されてデイジタル信号tとなり、DA変換器26
番こよりアナログの画像信号Uに変換されて出力端子2
9より出力される。又分811された音声信号Sは直列
並列変換回路27により並列信号Vに変換され、1〕A
変換器28によりアナログの音声信号Wに変換され、出
力端子30から出力される。
The separation circuit 24 separates the image signal r and the audio signal S from the differential code signal p output from the variable length decoding circuit 22.
From the detection signal 0 and code length signals q and 6, “'O” before decoding
The audio signal after l1bi can be separated. Since the separated image signal r is a differential code signal, the decoding circuit 25
is decoded into a digital signal t, which is sent to the DA converter 26
The signal is converted to an analog image signal U and output to terminal 2.
It is output from 9. The divided audio signal S is converted into a parallel signal V by the serial/parallel conversion circuit 27, and 1]A
It is converted into an analog audio signal W by the converter 28 and output from the output terminal 30.

前述のように、受信側では音声信号の挿入の有無を示す
符号により多重化信号nから音声信号・お容易に分離す
ることができる。又前述の実施例しよ、可変符号化して
伝送路符号とする場合につし)でのものであるが、画像
信号を固定長の符号番こ符号化して伝送する場合につい
てもその固定長の符号の最上位ビットを利用して音声信
号の挿入の有無を表示し、音声信号を挿入することがで
きる。
As described above, on the receiving side, the audio signal can be easily separated from the multiplexed signal n using the code indicating whether or not the audio signal is inserted. In addition, although the above-mentioned embodiment is a case where variable encoding is used to create a transmission path code, when an image signal is encoded into a fixed-length code number and transmitted, the fixed-length code can also be used. The most significant bit of the code is used to indicate whether or not an audio signal is to be inserted, and the audio signal can be inserted.

発明の効果 以上説明したように、本発明は、画像信号を伝送路符号
に変換するとき、最上位ビットを用いて音声信号の挿入
の有無を表示して、画像信号に音声信号を多重化し、受
信側では音声信号の挿入有りの符号を識別して、音声信
号を分離することができる。従ってフレーム構成とする
ことなく、画像信号に音声信号を多重化することができ
る。特に可変長符号化により画像信号を伝送する場合に
は、最短符号に音声信号を付加して多重化することがで
きるので、その最短符号を音声信号挿入の有無を示す符
号とし、受信側で容易に音声信号を分離することができ
る。その為フレーム同期をとるのに必要な同期ビ゛ット
が不要になり、伝送効率を向上することができる。
Effects of the Invention As explained above, the present invention, when converting an image signal into a transmission line code, uses the most significant bit to indicate whether or not an audio signal is inserted, and multiplexes the audio signal with the image signal. On the receiving side, the audio signal can be separated by identifying the code with the insertion of the audio signal. Therefore, the audio signal can be multiplexed on the image signal without using a frame configuration. In particular, when transmitting image signals using variable-length encoding, it is possible to add an audio signal to the shortest code and multiplex it, so the shortest code can be used as a code that indicates whether or not an audio signal is inserted, making it easy for the receiving side to transmit the image signal. The audio signal can be separated into Therefore, the synchronization bit required for frame synchronization becomes unnecessary, and transmission efficiency can be improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は画像信号に音声信号を多重化する従来例のフレ
ーム構成の説明図、第2図は本発明の実施例の送信側の
要部ブロック図、第3図は差分値とその発生確率とによ
る可変符号化の説明図、第4図は画像信号の可変符号信
号と音声信号の挿入位置との説明図、第5図は第4図に
示す符号を直列に変換して示す説明図、第6図は本発明
の実施例の受信側の要部ブロック図である。 1は画像信号の入力端子、2は音声信号の入力端子、3
.4はAD変換器、5はクロツク発4一器、6は差分符
号化回路、7は可変長符号化回路、8は分周回路、9は
並列直列変換回路、10は音声信号の挿入タイミング信
号を発生するタイミング発生回路、I1は多重化回路、
12は多重化信号の出力端子、21は多重化信号の入力
端子、22ば可変長復号回路、23は音声信号を挿入し
た符号を検出する検出回路、24は画像信号から音声信
号を分離する分離回路、25は復号回路、26はDA変
換器、27は直列並列変換回路、28はDA変換器、2
9は画像信号の出力端子、30は音声信号の出力端子で
ある。 −489−一
Fig. 1 is an explanatory diagram of the frame structure of a conventional example in which an audio signal is multiplexed with an image signal, Fig. 2 is a block diagram of the main part of the transmitting side of an embodiment of the present invention, and Fig. 3 is a difference value and its probability of occurrence. FIG. 4 is an explanatory diagram of the variable encoding signal of the image signal and the insertion position of the audio signal, FIG. 5 is an explanatory diagram showing the codes shown in FIG. 4 converted into serial, FIG. 6 is a block diagram of the main parts of the receiving side according to the embodiment of the present invention. 1 is an input terminal for image signals, 2 is an input terminal for audio signals, 3
.. 4 is an AD converter, 5 is a clock generator, 6 is a differential encoding circuit, 7 is a variable length encoding circuit, 8 is a frequency dividing circuit, 9 is a parallel-to-serial conversion circuit, and 10 is an audio signal insertion timing signal. I1 is a multiplexing circuit,
12 is an output terminal for a multiplexed signal, 21 is an input terminal for a multiplexed signal, 22 is a variable length decoding circuit, 23 is a detection circuit that detects a code into which an audio signal is inserted, and 24 is a separation unit that separates an audio signal from an image signal. circuit, 25 is a decoding circuit, 26 is a DA converter, 27 is a serial/parallel converter circuit, 28 is a DA converter, 2
9 is an output terminal for image signals, and 30 is an output terminal for audio signals. -489-1

Claims (1)

【特許請求の範囲】[Claims] デイジタル信号に変換した画像信号にデイジタル信号に
変換した音声信号を多重化する音声多重化方式に於で、
前記画像信号を伝送路符号に変換するとき、該伝送路符
号の複数毎に最上位ビットを反転して音声信号の挿入有
りを示す符号とし、該符号の後に音声信号を挿入して多
重化し、受信側に於では音声信号の挿入有りを示す符号
を識別して該符号の後に挿入された音声信号を/7)!
iIIIすることを特徴とする音声多重化方式。
In an audio multiplexing method that multiplexes an audio signal converted into a digital signal with an image signal converted into a digital signal,
When converting the image signal into a transmission line code, the most significant bit is inverted for each plurality of transmission line codes to create a code indicating the presence of insertion of an audio signal, and the audio signal is inserted and multiplexed after the code, On the receiving side, the code indicating that an audio signal has been inserted is identified and the audio signal inserted after the code is detected. /7)!
An audio multiplexing method characterized by
JP57172359A 1982-09-29 1982-09-29 Sound multiplexing system Granted JPS5961286A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57172359A JPS5961286A (en) 1982-09-29 1982-09-29 Sound multiplexing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57172359A JPS5961286A (en) 1982-09-29 1982-09-29 Sound multiplexing system

Publications (2)

Publication Number Publication Date
JPS5961286A true JPS5961286A (en) 1984-04-07
JPS633512B2 JPS633512B2 (en) 1988-01-25

Family

ID=15940437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57172359A Granted JPS5961286A (en) 1982-09-29 1982-09-29 Sound multiplexing system

Country Status (1)

Country Link
JP (1) JPS5961286A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04296182A (en) * 1991-03-25 1992-10-20 Nec Corp Moving picture transmitter and moving picture transmission system
WO1994030013A1 (en) * 1993-06-08 1994-12-22 Sony Corporation Encoder and encoding method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04296182A (en) * 1991-03-25 1992-10-20 Nec Corp Moving picture transmitter and moving picture transmission system
WO1994030013A1 (en) * 1993-06-08 1994-12-22 Sony Corporation Encoder and encoding method
US5627581A (en) * 1993-06-08 1997-05-06 Sony Corporation Encoding apparatus and encoding method

Also Published As

Publication number Publication date
JPS633512B2 (en) 1988-01-25

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