JPS5960521A - Voltage stabilizing circuit - Google Patents

Voltage stabilizing circuit

Info

Publication number
JPS5960521A
JPS5960521A JP17121582A JP17121582A JPS5960521A JP S5960521 A JPS5960521 A JP S5960521A JP 17121582 A JP17121582 A JP 17121582A JP 17121582 A JP17121582 A JP 17121582A JP S5960521 A JPS5960521 A JP S5960521A
Authority
JP
Japan
Prior art keywords
circuit
voltage
circuits
current
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17121582A
Other languages
Japanese (ja)
Inventor
Masao Takeda
武田 正雄
Hayashi Suzuki
鈴木 林
Yoshihiko Taniguchi
谷口 良彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17121582A priority Critical patent/JPS5960521A/en
Publication of JPS5960521A publication Critical patent/JPS5960521A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/577Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices for plural loads
    • G05F1/585Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices for plural loads providing voltages of opposite polarities

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

PURPOSE:To save electric power by connecting in series plural circuits, and providing a circuit for absorbing an unbalanced portion of a current of plural circuits concerned in the connecting point of plural circuits concerned. CONSTITUTION:Function circuits 2'', 3'' are connected in series to an electric power source 4, and a by-passing circuit of an unbalanced portion of a current of its connecting point 5 is constituted of transistors 8, 9, resistances 10-13 and diodes 14, 15. The reference voltage of the transistors 8, 9 is determined by voltage V of the resistances 12, 13 and the electric power source 4. The diodes 14, 15 reduce power consumption in case when the transistors 8, 9 are operated, by operating the transistors 8, 9 by B class bias. Also, the resistances 10, 11 are protective resistances of the respective transistors 8, 9.

Description

【発明の詳細な説明】 (al  発明の技術分野 本発明は、単一電源より1複数の回路に電源電圧を供給
する際の該電源電圧の安定化を図る電圧安定化回路に関
する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a voltage stabilizing circuit that stabilizes a power supply voltage when it is supplied from a single power supply to one or more circuits.

fbl  技術の背景 近年、電子回路は集積化される傾向にあるが。fbl technology background In recent years, there has been a tendency for electronic circuits to become more integrated.

この際、複数の電子回路を1個のチップにまとめること
が行われている。この場合、一般に、1111i1のチ
ップに対して、  1 flfrlの電源から電圧が供
給されるため、複数の電子回路には、上記1 (III
Iの電源から電圧が供給されることになる。このような
回路形式においては1回路の低電力化、上記チップの素
子バラツギによる電圧値の初期バラツキを設計清適りに
設定できることが要求される。
At this time, a plurality of electronic circuits are combined into one chip. In this case, generally, the voltage is supplied to the 1111i1 chip from the 1 flfrl power supply, so the multiple electronic circuits have the above 1 (III
Voltage will be supplied from the power supply of I. In such a circuit type, it is required to reduce the power consumption of one circuit and to be able to set initial variations in voltage values due to variations in the elements of the chip to suit the design.

(C1従来技術と問題点 」二記技術の背景に記載した回路形式には、電源に対し
て電子回路を並列に接続するものと、直列に接続するも
のとがある。
(C1 Prior Art and Problems) The circuit types described in the background of the technology described in section 2 include those in which electronic circuits are connected in parallel to a power supply and those in which electronic circuits are connected in series.

以下、電源に対し、各機器の機能回路が並列接続で使用
される場合と直列接続で使用される場合についてそれぞ
れ第1図、第2図に従って説明する。
Hereinafter, the case where the functional circuits of each device are connected in parallel and the case where they are used in series connection with respect to the power supply will be explained with reference to FIGS. 1 and 2, respectively.

第1図は従来例の機器を構成する各機能回路が主電源に
並列接続された状態を示す。同図において、電子装置の
各機器1内の各機能回路2.3は電源4に対し、並列に
接続され、負荷電流1.。
FIG. 1 shows a state in which each functional circuit constituting a conventional device is connected in parallel to a main power source. In the figure, each functional circuit 2.3 in each device 1 of the electronic device is connected in parallel to a power supply 4, and the load current 1.3 is connected in parallel to a power supply 4. .

I2が流れる。しかしながら1機器1内の電力が第(1
1式の如くなり、かなり大きいものであった。
I2 flows. However, the power inside one device 1 is
It looked like Type 1 and was quite large.

P=VX  (1+ I  )      −−−−−
(1112 但し l)は電力(W)、Vは電源電圧〔■〕。
P=VX (1+I) -----
(1112 where l) is electric power (W) and V is power supply voltage [■].

1、、I2は負荷電流〔A〕である。1, I2 is the load current [A].

従って、四種化された機能回路2,3が電源4に対し並
列接続で使用されると、電力発熱によって内の回M3規
模が縮小され集積技術の本来の目的が失われるという欠
点があった。
Therefore, when the four types of functional circuits 2 and 3 are used in parallel connection to the power supply 4, there is a drawback that the scale of the internal circuit M3 is reduced due to power generation, and the original purpose of the integrated technology is lost. .

このため1機能回路2.3が電源4の定格電圧より低く
ても良い場合には、電源4に対して機能回路2.3を直
列に接続して使用する場合がある。
For this reason, if the voltage of one functional circuit 2.3 can be lower than the rated voltage of the power source 4, the functional circuit 2.3 may be connected in series with the power source 4 and used.

この場合2機器1内の電力は第(2)式の如くなり。In this case, the power within the two devices 1 is as shown in equation (2).

機能回路2,3を電源に対して並列に接続した時に比べ
、電力を約2にすることができる。
Compared to when the functional circuits 2 and 3 are connected in parallel to the power supply, the power consumption can be reduced to about 2.

P −V X I n           −−−(
21但し、Pは電力、■は電源電圧CV)、Inは機能
回路2.3に流れる電流のうち、大きい方の電流値(A
)である。
P −V X I n ---(
21 However, P is the power, ■ is the power supply voltage CV), and In is the larger current value (A
).

しかし乍ら1機能回路を電源に対し直列に接続する際、
IC内素子の絶対値偏差が大きいことに伴う動作電流の
不平衡が生じ中間点の電圧が製造ロフトによって差異を
生ずる。
However, when connecting a single functional circuit in series to a power supply,
As the absolute value deviation of the elements within the IC is large, an unbalance in the operating current occurs, and the voltage at the midpoint differs depending on the manufacturing loft.

このため、従来では、電源に対して1機能回路を直列に
接続する場合には、第2図に示す如き。
For this reason, conventionally, when a single-function circuit is connected in series to a power supply, it is as shown in FIG.

回路形式をとっていた。It took the form of a circuit.

以下、各機器の機能回路を主電源に対して直列接続する
場合の従来例を第2図を用いて説明する。
Hereinafter, a conventional example in which the functional circuits of each device are connected in series to a main power source will be described with reference to FIG.

第2図において、主電源4の定格電圧V に対し2機器
1の機能回路2′及び3′が直列接続で使用される場合
2機能回路2′及び3′の夫々の動作電流IJ及■鯰が
l 、l > + :またば弓’<1ンのとき、該回路
2′及び3′の接続点5に生ずる電流の差分△J−15
〜1νを吸収する回路を抵抗6または7て行っていた。
In Fig. 2, when the functional circuits 2' and 3' of two devices 1 are connected in series with respect to the rated voltage V of the main power supply 4, the respective operating currents IJ and 2 of the two functional circuits 2' and 3' are is l, l>+: Also, when bow'<1, the difference in the currents generated at the connection point 5 of the circuits 2' and 3' is △J-15
A resistor 6 or 7 was used as a circuit to absorb ~1ν.

しかし乍ら、これら機能回路2′、3′の製造ロフトに
よるIc内素子値の絶対値偏差が大きいためバイパス用
の抵抗を含め機能回路2’、3’の動作電流を差異なく
正確に供給することは困ゲ1tであった。また抵抗6.
7は機能回路2′及び3′に対し定電圧回路の機能を持
たせる必要があるため抵抗6.7には機能回路2′及3
′に対し数倍の電流を流す必要った。この低電圧化、低
消費電力化の本来の目的を達成できないという欠点があ
った。
However, since the absolute value deviation of the element value in Ic due to the manufacturing loft of these functional circuits 2' and 3' is large, the operating current of the functional circuits 2' and 3' including the bypass resistor is accurately supplied without difference. This was a huge problem. Also resistance 6.
7 is required to have the function of a constant voltage circuit for the functional circuits 2' and 3', so the resistor 6.7 is connected to the functional circuits 2' and 3'.
′ It was necessary to flow several times the current. There was a drawback that the original purpose of lowering voltage and power consumption could not be achieved.

(d)  発明のl」的 本発明は」1記の!!!IC点を解決するために各機器
の機能回路を主電源に直列に接続して該機能回路を構成
するIC内の電力消費を減少させ、かつ製造ロフトによ
らず一定な中間電圧を得る新規な電圧安定化回路を提供
することを目的とする。
(d) The invention is described in 1. ! ! In order to solve the problem of IC issues, we developed a novel method that connects the functional circuits of each device in series to the main power supply to reduce the power consumption in the ICs that make up the functional circuits, and to obtain a constant intermediate voltage regardless of the manufacturing loft. The purpose is to provide a voltage stabilization circuit.

(e+  発明の構成 本発明は、かかる目的を達成するために、i−電源より
、該電子装置を構成する各機器に電圧を供給するに際し
、該単一電源に対し該機器を構成する複数の回路を直列
接続し、該複数の回路の接続点における該複数の回路の
電流の不平衡分を該接続点にて吸収する回路を具備し、
該不平衡電流の吸収によって該複数の回路に所定の電圧
を供給することを特徴とするものである。
(e+ Structure of the Invention In order to achieve the above object, the present invention provides a method for supplying voltage from an i-power source to each device constituting the electronic device, by applying voltage to the single power source to a plurality of devices constituting the device. The circuit is connected in series, and includes a circuit that absorbs an unbalanced portion of the current of the plurality of circuits at the connection point of the plurality of circuits,
The present invention is characterized in that a predetermined voltage is supplied to the plurality of circuits by absorbing the unbalanced current.

(fl  発明の実施例 以下本発明を図面に基づいて説明する。(fl Embodiments of the invention The present invention will be explained below based on the drawings.

第3図は本発明の実施例を示す。電源4に列して9機能
回路2″及び3″を1u列接続し、その接続点5の電流
不平衡分のバイパス回路をトランソスタ8.9.抵抗1
0,11,12,13.ダイオード14.15で構成す
る。
FIG. 3 shows an embodiment of the invention. Nine functional circuits 2'' and 3'' are connected in a 1U series in line with the power supply 4, and a bypass circuit for the current imbalance at the connection point 5 is connected to the transformer 8.9. resistance 1
0, 11, 12, 13. It consists of diodes 14 and 15.

同図において、NPN (或いはf) N I) )の
トランジスタ8とPNP (或いはNPN)の1−ラン
シスタ9とが直列接続され、これらトランジスタ8゜9
の基準電圧は抵抗12及613と主電源4の電圧■ で
決定される。ダイオ−1”14.15は1〜ランシスタ
8及9をB級にバイアスするための素子で、hランラス
タ8及9を8級バイアスで動作させることにより該1−
ランシスタ8及9の動作n、テの消費電力を少なくする
リノ果がある。また抵抗10.11は夫々のトランジス
タ8及9の保護抵抗である。
In the figure, an NPN (or f) NI) transistor 8 and a PNP (or NPN) 1-run transistor 9 are connected in series, and these transistors 8°9
The reference voltage is determined by the resistors 12 and 613 and the voltage of the main power source 4. The diode 1"14.15 is an element for biasing the run rasters 1 to 8 and 9 to class B, and by operating the h run rasters 8 and 9 with a class 8 bias, the 1-
There is a way to reduce the power consumption of the operations of the Run Sisters 8 and 9. Further, resistors 10 and 11 are protection resistors for the respective transistors 8 and 9.

以上の回路構成において2機能回路2″の電流弓と機能
回路3″の電流14の電流関係が1゜> 1.の時、ト
ランジスタ9がJノ作し2両者の電流の差分△I=I、
−1,はl・ランシスタ9に流れる。また前記1.I 
 の電流関係が1.<I、。
In the above circuit configuration, the current relationship between the current arc of the dual-function circuit 2'' and the current 14 of the functional circuit 3'' is 1°>1. When , the transistor 9 generates J and the difference in current between the two is △I=I,
−1, flows to the l·runsistor 9. Also, 1. I
The current relationship is 1. <I.

の時、トランジスタ8が動作し1両者の電流の差分△I
=I、−1,がトランジスタ8に流れ2両者の不平衡電
流分△■を吸収して機能回路2′3′に対し安定な定電
圧を供給する。
When , transistor 8 operates and the difference between the currents △I
=I, -1, flows into the transistor 8, absorbs the unbalanced current Δ■ between the two, and supplies a stable constant voltage to the functional circuit 2'3'.

以」二の回路において、トランジスタ8にNPN1ヘラ
ンジスタを用い、トランジスタ9に1)NPトランジス
タを使用したが]・ランジスタ8にPNPを使用し、]
・トランジスタにNPNを使用しても本発明は成立する
In the second circuit below, an NPN1 transistor was used for the transistor 8, and an NP transistor was used for the transistor 9]・A PNP was used for the transistor 8,
- The present invention can be applied even if NPN is used for the transistor.

fgl  発明の効果 以」二本発明によれば、一定の電圧を供給する主電源に
対し、2ケの機能回路を直列に接続し、該機能回路間の
電流の不平衡を1−ランジスタ、抵抗。
According to the present invention, two functional circuits are connected in series to a main power source that supplies a constant voltage, and current imbalance between the functional circuits is reduced by one transistor, one resistor, and one transistor. .

ダイオードで形成したバイパス回12&で吸収すること
により省電力化を図ることが°できる電圧安定化回路が
実現できる。この省電力によりIC化された機能回路内
の発熱を抑圧できIC回路規模を大形できる利点をYl
−する。
A voltage stabilizing circuit that can save power by absorbing the voltage through the bypass circuit 12& formed by a diode can be realized. The advantage of this power saving is that it can suppress heat generation in the functional circuit integrated into an IC and increase the scale of the IC circuit.
- to do.

【図面の簡単な説明】[Brief explanation of the drawing]

゛第1図は従来例の機能回路の電圧安定化回路。 第2図は直列接続した機能回路の電流不平衡を抵抗回路
によって吸収した電圧安定化回路、第3図は本発明の実
施例を示す。 図中、1は電子装置の機器、2.2’、3’。 4′は機能回路、4は主電源、5は機能面の接続点、6
,7.10〜13ば抵抗、8.9はトランジスタ、14
.15はダイオードを示ず。
゛Figure 1 shows a voltage stabilization circuit of a conventional functional circuit. FIG. 2 shows a voltage stabilizing circuit in which the current unbalance of functional circuits connected in series is absorbed by a resistor circuit, and FIG. 3 shows an embodiment of the present invention. In the figure, 1 is an electronic device, 2. 2', 3'. 4' is the functional circuit, 4 is the main power supply, 5 is the functional connection point, 6
, 7.10 to 13 are resistors, 8.9 are transistors, 14
.. 15 does not indicate a diode.

Claims (1)

【特許請求の範囲】[Claims] 単一電源より、該電子装置を構成する各機器に電圧を供
給するに際し、該単一電源に対し該機器を構成する複数
の回路を直列接続し、該複数の回路の接続点における該
複数の回路の電流の不平衡分を該接続点にて吸収する回
路を具備し、該不平衡電流の吸収によって該複数の回路
に所定の電圧を供給することを特徴とする電圧安定化回
路。
When supplying voltage from a single power supply to each device constituting the electronic device, a plurality of circuits constituting the device are connected in series to the single power supply, and the voltage at the connection point of the plurality of circuits is A voltage stabilizing circuit comprising a circuit that absorbs an unbalanced portion of current in the circuit at the connection point, and supplies a predetermined voltage to the plurality of circuits by absorbing the unbalanced current.
JP17121582A 1982-09-30 1982-09-30 Voltage stabilizing circuit Pending JPS5960521A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17121582A JPS5960521A (en) 1982-09-30 1982-09-30 Voltage stabilizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17121582A JPS5960521A (en) 1982-09-30 1982-09-30 Voltage stabilizing circuit

Publications (1)

Publication Number Publication Date
JPS5960521A true JPS5960521A (en) 1984-04-06

Family

ID=15919166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17121582A Pending JPS5960521A (en) 1982-09-30 1982-09-30 Voltage stabilizing circuit

Country Status (1)

Country Link
JP (1) JPS5960521A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5867040A (en) * 1995-06-15 1999-02-02 Kabushiki Kaisha Toshiba Integrated circuit with stacked sub-circuits between Vcc and ground so as to conserve power and reduce the voltage across any one transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5867040A (en) * 1995-06-15 1999-02-02 Kabushiki Kaisha Toshiba Integrated circuit with stacked sub-circuits between Vcc and ground so as to conserve power and reduce the voltage across any one transistor

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