JPS595377A - Connection system of multicomputer - Google Patents

Abstract

PURPOSE:To connect the output of an optional processor to the input of another processor easily by arraying input lines and output lines of plural processors in a matrix, and controlling coupling at intersections. CONSTITUTION:The output lines S1-S3 and input lines R1-R3 of the plural processors P1-P3 are arrayed in a matrix to constitute a multicomputer system. Coupling gates G11- and G33 are provided at the intersections of the output lines S1-S3 and input lines R1-R3, and their switching is controlled by gate control lines C1-C3. A 1-bit shift register is incorporated in the coupling gate Gn and registers connecting to the same input data line are coupled in series to shift a control signal in series, decreasing the number of the control lines. Each coupling gate Gn is opened and closed according to the contents of the corresponding shift register. Consequently, the output of an optional processor is inputted to another optional processor with the less circuits.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a connection system for a compound computer configured by interconnecting a plurality of processing units.

Conventionally, a common method for configuring a compound computer is a connection method using a common transmission path. According to this method, data can be exchanged between all the processing devices connected to a common transmission path, but because the transmission path is shared, they cannot be used at the same time, and if one processing device breaks down, There was also the problem that transmission was impossible.

In order to solve this problem, there is a method to create a transmission line that connects all the processing devices and make them independent.
The number of input/output lines became enormous, and there were restrictions on the number of processing devices that could be connected.

In view of the above problems, an object of the present invention is to create a 471 system that can arbitrarily and reliably connect a large number of processing devices! ″i
The purpose is to provide a connection method for the main unit.

In order to achieve such an object, the present invention arranges the output data lines and input data lines of each processing device constituting the multimeter S machine in a grid pattern, connects them fixedly or selectively, and connects them arbitrarily. The feature is that data can be exchanged between processing devices. Furthermore, in the present invention, the coupling between data lines can be controlled by each processing device, unnecessary data traffic can be eliminated by partial coupling, and when a failure occurs, the obstacle can be eliminated. DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows the configuration of an example of a composite gtxi system according to the present invention, and shows an example in which the number of processing devices is 3-#3.

In Figure 1, 1-1 to 1-3 are three processing devices, 2
-1 to 2-3 are processing units! 1-1 to 1-3 output data, 3-1 to 3-3 are input data of processing devices 1-1 to 1-3, 4-11 to 4-33 are connected games arranged in a grid) , 5-1 to 5-3 are coupling gate control lines of the processing devices it to 1-3.

In addition, the data on the output data lines 2-1 to 2-3 are set to 81 to 3, respectively, and the input data @13-1 to 3-3
The above data are respectively designated as 几1-几3, and the signals on the coupling gate control lines 5-1 to 5-3 are respectively designated as 01 to C3.

In the configuration shown in FIG. 1, if data S1 is sent from the processing device 1-1 via the output data line 1-1, the human data d'3- 1
~3-3, the data is relayed to all of datal 1
~ 8 is input to all processing devices 1-1 to 1-3. Similarly, data from other processing devices 11-2 to 1-3 is manually inputted to all processing devices*i-i to 1-3, and communication between any processing devices is possible. The structure is simple and can be easily realized using a large-scale integrated circuit. In this case, it is assumed that the connecting games 4-11 to 4-31 are always open. Further, in this case, they may be fixedly connected at the father point.

However, when each processing device transmits data independently, a plurality of processing devices may output data at the same timing. FIG. 2 shows processing devices 1-1 and 1-
Data when 2 are output at the same time $12-1.2-2.
3-1 to 3-3 data Sl, Sz, l(,1 to R3
This shows a time chart in which the input data lines 3-1 to 3-3 overlap, resulting in data destruction.

In such a case, each of the processing devices 1-1 to 1-3 uses an erroneous check code to judge the data 1 to R3 inputted from the respective input data lines 3-1 to 3-3. I can do it. Methods for this misjudgment are known techniques, such as parity check and CRC (cyclic retardant check).

Since this check can be performed by all processing devices, the sending side will retransmit and the receiving side will re-receive. At this time, there is a possibility that contention may occur again due to retransmission, so the retransmission time is generally determined by random numbers as shown in FIG. 3 to avoid contention from occurring again.

The above description has been made regarding the case where parent communication is required between all processing devices, but in actual applications, not all connections are necessarily required. In that case, unnecessary coupling causes extra data to enter the input data line, and also causes unnecessary contention on the transmitting side.

When dealing with such uses, each coupling gate 4 can be controlled and unnecessary coupling can be handled by keeping the gates closed.

5-1 to 5-3 in FIG. 1 are coupling gate control lines for controlling the respective coupling gates. In the embodiment of FIG. 1, the coupling gate 4 has a built-in 1-pit shift register, and the same This is an example of a method in which registers connected to an input data line are connected in series, a control signal is shifted serially from a gate control line, and control information is set in each register.
By connecting them in series, the number of control lines is reduced. For example, the 1-bit shift registers 4-11 to 4-13 connected to the input data line 3-1 are connected in series to the combined gate control line 5-1, and the control signal is transmitted from this control line. C1 is sent out in series. In each of the coupling groups 4-11 to 4-13, the gates are opened and closed according to the contents of the corresponding shift register.

The above is a case where all the processing units, input/output data lines, and coupling gates are normal, but depending on the case, a failure may occur in these elements.

FIG. 4 shows that the processing device 1-1 has failed and the output data line 2-1
If the data S1 continues to be output to the other processing devices 1-2.
This shows that the data from 1-3 is always destroyed and normal information transmission is no longer possible. In this case, each processing device sequentially opens and closes the coupling gate via the gate control line as shown in Figure 6, discovers the location of the abnormal output data line, closes the corresponding gate, and eliminates the effects of the failure. As a result, as shown in FIG. 5, the connection to the processing device 1-1 in which the failure has occurred is severed, and normal transmission can be continued thereafter. In FIG. 6, the control signal C2 from the processing device 1-2 is combined with the control signal g21°g,i! ! , g113 sequentially''
0'' and closes the gate.

In addition, in some cases, failures are not just logical errors; for example, element destruction may spread due to power supply abnormalities, etc. As a means to prevent this, as shown in Figure 7, light emitting elements 41, an optical coupling device consisting of a light receiving element 42 is used, and the output of the optical coupling device is transmitted to an optical signal amplification circuit 4.
3 to the AND gate 44. The AND gate 44 also receives a control signal gj14 (
is being applied. Thereby, the transmitting side and the receiving side can be electrically isolated.

As described above, according to the present invention, a plurality of processing devices can be connected in an arbitrary configuration, and it is possible to increase throughput compared to a method using a single transmission path. , the degree of freedom of configuration, throughput, and reliability can be improved, such as avoiding this, and the circuit configuration is simple, making it easy to implement large-scale integrated circuits, and the effects are enormous.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the overall configuration of an embodiment of the compound hand Jj and machine system of the present invention, Fig. 2 is a time chart showing a conflicting state in the case of simultaneous transmission from multiple processing devices, and Fig. 3 is a diagram showing the conflicting state of the compound needle Jj of the present invention. Figure 4 is a time chart showing contention control by retransmission when a failure occurs, Figure 4 is a time chart when transmission is inhibited by a failure, Figure 5 is a time chart for failure recovery, and Figure 6 is a gate for failure detection recovery. The control time chart in FIG. 7 is a diagram showing an example of a coupling gate when input and output are insulated by optical coupling. DESCRIPTION OF SYMBOLS 1... Processing device, 2... Output data line, 3... Input data line, 4... Coupling gate, 5... Gate control line, 44... Delivery control gate, 43... Optical/No. 1g amplifier circuit, 41Yll (2) No. Zl1 8゛~2゛0''9'6 No. 4t21 No. 5 Figure line 6 Old Figure 7

Claims (1)

[Claims] 1. A compound computer consisting of a plurality of processing devices, comprising an output data line outputted from each processing device and an input data line inputted to each processing device, the output data line and The input data lines are arranged in a grid, and connected to the output data line and the input data line via coupling means at the intersections of the output data line and the input data line, and the data output from each processing device is connected to each processing device. A connection method for a compound computer, which is characterized in that input can be made to the computer. 2. The connecting means for connecting the output data line and the input data line is composed of a gate, and the opening and closing of the gate is controlled by a processing device corresponding to the input data line, so that connection and disconnection with any output line can be controlled. The first claim characterized in that
Connection method of compound computer described in section. 3. A connection system for a compound computer according to claim 1 or 2, characterized in that the output data line and the input data line are coupled by an optical coupling element and insulated from each other. 4. The coupling means for connecting the output data line and the input data line is composed of a gate, and a register is provided to control opening and closing of the gate by a processing device corresponding to the input data line, and the gate is opened and closed according to the logical value of the register. The compound needle X and machine connection system according to any one of claims M1 to 3, characterized in that the register is used as a register to send set values in series from the corresponding processing device.