Detailed description of the invention
In terminology used in the present invention merely for the sake of describing the purpose of specific embodiment, and the unrestricted present invention.
" a kind of ", " described " and " being somebody's turn to do " also purport of singulative used in the present invention and claims
Including most form, unless context clearly shows that other implication.It is also understood that used herein
Term "and/or" refer to comprise any or all of one or more project of listing being associated may combination.
Although should be appreciated that may use term first, second, third, etc. to describe various letter in the present invention
Breath, but these information should not necessarily be limited by these terms.These terms are only used for same type of information district each other
Separately.Such as, without departing from the present invention, the first information can also be referred to as the second information,
Similarly, the second information can also be referred to as the first information.Depend on linguistic context, additionally, the word used
" if " can be construed to " ... time " or " when ... time " or " in response to determining ".
Shown in Figure 1, BMC is only connected with a mainboard, and BMC can only send one to remote console
The serial printing information of individual mainboard, remote console can only see the serial printing information of a mainboard.And,
The serial printing information of this BMC cannot be sent to remote console by BMC.And, remote console is only
Serial ports can be sent by BMC to a mainboard and control information.
For the problems referred to above, proposing the transmission method of a kind of Serial Port Information in the embodiment of the present invention, BMC is permissible
Management mainboard and/or this BMC, and by the serial printing information of mainboard and/or the serial printing information of this BMC
It is sent to remote console, and the serial ports control information from remote console is sent to mainboard.Such as Fig. 2
Shown in, the transmission method of this Serial Port Information, specifically may comprise steps of:
Step 201, BMC obtains data, and these data include Serial Port Information and the mark belonging to this Serial Port Information
Information.
Step 202, BMC utilizes the identification information belonging to this Serial Port Information to send this data.
Wherein, this Serial Port Information can be the serial ports of mainboard and/or the BMC needing to be sent to remote console
Type information, it is also possible to control information for the serial ports from remote console.
For serial printing information, then BMC obtains the process of data, specifically includes: BMC obtains UART
Serial data, this UART serial data includes serial printing information;The BMC UART serial ports number to obtaining
According to being packaged.BMC utilizes the identification information belonging to Serial Port Information to send the process of data, specifically includes:
UART serial data after encapsulation is sent to remote console by BMC, wherein, and the UART after encapsulation
Serial data includes the identification information belonging to serial printing information, this serial printing information.Therefore, BMC is
The data of the identification information comprised belonging to serial printing information, serial printing information are sent to remote console.
For serial ports control information, then BMC obtain data process, specifically include: BMC receive from
Data after the encapsulation of remote console, and the data after encapsulation are decapsulated, the number after decapsulation
According to including that serial ports controls the identification information of the mainboard belonging to information and this serial ports control information.BMC utilizes string
Identification information belonging to message breath sends the process of data, specifically includes: BMC utilizes this serial ports to control information
The identification information of affiliated mainboard, is sent to the mainboard belonging to serial ports control information by this serial ports control information.
Process serial printing information and serial ports being controlled information below in conjunction with concrete application scenarios illustrates.
As it is shown on figure 3, be the handling process for serial printing information, this process may include that
Step 301, BMC obtains UART serial data, and this UART serial data includes that serially printing is believed
Breath.Wherein, this UART serial data is the UART serial data of mainboard, and/or, the UART of BMC
Serial data.Such as, this UART serial data can be the UART serial data of at least two mainboard,
Or, can be the UART serial data of BMC, or, can be the UART of at least one mainboard
The UART serial data of serial data and BMC.
BMC obtains the process of UART serial data of mainboard, can include but not limited to following situation:
Situation one, as shown in Figure 4, disposes FPGA (Field Programmable between BMC and mainboard
Gate Array, field programmable gate array), i.e. mainboard is carried out data transmission by FPGA with BMC.
And, mainboard is carried out data transmission with BMC by a UART bus.In the diagram, each mainboard
To there being a lpc bus, the most each mainboard carries out data biography by the lpc bus of self with FPGA
Defeated, but, FPGA is only carried out data transmission with BMC by a UART bus, so, and Mei Gezhu
Plate can be carried out data transmission with BMC by this unique UART bus.
LPC serial data is exported to FPGA by the first mainboard by lpc bus.FPGA receives from the
The LPC serial data of one mainboard, is converted into UART serial data by LPC serial data, and passes through
UART bus between BMC and FPGA, is sent to the UART serial data of the first mainboard
BMC.BMC receives the UART serial data of the first mainboard that FPGA is sent by UART bus.
Situation two, as shown in Figure 4, disposes FPGA, i.e. mainboard between BMC and mainboard and leads to BMC
Cross FPGA to carry out data transmission.And mainboard is carried out data transmission with BMC by a UART bus.
In the diagram, each mainboard is to there being a UART bus, and the most each mainboard is total by the UART of self
Line carries out data transmission with FPGA, but, FPGA is only by a UART bus and BMC number
According to transmission, so, each mainboard can be carried out data transmission with BMC by this unique UART bus.
UART serial data is exported to FPGA by the first mainboard by UART bus.FPGA receives
From the UART serial data of the first mainboard, no longer carry out the conversion operation of serial data, directly pass through BMC
And the UART bus between FPGA, is sent to BMC by the UART serial data of the first mainboard.BMC
Receive the UART serial data of the first mainboard that FPGA is sent by UART bus.
Situation three is as it is shown in figure 5, dispose FPGA, i.e. mainboard and lead to BMC between BMC and mainboard
Cross FPGA to carry out data transmission.And, mainboard carries out data biography by multiple UART buses with BMC
Defeated.In Figure 5, each mainboard is to there being a lpc bus, and the most each mainboard is total by the LPC of self
Line carries out data transmission with FPGA, and, FPGA carries out data by multiple UART buses with BMC
Transmission, so, each mainboard can a corresponding UART bus, and can be by UART corresponding to this mainboard
Bus carries out data transmission with BMC.
Wherein, when the quantity of mainboard, time identical with the UART bus number between FPGA and BMC,
The most each mainboard can a corresponding unique UART bus, such as, between BMC and FPGA
The corresponding mainboard 1 of UART bus 1, the corresponding mainboard 2 of UART bus 2, the corresponding mainboard 3 of UART bus 3.
Or, can there is the corresponding same UART bus of part mainboard, and have UART bus free, such as,
The corresponding mainboard of UART bus 11 between BMC with FPGA and mainboard 2, UART bus 2 is corresponding main
Plate 3, UART bus 3 is idle.When the quantity of mainboard, and the UART bus between FPGA and BMC
During quantity difference, the most each mainboard can a corresponding unique UART bus, for example, it is assumed that UART
Bus number more than the quantity of mainboard, then the corresponding mainboard of UART bus 11 between BMC with FPGA,
The corresponding mainboard 2 of UART bus 2, the corresponding mainboard 3 of UART bus 3, but UART bus 4 is idle.
Or, can have the corresponding same UART bus of part mainboard, for example, it is assumed that UART bus number is little
In the quantity of mainboard, then the corresponding mainboard of UART bus 11 between BMC with FPGA and mainboard 2,
The corresponding mainboard 3 of UART bus 2.
It is, of course, also possible to there is the corresponded manner of other mainboard and UART bus, the present embodiment repeats no more.
LPC serial data is exported to FPGA by the second mainboard by lpc bus.FPGA receives from the
The LPC serial data of two mainboards, is converted into UART serial data by LPC serial data, and by second
The UART serial data of the second mainboard is sent to BMC by the UART bus that mainboard is corresponding.BMC receives
The UART serial data of the second mainboard that FPGA is sent by the UART bus that the second mainboard is corresponding.
Situation four is as it is shown in figure 5, dispose FPGA, i.e. mainboard and lead to BMC between BMC and mainboard
Cross FPGA to carry out data transmission.And, mainboard carries out data biography by multiple UART buses with BMC
Defeated.In Figure 5, each mainboard to there being a UART bus, the most each mainboard UART by self
Bus carries out data transmission with FPGA, and, FPGA is by multiple UART buses and BMC number
According to transmission, so, each mainboard can a corresponding UART bus, and can be corresponding by this mainboard
UART bus carries out data transmission with BMC.Wherein, for the corresponded manner of mainboard Yu UART bus,
It is referred to situation three, does not repeats them here, corresponding with the UART bus 1 between BMC with FPGA
Mainboard 1, the corresponding mainboard 2 of UART bus 2, as a example by the corresponding mainboard 3 of UART bus 3.
UART serial data is exported to FPGA by the second mainboard by UART bus.FPGA receives
From the UART serial data of the second mainboard, do not carry out the conversion operation of serial data, by the second mainboard pair
The UART serial data of the second mainboard is sent to BMC by the UART bus answered.BMC receives FPGA
By the UART serial data of the second mainboard that the UART bus that the second mainboard is corresponding sends.
Situation five, as shown in Figure 6, does not disposes FPGA, i.e. mainboard and BMC between BMC and mainboard
Directly carried out data transmission by UART bus, and, mainboard is by multiple UART buses and BMC
Carry out data transmission.In figure 6, the corresponding mainboard of each UART bus.Such as, UART bus
1 corresponding mainboard 1, the corresponding mainboard 2 of UART bus 2, the corresponding mainboard 3 of UART bus 3.
UART serial data is exported to BMC by the 3rd mainboard by UART bus.BMC receives the 3rd
The UART serial data that mainboard is sent by the UART bus that the 3rd mainboard is corresponding.
Situation six, as shown in Figure 6, does not disposes FPGA, i.e. mainboard and BMC between BMC and mainboard
Directly carried out data transmission by lpc bus, and, mainboard is carried out with BMC by multiple lpc bus
Data are transmitted.In figure 6, the corresponding mainboard of each lpc bus.Such as, lpc bus 1 is corresponding main
Plate 1, the corresponding mainboard 2 of lpc bus 2, the corresponding mainboard 3 of lpc bus 3.
LPC serial data is exported to BMC by the 3rd mainboard by lpc bus.BMC receives the 3rd mainboard
The LPC serial data sent by the lpc bus that the 3rd mainboard is corresponding, and LPC serial data is changed
Become UART serial data, thus obtain the UART serial data that the 3rd mainboard is corresponding.
For above-mentioned situation one to situation six, in actual applications, can select flexibly BMC and mainboard it
Between networking mode, selecting after certain networking mode, then using the processing mode of correspondence to process.Example
As, when BMC supports to be converted into LPC serial data UART serial data, and can BMC with
When disposing a lpc bus between each mainboard, then can use the networking mode of situation six, and use feelings
Condition six processes.The most such as, do not support to be converted into LPC serial data UART serial ports number as BMC
According to, and when mainboard uses lpc bus, then can use situation one or the networking mode of situation three, lead
Dispose FPGA between plate and BMC, and use situation one or situation three to process.
For above-mentioned situation one to situation six, the first mainboard, the second mainboard, the 3rd mainboard are intended merely to distinguish
Different situations, a kind of example be given.First mainboard, the second mainboard, the 3rd mainboard can be identical, also
Can be different.First mainboard, the second mainboard, the 3rd mainboard may each be a mainboard, it is also possible to be multiple
Mainboard.Such as, the first mainboard is mainboard 1, mainboard 2 and mainboard 3, and the second mainboard is mainboard 1, mainboard 2
With mainboard 3, the 3rd mainboard is mainboard 1, mainboard 2 and mainboard 3.Which kind of so, no matter use at situation
Reason, BMC all can get the UART serial data of mainboard 1, mainboard 2 and mainboard 3.
For above-mentioned situation one and situation two, between FPGA and BMC, owing to multiple mainboards share one
UART bus, therefore, FPGA is once merely able to be sent to the UART serial data of a mainboard
BMC.On this basis, BMC can pass through local bus (Local Bus) to FPGA transmission the first master
The request message of the UART serial data of plate, so that FPGA obtains and sends the UART string of the first mainboard
Mouth data, so, BMC just can receive the UART serial data of the first mainboard.
Such as, BMC first sends the request message of the UART serial data of mainboard 1 to FPGA, and receives
The UART serial data of mainboard 1.Afterwards, BMC sends the UART serial ports number of mainboard 2 to FPGA
According to request message, and receive the UART serial data of mainboard 2.By that analogy.
Said process is the process that BMC obtains the UART serial data of mainboard, obtains this for BMC
The process of the UART serial data of BMC, as it is shown in fig. 7, go here and there by the UART exported by BMC
Mouth, then input back another UART serial ports of BMC, so, BMC is exported by this UART serial ports
UART serial data, be input back to another UART serial ports of BMC, so that BMC can
Get the UART serial data of this BMC.
The UART serial ports that BMC exports is inputted back again the mode of another UART serial ports of BMC, can
To include but not limited to: the RX of the TX (transmitting terminal) of UART serial ports with another UART serial ports (is connect
Receiving end) docking, the RX of UART serial ports is docked with the TX of another UART serial ports.
In step 301, BMC can get the UART serial data of mainboard and/or this BMC
UART serial data, in subsequent process, not repartitioning is the UART serial data of mainboard, or
The UART serial data of BMC, is collectively referred to as UART serial data.
Step 302, the UART serial data obtained is packaged by BMC, the UART serial ports after encapsulation
Data include the identification information belonging to serial printing information, serial printing information.Wherein, the UART after encapsulation
Serial data includes the identification information of the mainboard belonging to serial printing information or BMC.
Wherein, when the UART serial data obtained is packaged, the UART serial ports that can will obtain
Data are packaged into UDP message, and this UDP message includes the serial printing information (serially printing such as mainboard
Information) and this serial printing information belonging to mainboard or the identification information of BMC.
Step 303, the UART serial data data after encapsulation are sent to remote console by BMC, as logical
Cross LAN and the UART serial data (such as UDP message) after encapsulation is sent to remote console.
Wherein, above-mentioned LPC serial data, UART serial data, UDP message all carry serial ports
Type information, the data form simply carrying serial printing information is different.
For the UART serial data after the encapsulation that remote console sends, in the embodiment of the present invention, by
The serial ports of the serial printing information and/or BMC that can carry mainboard in the UART serial data after encapsulation is beaten
Official seal ceases, accordingly, it would be desirable to make a distinction serial printing information, i.e. in the UART serial data after encapsulation
Carry the identification information of the mainboard belonging to serial printing information or BMC.Such as, serially printing letter is carried
Breath 1 and the corresponding relation of mainboard 1, serial printing information 2 and the corresponding relation of mainboard 2, serially printing is believed
The corresponding relation etc. of breath 3 and BMC.
In order to get the identification information of the mainboard belonging to serial printing information, for situation one and situation two,
Owing to FPGA sends the UART serial data of each mainboard by same UART bus to BMC,
Therefore, BMC cannot distinguish the UART serial data of each mainboard based on UART bus.Based on this,
Owing to FPGA knows that oneself currently obtain is the UART serial data of which mainboard, therefore, FPGA
When sending UART serial data to BMC, serially printing can be added in this UART serial data
The identification information of the mainboard belonging to information, so, BMC is after receiving UART serial data, it is possible to from
UART serial data gets the identification information of mainboard belonging to serial printing information.
For situation three to situation six, sent each master by then passing through different UART buses to BMC
The UART serial data of plate, and the corresponding unique mainboard of each UART bus, therefore, BMC can be with base
The UART serial data of each mainboard is distinguished in UART bus.Based on this, BMC is by certain
After UART bus receives UART serial data, it is possible to get the mainboard belonging to serial printing information
For the mainboard that this UART bus is corresponding, then get the identification information of this mainboard.
Certainly, UART serial ports number is being sent for situation three to situation six, FPGA or mainboard to BMC
According to time, it is also possible to added belonging to serial printing information in this UART serial data by FPGA or mainboard
The identification information of mainboard, so, BMC is after receiving UART serial data, it is possible to from UART
Serial data gets the identification information of mainboard belonging to serial printing information.
Wherein, BMC can pass through IPMI (Intelligent Platform Management Interface
Specification, IPMI specification) agreement, the UART serial data encapsulation that will get
Become UDP message.And based on current IPMI protocol, the UART serial data that BMC only can will get
The Information encapsulation such as (this UART serial data carries serial printing information), user name password is to UDP number
According to, without the mainboard belonging to encapsulation serial printing information or the identification information of BMC.
Based on this, in the embodiment of the present invention, current IPMI protocol can be modified, with based on repairing
After changing IPMI protocol encapsulation UART serial data time, can by the UART serial data got,
Mainboard or the Information encapsulation such as the identification information of BMC, user name password belonging to serial printing information arrive
UDP message.Or, it is also possible to use self-defining agreement, based on self-defining protocol encapsulation UART
During serial data, can by the mainboard belonging to the UART serial data got, serial printing information or
The Information encapsulations such as the identification information of BMC, user name password are to UDP message.
In the above embodiment of the present invention, BMC, FPGA, multiple mainboard all may be located at server (as micro-
Server or ARM server etc.) in, as being based in the server of Intel X86-based.
Based on technique scheme, in the embodiment of the present invention, BMC can manage multiple mainboard, and gets
The serial printing information of multiple mainboards, and be sent to remotely control by the serial printing information of these multiple mainboards
Platform, so that attendant can check the serial printing information of multiple mainboard on remote console, just simultaneously
Analyze and orientation problem in attendant.Such as, start asking of just there will be for certain multiple mainboard simultaneously
Topic, serial printing information based on a mainboard, attendant cannot analyze and orientation problem, but, as
Really attendant can view the serial printing information of multiple mainboard simultaneously, it is possible to analyze and location is asked
Topic, such that it is able to provide help for solving this problem.And, the serial ports of this BMC can also be beaten by BMC
Official seal breath is sent to remote console, so that attendant can check this BMC's on remote console
Serial printing information, it is simple to the problem that attendant analyzes and positions this BMC.
In the embodiment of the present invention, BMC is getting UART serial data (the UART serial ports number such as mainboard
According to and/or the UART serial data of BMC) after, it is also possible to from UART serial data, parse string
Mouth type information, and serial printing information is performed one or more of following operation:
Serial printing information be recorded storage device, such as SD card etc. by operation one, BMC.
In view of serial printing information in the case of Server Error misses, heavier to case study contrast locating
Wanting, and the error message of history is carried out preservation and also functions to vital effect, therefore, BMC is permissible
Serial printing information be recorded in storage device.So, in the case of BMC fault, it is possible to from
Storage device reads serial printing information, thus significantly facilitates the analyzing and positioning of problem.
Operation two, BMC provide the download function of serial printing information on the page.
By providing the download function of serial printing information on the page, so that attendant can be at BMC
Administration page on download to serial printing information, then utilize serial printing information analyzing and positioning problem.
Serial printing information is sent to subscriber equipment by operation three, BMC.
Not necessarily like downloading serial printing information, base on the administration page of BMC in view of attendant
In this, serial printing information can also be sent to user set after serial printing information packing compression by BMC
Standby, as being sent to the receiving platforms such as the mailbox of user, wechat, QQ, so that attendant can be from user
Equipment this locality gets serial printing information, then utilizes serial printing information analyzing and positioning problem.
Wherein, BMC can pass through SMTP (Simple Mail Transfer Protocol, simple mail transmission
Agreement) mode, SNMP (Simple Network Management Protocol, Simple Network Management Protocol)
TRAP (alert message) mode, FTP (File Transfer Protocol, file transfer protocol (FTP)) mode etc.,
Serial printing information after packing compression is sent to subscriber equipment.
Wherein, BMC can carry out packing compression according to the size of time period or serial printing information.
Operation four, BMC are that the 4th mainboard fictionalizes based on USB (Universal Serial Bus, general string
Row bus) virtual memory facilities of interface, and serial printing information is stored virtual memory facilities, so that
4th mainboard gets serial printing information by USB interface from virtual memory facilities.
Wherein, the 4th mainboard is intended merely to carry out district with the first above-mentioned mainboard, the second mainboard, the 3rd mainboard
Point, the example be given, the 4th mainboard can be any one mainboard in server.
Wherein, virtual memory facilities is virtual floppy disk equipment, virtual drive equipment, virtual hard disk equipment etc..
In actual applications, BMC can be mainboard install operating system, i.e. BMC be that mainboard fictionalizes base
In the virtual memory facilities of USB interface, being stored by operating system file in virtual memory facilities, mainboard is just
The operating system file in virtual memory facilities can be read, operating system is installed then.
On this basis, in the embodiment of the present invention, as shown in Figure 8, BMC can fictionalize based on USB
The virtual memory facilities of interface, and serial printing information is stored virtual memory facilities, such as, will operation
In one, record has the storage device of serial printing information to invent virtual memory facilities, so, owing to mainboard has
The CPU (Central Processing Unit, central processing unit) etc. of independent operating, therefore, mainboard is the most permissible
Read the serial printing information in virtual memory facilities, and utilize serial printing information analyzing and positioning problem, from
Without the participation of attendant, improve intellectuality and the reliability of server.In fig. 8, be with
Enter as a example by SDIO (Secure Digital Input and Output Card, secure digital input-output card) interface
Row explanation, in actual applications, it is also possible to for other type of interface.Under normal circumstances, set when storage
For during for SD card, then interface can be SDIO interface, when storage device is Nand Flash (with non-Flash)
Time, then interface can be Nand interface.
In the embodiment of the present invention, after parsing serial printing information from UART serial data, to string
Before mouth type information performs the process of operation one, operation two, operation three, operation four, BMC can also obtain
Timestamp information, and add timestamp information for serial printing information.So, operation one, operation two, behaviour
Work three, the process of operation four, be all the process to the serial printing information adding timestamp information.
Owing to containing timestamp information in serial printing information, therefore, attendant just can be with alignment error
What time period false information produces, and brings convenience to the time being accurately positioned generation problem.Additionally, dimension
The personnel of protecting can be based on the relatedness between timestamp information orientation problem, such as, based on timestamp information,
If problem 1 and problem 2 produced in the same time, then can analyze and exist between problem 1 and problem 2
Relatedness, otherwise, it is possible to analyze and between problem 1 and problem 2, there is not relatedness.
As it is shown in figure 9, be the handling process controlling information for serial ports, this process may include that
Step 901, BMC receives from the data after the encapsulation of remote console, in the data after this encapsulation
The identification information of information and the mainboard belonging to this serial ports control information is controlled including serial ports.
Wherein, the data after this encapsulation can be the UDP message that remote console is packaged into.
Wherein, this serial ports controls information for obtaining RAID (the Redundant Arrays of of mainboard
Independent Disks, raid-array) information such as information, hard disk quantity, board status.
Such as, when remote console needs the RAID information checking mainboard 1, owing to BMC is with multiple
Mainboard connects, and serial ports being controlled, which mainboard is information be sent to make BMC know, remotely control
Platform is in the data that BMC sends, including serial ports control information and mainboard 1 for inquiring about RAID information
Identification information, so, BMC knows that serial ports control information is sent to mainboard 1.
Step 902, the data after encapsulation are decapsulated by BMC, and the data after decapsulation include string
Mouth controls the identification information of information and this mainboard belonging to serial ports control information.
Wherein, UDP message deblocking can be dressed up UART serial data by BMC, the UART after decapsulation
Serial data parses serial ports and controls the identification information of information and this mainboard belonging to serial ports control information.
Step 903, BMC utilizes the identification information of the mainboard belonging to serial ports control information, is controlled by this serial ports
Information is sent to this mainboard belonging to serial ports control information.Such as, BMC utilizes the identification information of mainboard 1,
This serial ports control information is sent to the mainboard 1 belonging to this serial ports control information.
Wherein, BMC utilizes the identification information of the mainboard belonging to serial ports control information, and this serial ports is controlled information
It is sent to the process of this mainboard belonging to serial ports control information, can include but not limited to following situation:
Situation 1, as shown in Figure 4, disposes FPGA, the most multiple mainboards and BMC between BMC and mainboard
Carried out data transmission by FPGA.And, multiple mainboards are carried out with BMC by a UART bus
Data are transmitted.In the diagram, each mainboard to there being a lpc bus, each mainboard LPC by self
Bus carries out data transmission with FPGA, but, FPGA is only carried out with BMC by a UART bus
Data are transmitted, and so, each mainboard can be carried out data transmission with BMC by this unique UART bus.
BMC controls information and the mainboard belonging to serial ports control information by this UART bus by carrying serial ports
The UART serial data of identification information is sent to FPGA.UART serial data is converted into LPC by FPGA
Serial data, and utilize the identification information of mainboard belonging to serial ports control information, serial ports will be carried and control information
LPC serial data be sent to this mainboard belonging to serial ports control information.Wherein, in this LPC serial data
Can only carry serial ports and control information, it is also possible to carry serial ports and control information and the identification information of mainboard.
Situation 2, as shown in Figure 4, disposes FPGA, the most multiple mainboards and BMC between BMC and mainboard
Carried out data transmission by FPGA.And multiple mainboard is by a UART bus and BMC number
According to transmission.In the diagram, each mainboard to there being a UART bus, each mainboard UART by self
Bus carries out data transmission with FPGA, but, FPGA is only carried out with BMC by a UART bus
Data are transmitted, and so, each mainboard can be carried out data transmission with BMC by this unique UART bus.
BMC controls information and the mainboard belonging to serial ports control information by this UART bus by carrying serial ports
The UART serial data of identification information is sent to FPGA.FPGA utilizes the mainboard belonging to serial ports control information
Identification information, by carry serial ports control information UART serial data be sent to this serial ports control information institute
The mainboard belonged to.Wherein, this UART serial data can only carry serial ports and control information, it is also possible to carry
Serial ports controls information and the identification information of mainboard.
Situation 3 is as it is shown in figure 5, dispose FPGA, the most multiple mainboards and BMC between BMC and mainboard
Carried out data transmission by FPGA.And, multiple mainboards are carried out with BMC by multiple UART buses
Data are transmitted.In Figure 5, each mainboard is to there being a lpc bus, and the most each mainboard passes through self
Lpc bus carries out data transmission with FPGA, and, FPGA is by multiple UART buses and BMC
Carry out data transmission, so, each mainboard can a corresponding UART bus, and this mainboard pair can be passed through
The UART bus answered carries out data transmission with BMC.Wherein, when the quantity of mainboard, with FPGA and BMC
Between UART bus number identical time, the most each mainboard can a corresponding unique UART bus,
Such as, the corresponding mainboard of UART bus 11 between BMC with FPGA, the corresponding mainboard of UART bus 2
The corresponding mainboard 3 of 2, UART buses 3.Or, can there is the corresponding same UART bus of part mainboard,
And have UART bus free, such as, the corresponding mainboard of UART bus 11 between BMC with FPGA
With mainboard 2, the corresponding mainboard 3 of UART bus 2, UART bus 3 is idle.When the quantity of mainboard, with FPGA
With during UART bus number difference between BMC, the most each mainboard can a corresponding unique UART
Bus, for example, it is assumed that UART bus number is more than the quantity of mainboard, then between BMC and FPGA
The corresponding mainboard 1 of UART bus 1, the corresponding mainboard 2 of UART bus 2, the corresponding mainboard 3 of UART bus 3,
But UART bus 4 is idle.Or, can there is a corresponding same UART bus of part mainboard, such as,
Assume the UART bus number quantity less than mainboard, then the UART bus 1 between BMC and FPGA
Corresponding mainboard 1 and mainboard 2, the corresponding mainboard 3 of UART bus 2.It is, of course, also possible to have other mainboard with
The corresponded manner of UART bus, repeats no more in the present embodiment.
BMC determines the UART bus that the mainboard belonging to serial ports control information is corresponding, and by currently determining
UART bus controls the identification information of information and the mainboard belonging to serial ports control information by carrying serial ports
UART serial data is sent to FPGA.UART serial data is converted into LPC serial data by FPGA,
And utilize the identification information of mainboard belonging to serial ports control information, serial ports will be carried and control the LPC serial ports of information
Data are sent to this mainboard belonging to serial ports control information.Wherein, this LPC serial data can only carry
Serial ports controls information, it is also possible to carries serial ports and controls information and the identification information of mainboard.
Situation 4 is as it is shown in figure 5, dispose FPGA, the most multiple mainboards and BMC between BMC and mainboard
Carried out data transmission by FPGA.And, multiple mainboards are carried out with BMC by multiple UART buses
Data are transmitted.In Figure 5, each mainboard is to there being a UART bus, and the most each mainboard passes through self
UART bus carry out data transmission with FPGA, and, FPGA is by multiple UART buses and BMC
Carry out data transmission, so, each mainboard can a corresponding UART bus, and this mainboard pair can be passed through
The UART bus answered carries out data transmission with BMC.Wherein, corresponding with UART bus for mainboard
Mode, is referred to situation 3, does not repeats them here, with the UART bus 1 between BMC and FPGA
Corresponding mainboard 1, the corresponding mainboard 2 of UART bus 2, as a example by the corresponding mainboard 3 of UART bus 3.
BMC determines the UART bus that the mainboard belonging to serial ports control information is corresponding, and by currently determining
UART bus controls the identification information of information and the mainboard belonging to serial ports control information by carrying serial ports
UART serial data is sent to FPGA.FPGA utilizes the identification information of the mainboard belonging to serial ports control information,
The UART serial data carrying serial ports control information is sent to the mainboard belonging to this serial ports control information.Its
In, this UART serial data can only carry serial ports and control information, it is also possible to carry serial ports and control information
Identification information with mainboard.
Situation 5, as shown in Figure 6, does not disposes FPGA between BMC and mainboard, the most multiple mainboards with
BMC is directly carried out data transmission by UART bus, and, multiple mainboards are by multiple UART buses
Carry out data transmission with BMC.In figure 6, the corresponding mainboard of each UART bus.Such as, UART
The corresponding mainboard 1 of bus 1, the corresponding mainboard 2 of UART bus 2, the corresponding mainboard 3 of UART bus 3.
BMC determines the UART bus that the mainboard belonging to serial ports control information is corresponding, and by currently determining
The UART serial data carrying serial ports control information is sent to belonging to serial ports control information by UART bus
Mainboard.Wherein, this UART serial data can only carry serial ports and control information, it is also possible to carry serial ports
Control information and the identification information of mainboard.
Situation 6, as shown in Figure 6, does not disposes FPGA between BMC and mainboard, the most multiple mainboards with
BMC is directly carried out data transmission by lpc bus, and, multiple mainboards by multiple lpc bus with
BMC carries out data transmission.In figure 6, the corresponding mainboard of each lpc bus.Such as, lpc bus
1 corresponding mainboard 1, the corresponding mainboard 2 of lpc bus 2, the corresponding mainboard 3 of lpc bus 3.
BMC determines the lpc bus that the mainboard belonging to serial ports control information is corresponding, will carry serial ports and control information
UART serial data be converted to LPC serial data, and string will be carried by the lpc bus currently determined
Mouth controls the LPC serial data of information and is sent to the mainboard belonging to serial ports control information.Wherein, this LPC string
Mouth data can only carry serial ports and control information, it is possible to carry serial ports and control information and the identification information of mainboard.
For above-mentioned situation 1 to situation 6, in actual applications, can select between BMC and mainboard flexibly
Networking mode, selecting after certain networking mode, then using the processing mode of correspondence to process.Example
As, when BMC supports to be converted into LPC serial data UART serial data, and can BMC with
When disposing a lpc bus between each mainboard, then can use the networking mode of situation 6, and use feelings
Condition 6 processes.The most such as, do not support to be converted into LPC serial data UART serial ports number as BMC
According to, and when mainboard uses lpc bus, then can use situation 1 or the networking mode of situation 3, lead
Dispose FPGA between plate and BMC, and use situation 1 or situation 3 to process.
Based on technique scheme, in the embodiment of the present invention, BMC can manage multiple mainboard, and BMC can
To receive the serial ports control information from remote console and based on the mainboard belonging to this serial ports control information
Identification information, is sent to the mainboard of correspondence by this serial ports control information, thus when BMC controls multiple mainboard,
Serial ports can control information to be sent on mainboard, so that mainboard to be controlled.
Based on the inventive concept as said method, the embodiment of the present invention provides the transmission of a Serial Port Information
Device, the transmitting device of this Serial Port Information is applied on BMC.The transmitting device of this Serial Port Information can lead to
Cross software to realize, it is also possible to realize by the way of hardware or software and hardware combining.As a example by implemented in software,
As the device on a logical meaning, it is the processor of BMC by its place, reads non-volatile
Computer program instructions corresponding in memorizer is formed.For hardware view, as shown in Figure 10, for this
A kind of hardware structure diagram of the BMC at the transmitting device place of the Serial Port Information that invention proposes, except Figure 10 institute
Outside the processor that shows, nonvolatile memory, BMC can also include other hardware, such as responsible process message
Forwarding chip, network interface, internal memory etc.;From the point of view of from hardware configuration, this BMC is it is also possible that be distributed
Formula equipment, potentially includes multiple interface card, in order to carry out the extension of Message processing at hardware view.
As shown in figure 11, for the structure chart of transmitting device of the Serial Port Information that the present invention proposes, described serial ports is believed
The transmitting device of breath specifically includes:
Acquisition module 11, is used for obtaining data, and described data include belonging to Serial Port Information and described Serial Port Information
Identification information;
Sending module 12, for utilizing the identification information belonging to described Serial Port Information to send described data.
Described acquisition module 11, specifically for during obtaining data, obtains UART serial data,
Described UART serial data includes serial printing information, is packaged the UART serial data obtained;
Described sending module 12, specifically for utilizing the identification information belonging to described Serial Port Information to send described data
During, the UART serial data after encapsulation is sent to remote console;Wherein, the UART after encapsulation
Serial data includes the identification information belonging to serial printing information, described serial printing information.
The UART serial data that described UART serial data is mainboard that described acquisition module 11 obtains,
And/or, the UART serial data of described BMC;UART serial ports after the encapsulation of described acquisition module 11
Data include the identification information of the mainboard belonging to described serial printing information or BMC.
Described acquisition module 11, specifically for obtain described mainboard UART serial data during,
When mainboard is carried out data transmission by on-site programmable gate array FPGA with described BMC,
When described mainboard is carried out data transmission with described BMC by a UART bus, receive described
The UART serial data of the first mainboard that FPGA is sent by described UART bus;Wherein, described FPGA
Receive the UART serial data from described first mainboard, or by the low pin meter from described first mainboard
Number LPC serial data is converted into UART serial data;Or,
When described mainboard is carried out data transmission with described BMC by multiple UART buses, receive described
The UART serial data of described second mainboard that FPGA is sent by the UART bus that the second mainboard is corresponding;
Wherein, described FPGA receives from the UART serial data of described second mainboard, or will be from described the
The LPC serial data of two mainboards is converted into UART serial data;Or,
When mainboard is carried out data transmission by UART bus or lpc bus with described BMC,
When described mainboard is carried out data transmission with described BMC by multiple UART buses, receive the 3rd
The UART serial data that mainboard is sent by the UART bus that described 3rd mainboard is corresponding;Or,
When described mainboard is carried out data transmission with described BMC by multiple lpc bus, receive the 3rd main
The LPC serial data that plate is sent by the lpc bus that described 3rd mainboard is corresponding, and described receiving
During LPC serial data, described LPC serial data is converted into UART serial data.
Described acquisition module 11, is additionally operable to receive that described FPGA is sent by described UART bus the
Before the UART serial data of one mainboard, send described first mainboard by local bus to described FPGA
The request message of UART serial data so that described FPGA obtains the UART string of described first mainboard
Mouth data, and send the UART serial data of described first mainboard.
The transmitting device of described Serial Port Information: processing module 13, for obtaining UART at described acquisition module 11
After serial data, from described UART serial data, parse serial printing information, and to described serial ports
Type information performs one or more of following operation: described serial printing information be recorded storage device;
The page provides the download function of described serial printing information;Described serial printing information is sent to user
Equipment;It is that the 4th mainboard fictionalizes virtual memory facilities based on general-purpose serial bus USB interface, and by institute
State serial printing information and store described virtual memory facilities, so that described 4th mainboard is connect by described USB
Mouth gets described serial printing information from described virtual memory facilities.
Described processing module 13, be additionally operable to parse from described UART serial data serial printing information it
After, before one or more of operation following to the execution of described serial printing information, obtain timestamp letter
Breath, and add described timestamp information for serial printing information.
Described acquisition module 11, specifically for during obtaining data, receives from remote console
Data after encapsulation, and the data after described encapsulation are decapsulated, the data after decapsulation include
Serial ports controls the identification information of the mainboard belonging to information and described serial ports control information;
Described sending module 12, specifically for utilizing the transmission of the identification information belonging to described Serial Port Information described
During data, utilize the identification information of mainboard belonging to described serial ports control information, by described serial ports control
Information processed is sent to the mainboard belonging to described serial ports control information.
Described sending module 12, believes specifically for the mark at the mainboard utilized belonging to described serial ports control information
Breath, during described serial ports control information is sent to the mainboard belonging to described serial ports control information,
When multiple mainboards are carried out data transmission by on-site programmable gate array FPGA with described BMC,
When the plurality of mainboard is carried out data transmission with described BMC by a UART bus, pass through
Described UART bus controls the mark of the mainboard belonging to information and described serial ports control information by carrying described serial ports
The UART serial data of knowledge information is sent to described FPGA, so that described FPGA utilizes described serial ports control
The identification information of the mainboard belonging to information processed, sends out the UART serial data carrying described serial ports control information
Give the mainboard belonging to described serial ports control information, or, the LPC string of described serial ports control information will be carried
Mouth data are sent to the mainboard belonging to described serial ports control information;Or,
When the plurality of mainboard is carried out data transmission with described BMC by multiple UART buses, determine
The UART bus that mainboard belonging to described serial ports control information is corresponding, and total by the UART that currently determines
Line controls the identification information of information and the mainboard belonging to described serial ports control information by carrying described serial ports
UART serial data is sent to described FPGA, so that described FPGA utilizes belonging to described serial ports control information
The identification information of mainboard, the UART serial data carrying described serial ports and controlling information is sent to described string
Mouth mainboard belonging to control information, or, described serial ports will be carried and control the LPC serial data transmission of information
To the mainboard belonging to described serial ports control information;Or,
When multiple mainboards are carried out data transmission by UART bus or lpc bus with described BMC,
When the plurality of mainboard is carried out data transmission with described BMC by multiple UART buses, determine
The UART bus that mainboard belonging to described serial ports control information is corresponding, and total by the UART that currently determines
The UART serial data carrying described serial ports control information is sent to belonging to described serial ports control information by line
Mainboard;Or,
When the plurality of mainboard is carried out data transmission with described BMC by multiple lpc bus, determine institute
State the lpc bus that the mainboard belonging to serial ports control information is corresponding, and will be taken by the lpc bus currently determined
The LPC serial data controlling information with described serial ports is sent to the mainboard belonging to described serial ports control information.
Wherein, the modules of apparatus of the present invention can be integrated in one, it is also possible to separates and disposes.Above-mentioned mould
Block can merge into a module, it is also possible to is further split into multiple submodule.
Through the above description of the embodiments, those skilled in the art is it can be understood that arrive the present invention
The mode of required general hardware platform can be added by software to realize, naturally it is also possible to by hardware, but very
In the case of Duo, the former is more preferably embodiment.Based on such understanding, technical scheme is substantially
The part contributed prior art in other words can embody with the form of software product, this computer
Software product is stored in a storage medium, including some instructions with so that a computer equipment (can
To be personal computer, server, or the network equipment etc.) perform the side described in each embodiment of the present invention
Method.It will be appreciated by those skilled in the art that accompanying drawing is the schematic diagram of a preferred embodiment, the mould in accompanying drawing
Block or flow process are not necessarily implemented necessary to the present invention.
It will be appreciated by those skilled in the art that the module in the device in embodiment can according to embodiment describe into
Row is distributed in the device of embodiment, it is also possible to carry out respective change be disposed other than one of the present embodiment or
In multiple devices.The module of above-described embodiment can merge into a module, it is possible to is further split into multiple
Submodule.The invention described above embodiment sequence number, just to describing, does not represent the quality of embodiment.
The several specific embodiments being only the present invention disclosed above, but, the present invention is not limited to this,
The changes that any person skilled in the art can think of all should fall into protection scope of the present invention.