JPS5953401U - First-order delay calculator - Google Patents

First-order delay calculator

Info

Publication number
JPS5953401U
JPS5953401U JP14824082U JP14824082U JPS5953401U JP S5953401 U JPS5953401 U JP S5953401U JP 14824082 U JP14824082 U JP 14824082U JP 14824082 U JP14824082 U JP 14824082U JP S5953401 U JPS5953401 U JP S5953401U
Authority
JP
Japan
Prior art keywords
order delay
delay calculator
diagram showing
resistor
control system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14824082U
Other languages
Japanese (ja)
Inventor
中山 有三
Original Assignee
株式会社島津製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社島津製作所 filed Critical 株式会社島津製作所
Priority to JP14824082U priority Critical patent/JPS5953401U/en
Publication of JPS5953401U publication Critical patent/JPS5953401U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はボイラの給水制御系を示す図、第2図は第1図
に示したボイラ給水制御系の制御回路の構成を示すブロ
ック図、第3図a、  bは第2図に示した制御回路に
よる第1図のボイラ給水制御系のポンプスピード′特性
、及び弁差圧特性を示す図、第4図は他の制御回路の一
部の構成を示すブロック図、第5図a、  bは第4図
に示す制御回路による第1図のボイラ給水制御系のポン
プスピード特性、及び弁差圧特性を示す図、第6図はこ
の考案を説明するのに参考的に示す他の一次遅れ演算器
のブロック図、第7図はこの考案の一実施例を示す回路
接続図、第8図a、  bは第7図の実施例回路を第2
図の制御回路に使用した場合のボイラ給水制御系のポン
プスピード特性及び弁差圧特性を示す図である。 21:入力端子、22:基準電位端子、23:出力端子
、24・25:演算増幅器、26:リレー、27:リレ
ー接点、28:リレーコイル、29:クイック指令入力
端子、R:抵抗、C:コンデンサ。
Figure 1 is a diagram showing the boiler feed water control system, Figure 2 is a block diagram showing the configuration of the control circuit of the boiler feed water control system shown in Figure 1, and Figure 3 a and b are shown in Figure 2. A diagram showing the pump speed' characteristics and valve differential pressure characteristics of the boiler feed water control system in Figure 1 by the control circuit, Figure 4 is a block diagram showing the configuration of a part of the other control circuit, and Figures 5 a and b. is a diagram showing the pump speed characteristics and valve differential pressure characteristics of the boiler feed water control system in Figure 1 using the control circuit shown in Figure 4, and Figure 6 is a diagram showing other first-order delays shown for reference to explain this invention. 7 is a circuit connection diagram showing one embodiment of this invention; FIGS. 8a and 8b are the second embodiment of the circuit of FIG.
It is a figure which shows the pump speed characteristic and valve differential pressure characteristic of a boiler feedwater control system when used in the control circuit of a figure. 21: Input terminal, 22: Reference potential terminal, 23: Output terminal, 24/25: Operational amplifier, 26: Relay, 27: Relay contact, 28: Relay coil, 29: Quick command input terminal, R: Resistor, C: capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 抵抗及びコンデンサからなる一次遅れ回路と、前記抵抗
の両端に接続されるスイッチング手段と、このスイッチ
ング手段をオン・オフ動作させる手段とよりなる一次遅
れ演算器。
A first-order lag calculator comprising a first-order lag circuit comprising a resistor and a capacitor, switching means connected to both ends of the resistor, and means for turning on and off the switching means.
JP14824082U 1982-09-29 1982-09-29 First-order delay calculator Pending JPS5953401U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14824082U JPS5953401U (en) 1982-09-29 1982-09-29 First-order delay calculator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14824082U JPS5953401U (en) 1982-09-29 1982-09-29 First-order delay calculator

Publications (1)

Publication Number Publication Date
JPS5953401U true JPS5953401U (en) 1984-04-07

Family

ID=30329416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14824082U Pending JPS5953401U (en) 1982-09-29 1982-09-29 First-order delay calculator

Country Status (1)

Country Link
JP (1) JPS5953401U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55113159A (en) * 1979-02-23 1980-09-01 Hitachi Denshi Ltd Capstan motor drive control system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55113159A (en) * 1979-02-23 1980-09-01 Hitachi Denshi Ltd Capstan motor drive control system

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