JPS5952970A - System for processing tv signal - Google Patents

Abstract

PURPOSE:To reduce the flickering on a large screen TV, by installing a memory which stores the signal of one horizontal scanning and a delay circuit of one-field scanning time, and scanning the outputs from the delay circuit at a double speed. CONSTITUTION:When signals having one-field information and represented by A, B,..., respectively, are successively inputted into an AD converter 15, the signals are converted into digital signals and the signals A, C, and E are supplied to a delay circuit 17 and memory 19 and the other signals B, D, and F are supplied to another pair of delay circuit 18 and memory 20 by means of a switch 16. Since the delay circuits 17 and 18 have a delay time of one-field scanning time only, the same content is read out for two times within one horizontal scanning time, and TV signals converted into analog signals at DA converters 21 and 22 are alternately outputted via a switch 23 which performs the change- over operation at 1/2 horizontal scanning time.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a television signal processing method that increases the apparent resolution and brightness of a screen and reduces flicker.

Conventional configurations and their problems In recent years, large-screen televisions using projectors (
(hereinafter referred to as large screen TVs) are becoming popular. These large screen TVs are often viewed at approximately the same observation distance as conventional ones, that is, the viewing angle between scanning lines is often larger than conventional ones. On the other hand, in the current interlaced TV screen, the emission frequency between adjacent scanning lines is 30 Hz, so when watching a large screen TV, the screen may flicker or appear rough and dark.

As a solution to the above problems, there has conventionally been a television receiver that utilizes a memory for video signals for one horizontal scan.

The above-mentioned television receiver will be described below with reference to FIGS. 1 and 2. FIG. 1 shows the configuration of the signal processing section. In Figure 1, 1 is an AD converter that converts the video input signal into digital, 2 is a switch that switches the connection of the output signal of 1 to 3 or 4 every horizontal scanning time, and 3 and 4 are each within one horizontal scanning period. 6 to 8 are delay circuits each having a horizontal scanning time of %,
9 is an arithmetic circuit that arithmetic averages the output signals of 4 and 7 (adds them and then multiplies them by %); 10 is an arithmetic circuit that arithmetic averages the output signals of 3 and 8; 11 is an input from 5 and 9 A switch 12 switches the input signals from 6 and 10 and outputs them to 13 every % horizontal scanning time. 13 switches the input signals from 11 and 12 and outputs them to 13. A switch 14 is a DA converter which switches and outputs every horizontal scanning time.

After a video input signal is converted into a digital signal by an AD converter 1, information within one horizontal scan is stored in a memory 3 or 4 by a switch 2. The contents of memories 3 and 4 are read out at time Z, which is one normal horizontal scanning time. The read signals are sent directly or after passing through a delay circuit to the arithmetic circuit 9 or 1o or the switch 11 or 1.
2, passes through switch 13, and is input to 14. For example, if signals A, B, C, D, etc. each having information for one horizontal scan are sequentially input to the DA converter 14, the DA converter 14 will be ,
A+ l B+-Σ-2C2 薯"、D.

. . . signals each having information for one horizontal scanning period are output.

FIG. 2 shows a scanning operation in a television receiver configured as described above. In this television receiver, horizontal scanning of 525 scanning lines from 1 to 525 is performed within the scanning time of one field in the conventional ink-lace system. However, on even-numbered scanning lines, signals that are the arithmetic average of adjacent odd-numbered signals are recorded, or on odd-numbered scanning lines, signals that are the arithmetic average of adjacent even-numbered signals are recorded. Repeat what is said in turn.

However, in a television receiver configured as described above, when thin diagonal lines as shown in FIG. 3 are drawn on the screen, for example, the light emission frequency between adjacent scanning lines becomes 6 oHz or more, which reduces flicker. Originally, a line segment on a certain scanning line should be displayed by emitting light from one pixel (marked ◎ in the figure), but it is displayed by emitting light from a plurality of pixels (marked O in the figure). As a result, diagonal lines become thick and blurry. In other words, if you draw multiple thin lines of the same thickness on the screen of this receiver, but at different angles of inclination, the thin lines with a gentle slope will appear thicker and blurry, whereas the normal line of constant thickness will be drawn. I can't.

OBJECTS OF THE INVENTION The present invention solves the above two problems, reduces flickering on the screen, and provides high quality bright TV images.

Structure of the Invention A video signal processing unit according to the present invention includes a switch that divides a video input signal into two signals of one field scanning time, a delay circuit that delays each signal by one field scanning time, and a switch that divides a video input signal into two signals of one field scanning time apart. It consists of a memory that stores horizontal scanning signals, and switches and switches that combine the signals read from each memory. In the video signal processing method according to the present invention, an input signal is divided into two signals at intervals of one field scanning time using a switch, each signal is stored in a memory directly or after being delayed by one field scanning time, and the contents of each memory are are read out at double the normal speed and the screen is scanned with the combined signal.

DESCRIPTION OF EMBODIMENTS FIG. 4 shows an example of the configuration of a signal processing section of a television receiver according to the present invention. In FIG. 4, 15 is an A/D converter, 16 is a switch that switches the connection of 15 output signals to 17 and 18 every 1 field scanning time, and 17
and 18 are delay circuits each corresponding to one field scanning time;
19 is a memory for storing a video signal for one horizontal scanning line corresponding to the output signal from 16 or 17; 20 is a memory for storing a video signal for one horizontal scanning line for the output signal from 16 or 18; 21 and 22 are D/A converters, and 23 is a switch that switches and outputs the output signals of 21 and 22 every % horizontal scanning time. For example, 16
Assuming that signals each having information for one field such as A, B, C, D, E, F, etc. are input sequentially to the input terminal, they are converted into digital signals at step 16.
is input. At 16, the signals A, C, E, . . . are output to 17 or 19, and the signals B, D, F, . The signal input to 17 is delayed by one field scanning time and outputted from 19-\. The signal input to 18 is delayed by one field scanning time and output to 20. The signal for one horizontal scan stored at 19 is read out in % horizontal scanning time (the same content is read out twice within one horizontal scanning time) and the D/A is stored at 21.
It is converted and output to 23. 21 output signals and 2
2 output signals ij:23 are output alternately at % horizontal scanning time.

FIG. 5 shows an example of the video input signal input to 15 and the output signal from 6. In Figure 6, A, B, C
, D each indicate a signal for one field scan. A1
．． A2. A3... and B1. B2. B3...
...and C1, C2, C3...Dl, B2. B3・
. . . indicates signals for one horizontal scan of A, B, C, and D, respectively.

By scanning 625 scanning lines in one field scanning time using the output signal 23 in FIG. 4, it is possible to provide a high-quality image with reduced flickering.

Effects of the Invention As described above, the present invention provides a memory for storing signals for one horizontal scan and a delay circuit for one field scanning time, and scans the output from this at twice the normal speed.
Even on large-screen TVs, it is possible to provide high-quality bright images with reduced flicker.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a signal processing section of a conventional television receiver, FIG. 2 is a block diagram of a signal processing section of a conventional television receiver, and FIG. 6 is a block diagram of a signal processing section of a conventional television receiver. FIG. 3 is a diagram showing video input signals and output signals in the signal processing section of the machine. 15...A/D converter, 16.23...
...5W117.18...Delay circuit, 19,2
0...Memory, 21.22...D/A
converter.

Claims (1)

[Claims] The circuit includes a delay circuit that delays a video input signal by a scanning time of one field, and a memory that stores a signal for one horizontal scan of the video input signal, reads out the contents of the memory twice, and uses the readout signal as a signal. , a television signal processing method characterized by horizontal scanning at twice the normal speed.