JPS5951585A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5951585A JPS5951585A JP57162563A JP16256382A JPS5951585A JP S5951585 A JPS5951585 A JP S5951585A JP 57162563 A JP57162563 A JP 57162563A JP 16256382 A JP16256382 A JP 16256382A JP S5951585 A JPS5951585 A JP S5951585A
- Authority
- JP
- Japan
- Prior art keywords
- gaas
- type
- laser
- fet
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/026—Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers
- H01S5/0261—Non-optical elements, e.g. laser driver components, heaters
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Junction Field-Effect Transistors (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は光装置と電気装置を同一基板上に形成す乙オプ
トエレクトロニクス集積回路の製造方法に関するもので
ある。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of manufacturing an optoelectronic integrated circuit in which optical devices and electrical devices are formed on the same substrate.
オプトエレクトロニクス集積回路は、光通信。Optoelectronics integrated circuits, optical communications.
データ処理装置、小型化、高速化等で注目されている8
従来例の構成とその問題点
オプトエレクトロニクス集積回路の1例とじてレーザー
とFET(電界効果トランジスタ)の集積化について説
明する。Data processing devices are attracting attention due to their miniaturization, high speed, etc. 8. Conventional configurations and their problems As an example of an optoelectronic integrated circuit, the integration of a laser and a FET (field effect transistor) will be explained.
第1図は半絶縁性基板を用いてレーザとFETを集積化
した1例である。FIG. 1 is an example of integrating a laser and FET using a semi-insulating substrate.
半絶縁性GaAs (S −I −GaAs )基板1
に不純物を添加しないGa 1−xAl xAs (x
ζO64,undopedGaAgAs)2を形成する
。このundoped GaAlAs2はレーザ光の閉
じこめのためのへテロ構造として働くと同時にFET0
高抵抗バッファ層として働く。undoped GaA
lAs2上にキャリヤ濃度約1017cm−5,厚さ○
。2〜0゜3 p rn のn型GaAs(n−Ga
As)3をエピタキシセル成長形成する。 n −Ga
As 3はレーザ、FETの活性領域として働く。n
−GaAs3上にクランド層となるp型Ga 1−xA
l xAs (x鴎。4゜p −GaAlAs ) 4
及びオーミックコンタクト層を形成するためのp型Ga
As (p−GaA+ 36を形成する1、これらの層
は液相エピタキシャル法を用いて形成する−
次にレーザ、FETを形成するためメザエ、チングを用
いて7埴1図の様にFET形成部分及びレーザ形成部分
の周辺部のp−GaAs 、 p−GaAlAsを除去
して選択的にp−GaAlAs4,4a、 p−GaA
s5,5aを残す。メサエッチングはレーザのアノード
となる電極6および電極6につながるパッド電極6aと
してAu−Zn6および電極6につながるパッド電極6
aとしてAu−Znを選択的に形成して、このAu−Z
nをエツチングのマスクとして用いてエツチングした。Semi-insulating GaAs (S-I-GaAs) substrate 1
Ga 1-xAl xAs (x
ζO64, undoped GaAgAs)2 is formed. This undoped GaAlAs2 acts as a heterostructure for confining laser light and at the same time
Works as a high resistance buffer layer. undoped GaA
Carrier concentration on lAs2 about 1017 cm-5, thickness ○
. n-type GaAs (n-Ga
As) 3 is formed by epitaxy cell growth. n-Ga
As 3 acts as an active region of a laser and FET. n
- p-type Ga 1-xA that becomes a ground layer on GaAs3
l xAs (x gull.4゜p -GaAlAs) 4
and p-type Ga for forming an ohmic contact layer.
As (p-GaA+ 36 is formed 1, these layers are formed using the liquid phase epitaxial method - Next, to form the laser and FET, using a mezae and a chimney, the FET forming part is formed as shown in Figure 1). And p-GaAs and p-GaAlAs in the peripheral area of the laser forming part are removed to selectively form p-GaAlAs4,4a and p-GaA.
Leave s5 and 5a. Mesa etching is performed using Au-Zn 6 as an electrode 6 which becomes the anode of the laser, a pad electrode 6a connected to the electrode 6, and a pad electrode 6 connected to the electrode 6.
By selectively forming Au-Zn as a, this Au-Zn
Etching was performed using n as an etching mask.
p−GaAlAs4a 、 p−GaAs 5 aはパ
ッド部分となる。FETは露出したn−GaAs3上に
Au−Geを形成してソースSウドレインDの電極7,
8を設はゲート電極9としてはAlを設けて、FET形
成される。レーザに順方向電圧を印加すると、p −G
aAlAs 4からホールが活性領域であるn−GaA
s 3に注入され、FETのドレイン領域から電子が注
入され、ドレイン領域としてレーザ部の間のn−GaA
s3を通って、レーザ部の活性領域で再結合し、光lを
発光する。レーザ光lの変調はFETのゲートに印加す
る電圧によって行う。p-GaAlAs4a and p-GaAs5a become pad portions. In the FET, Au-Ge is formed on the exposed n-GaAs3 to form source S, drain D electrodes 7,
8, Al is provided as the gate electrode 9, and an FET is formed. When a forward voltage is applied to the laser, p −G
aAlAs n-GaA where holes from 4 are active regions
s3, electrons are injected from the drain region of the FET, and the n-GaA between the laser parts is used as the drain region.
s3, recombines in the active region of the laser section, and emits light l. The laser beam I is modulated by a voltage applied to the gate of the FET.
上記製造法の欠点はFET部の活性領域をレーザの活性
領域と同じエピタキシャル法で形成するので、キャリヤ
濃度、厚みの最適化が図れない。A drawback of the above manufacturing method is that the active region of the FET section is formed by the same epitaxial method as the active region of the laser, so that carrier concentration and thickness cannot be optimized.
又エツチングでp−GaAs 、 p−GaAlAsを
除去しFETの活性領域であるn−GaAsを露出させ
るため、所望のn型GaAs 3の厚みでエツチングを
停止するのが困難である。Furthermore, since p-GaAs and p-GaAlAs are removed by etching and n-GaAs, which is the active region of the FET, is exposed, it is difficult to stop the etching at a desired thickness of n-type GaAs 3.
発明の目的
本発明は上記欠点をなくしたオプトエレクトロニクス集
積回路の新しい製造方法を提供するものである。OBJECTS OF THE INVENTION The present invention provides a new method for manufacturing optoelectronic integrated circuits that eliminates the above-mentioned drawbacks.
発明の構成
本発明の骨子は半絶縁性化合物半導体基板の所望の領域
に所望の不純物濃度分布を形成し、しかる後所望の領域
にエピタキシャル法を用いて光の発光、受光領域を形成
するものである3゜実施例の説明
以下本発明を基板としてGa Asを用い、レーザとF
ETの集積化を実施例で説明する。第2図は本発明を説
明するだめの断面図である。半絶縁性GaAs基板11
にイオン注入用のマスクを用いて、Sl をイオンを
選択的に注入し、注入イオンを活1/1.化ぜしめるた
め熱処理し、高濃度n型GaAs層12は、n型GaA
s層13を形成する。高濃度n型GaAs層12はFE
Tのソース、ドレイン領域及O・レーザの高濃度n型層
領域となる(第2図a)。Structure of the Invention The gist of the present invention is to form a desired impurity concentration distribution in a desired region of a semi-insulating compound semiconductor substrate, and then to form light emitting and light receiving regions in the desired region using an epitaxial method. Description of a certain 3° embodiment The present invention will be described below using GaAs as a substrate, laser and F
The integration of ET will be explained using an example. FIG. 2 is a cross-sectional view for explaining the present invention. Semi-insulating GaAs substrate 11
Then, using an ion implantation mask, ions of Sl were selectively implanted, and the implanted ions were activated at a rate of 1/1. Heat treatment is performed to harden the high concentration n-type GaAs layer 12.
An s-layer 13 is formed. The high concentration n-type GaAs layer 12 is made of FE
These become the source and drain regions of T and the high concentration n-type layer region of O/laser (FIG. 2a).
レーザ形成領域のみ露出し露出部14′以外の他の部分
を絶縁膜14で保護する(第2図b)。分子線エヒリキ
ノヤル法を用いてTI添加のn型Ga1.、、xAdx
As (x−0,4)15.無添加GaAs 16を0
・2 /Z rr+、、 Ge添加のp型Ga1−xA
lxAS(x−0,4)17 、 Ge添加のp型Ga
As 18を形成する。絶縁膜14上には多結晶GaA
s 、GaAlAs 19が形成される(第2図C)。Only the laser forming region is exposed, and the other parts other than the exposed portion 14' are protected with an insulating film 14 (FIG. 2b). TI-doped n-type Ga1. ,,xAdx
As (x-0,4)15. Additive-free GaAs 16 to 0
・2 /Z rr+, Ge-added p-type Ga1-xA
lxAS(x-0,4)17, Ge-doped p-type Ga
As 18 is formed. Polycrystalline GaA is formed on the insulating film 14.
s, GaAlAs 19 is formed (Figure 2C).
レーザ部のp型GaAs 1 BにAu−Znからなる
p型電極2oを形成し、p型電極20をエツチングのマ
スクとして用いて、多結晶G aAs 、Ga #As
を除去し、絶縁膜14を露出させる。写真食刻法を用い
て絶縁膜14に窓開けを行い、Au−Ge合金を用いて
ソース電極21.ドレイン電極22を、Al金属を用い
てゲート電極23を形成する(第2図d)。A p-type electrode 2o made of Au-Zn is formed on the p-type GaAs 1 B of the laser section, and using the p-type electrode 20 as an etching mask, polycrystalline GaAs, Ga #As are formed.
is removed to expose the insulating film 14. A window is formed in the insulating film 14 using photolithography, and a source electrode 21 is formed using an Au-Ge alloy. A drain electrode 22 and a gate electrode 23 are formed using Al metal (FIG. 2d).
実施例から明らかな様にFETの活性領域、ソース、ド
レイン領域をイオン注入法を用いて、半絶縁性GaAs
に形成するので、レーザを駆動するに最適のFETのキ
ャリヤ濃度分布が形成できる。As is clear from the examples, the active region, source, and drain regions of the FET are made of semi-insulating GaAs using ion implantation.
Therefore, a carrier concentration distribution of the FET optimal for driving a laser can be formed.
エピタキシャル法で形成した結晶はレーザ部は単結晶で
FET部は多結晶が成長する様FET形成部に絶縁膜を
設けているので、FET部キャリヤ濃度分布に影響を与
えずに多結晶部分のみ容易に除去することが出来る。又
第1図ではFETの活性領域を介してレーザ部と接続し
ているので、し=ザとFET間の直列抵抗が増大し、レ
ーザの高速変調が損なわれる。−力木実施例では高濃度
n+領領域2を介してレーザ部と接続しているので、レ
ーザとFET間の直列抵抗が減少し、レーザの高速変調
が可能となる。The crystal formed by the epitaxial method is a single crystal in the laser part, and an insulating film is provided in the FET formation part so that polycrystals grow in the FET part, so only the polycrystal part can be easily grown without affecting the carrier concentration distribution in the FET part. can be removed. Further, in FIG. 1, since the FET is connected to the laser section through the active region, the series resistance between the laser and the FET increases, impairing high-speed modulation of the laser. - In the power tree embodiment, since it is connected to the laser part through the high concentration n+ region 2, the series resistance between the laser and the FET is reduced, and high-speed modulation of the laser is possible.
発明の詳細
な説明した様に本発明は、光装置と電気装置を同一基板
に形成するため、半絶縁性基板の所望の領域に所望の不
純物濃度分布を形成し、しかる後所望の領域にエピタキ
シャル法を用いて光の発光又は受光領域を形成すること
により、FETのキャリヤ濃度分布の最適化が図れ、素
子製作が容易になり、変調速度の高速化等のオプトエレ
クトロニクスの性能向上を図る製造方法であシその工業
的価値は犬なるものである。As described in detail, in order to form an optical device and an electrical device on the same substrate, the present invention forms a desired impurity concentration distribution in a desired region of a semi-insulating substrate, and then epitaxially coats the desired region. By forming a light emitting or light receiving region using a method, the carrier concentration distribution of the FET can be optimized, device fabrication becomes easier, and the performance of optoelectronics such as faster modulation speed can be improved. Its industrial value is that of a dog.
なお実施例ではレーザとFETの一体化の製造方法につ
いて説明したが、受光素子とFET、レーザと論理回路
等の一体化にも用いられるし、半絶縁性化合物半導体基
板としてGaAsで説明したInP、Garb等を用い
て良いし、不純物導入法としてイオン注入法で説明した
が拡散法、エピタキシャル法を用いても良い、レーザ部
の形成に分子線エピタキシャル法を用いたが、気相エピ
タキシャル法等で用いても良い。又絶縁膜上の多結晶を
除去した後FETを形成したが、絶縁膜上の多結晶は単
結晶に比して高抵抗なので多結晶を残存してFET部を
形成しても良い。Although the manufacturing method for integrating a laser and FET has been described in the embodiment, it can also be used for integrating a photodetector and FET, a laser and a logic circuit, etc. InP, which was explained using GaAs, as a semi-insulating compound semiconductor substrate, Garb etc. may be used.Although the ion implantation method was explained as an impurity introduction method, a diffusion method or an epitaxial method may also be used.Molecular beam epitaxial method was used to form the laser part, but vapor phase epitaxial method etc. May be used. Although the FET was formed after removing the polycrystal on the insulating film, since the polycrystal on the insulating film has a higher resistance than a single crystal, the FET portion may be formed with the polycrystal remaining.
第1図は従来例のレーザとFETの一体化構造図、第2
図a −dは本発明を説明するだめの一実施例にかかる
レーザとFETの一体化製造工程概略図である。
11・・・・・・半絶縁性GaA s基板、12・・・
・・・高濃度n型GaAs、 13・・・・・・n型G
aAs層、14・・・・・・絶縁膜、15・・・・・・
Tl添加n型Ga1−xAlxAs (x=0.4)、
16−−−−・−無添加GaAs、 17−印・Ge添
添加現型Ga1xAexAs、 18・・・・・・p型
GaAs −、19・・・・・・多結晶GaA3 +
GaAlAs 。Figure 1 is a diagram of the integrated structure of a conventional laser and FET, Figure 2
Figures a to d are schematic diagrams of a laser and FET integrated manufacturing process according to an embodiment of the present invention. 11... Semi-insulating GaAs substrate, 12...
...High concentration n-type GaAs, 13...n-type G
aAs layer, 14... Insulating film, 15...
Tl-doped n-type Ga1-xAlxAs (x=0.4),
16-----.-Unadded GaAs, 17--Marked/Ge-added current Ga1xAexAs, 18...p-type GaAs -, 19... Polycrystalline GaA3 +
GaAlAs.
Claims (1)
した後、前記領域の所望の部分に絶縁膜を設置し、しか
る後光を発光又は受光する層を前記絶縁膜を設けない領
域にエピタキシセル法を用いて形成することを特徴とす
る半導体装置の製造方法。After selectively forming regions with different impurity concentrations on a semi-insulating substrate, an insulating film is provided in a desired part of the region, and a layer that emits or receives light is epitaxially applied to the region where the insulating film is not provided. A method for manufacturing a semiconductor device, characterized in that it is formed using a cell method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57162563A JPS5951585A (en) | 1982-09-17 | 1982-09-17 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57162563A JPS5951585A (en) | 1982-09-17 | 1982-09-17 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5951585A true JPS5951585A (en) | 1984-03-26 |
Family
ID=15756963
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57162563A Pending JPS5951585A (en) | 1982-09-17 | 1982-09-17 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5951585A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4940672A (en) * | 1989-03-17 | 1990-07-10 | Kopin Corporation | Method of making monolithic integrated III-V type laser devices and silicon devices on silicon |
US4996163A (en) * | 1988-02-29 | 1991-02-26 | Sumitomo Electric Industries, Ltd. | Method for producing an opto-electronic integrated circuit |
JP2005311151A (en) * | 2004-04-23 | 2005-11-04 | Japan Science & Technology Agency | Lattice matching tunnel diode and method for manufacturing the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5228886A (en) * | 1975-08-30 | 1977-03-04 | Fujitsu Ltd | Method for production of semiconductive emitter device |
JPS55154794A (en) * | 1979-05-21 | 1980-12-02 | Ibm | Integrated circuit |
-
1982
- 1982-09-17 JP JP57162563A patent/JPS5951585A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5228886A (en) * | 1975-08-30 | 1977-03-04 | Fujitsu Ltd | Method for production of semiconductive emitter device |
JPS55154794A (en) * | 1979-05-21 | 1980-12-02 | Ibm | Integrated circuit |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4996163A (en) * | 1988-02-29 | 1991-02-26 | Sumitomo Electric Industries, Ltd. | Method for producing an opto-electronic integrated circuit |
US4940672A (en) * | 1989-03-17 | 1990-07-10 | Kopin Corporation | Method of making monolithic integrated III-V type laser devices and silicon devices on silicon |
JP2005311151A (en) * | 2004-04-23 | 2005-11-04 | Japan Science & Technology Agency | Lattice matching tunnel diode and method for manufacturing the same |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4819036A (en) | Semiconductor device | |
US4987468A (en) | Lateral heterojunction bipolar transistor (LHBT) and suitability thereof as a hetero transverse junction (HTJ) laser | |
EP0165798B1 (en) | Semiconductor device comprising n-channel and p-channel transistors and production method | |
EP0194197B1 (en) | Heterojunction bipolar transistor and process for fabricating same | |
EP0033137B1 (en) | Semiconductor laser device | |
JPS62189762A (en) | Manufacture of semiconductor device on iii-v group compound substrate | |
CA1049127A (en) | Semiconductor devices with improved heat radiation and current concentration | |
Coleman et al. | Single‐longitudinal‐mode metalorganic chemical‐vapor‐deposition self‐aligned GaAlAs‐GaAs double‐heterostructure lasers | |
US5164797A (en) | Lateral heterojunction bipolar transistor (LHBT) and suitability thereof as a hetero transverse junction (HTJ) laser | |
JPH0719934B2 (en) | Laser diode array and manufacturing method thereof | |
EP0405832A1 (en) | Doping procedures for semiconductor devices | |
JPS5951585A (en) | Manufacture of semiconductor device | |
EP0188352B1 (en) | A method for the production of semiconductor devices using liquid epitaxy | |
EP0367411A2 (en) | Heterojunction semiconductor devices and methods of making the same | |
JPH09246527A (en) | Semiconductor device | |
JPH0834338B2 (en) | Semiconductor laser | |
JPS6357949B2 (en) | ||
KR100234350B1 (en) | Fabricating method of compound semiconductor device | |
KR950002206B1 (en) | Semiconductor laser manufacturing method | |
KR960002646B1 (en) | The compound semiconductor device and the manufacturing method thereof | |
JPS6045082A (en) | Semiconductor laser integrated circuit device | |
JP2685776B2 (en) | Semiconductor light emitting device and method of manufacturing the same | |
KR950001148B1 (en) | Hetero-junction bipolar transistor and manufacturing method thereof | |
JPS60211972A (en) | Optical integrated circuit | |
JPH05190970A (en) | Manufacturing method of semiconductor laser |