JPS5950616A - Method of operating mos field effect transistor circuit device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is characterized in that a load is connected to a common connection point of two MO8 field effect transistors connected in series to a power supply, and both MO8 field effect transistors are connected in series.
The 8 field-effect transistors are MOs whose drive is controlled by staggered timing so that the input times slightly overlap.
The present invention relates to a method of operating a field effect transistor circuit device and a monitoring device for carrying out the method.

Such methods have been implemented in commercially available circuits.

The technical background of the present invention will be explained with reference to FIGS. 1 and 2. In a series circuit of MO8 field effect transistors (hereinafter referred to as MO8FET) connected to a power supply,
For example, a part of a bridge circuit consisting of four MO8FETs 1 to 4 is shown. A load 5 consisting of, for example, an inductive component 5a and a resistive component 5b is connected between the output diagonal points of this bridge circuit. As shown by MOS FETs 1 to 4, the bridge circuit shown is a DC current regulator (
It can be operated as a chopper) or an inverter. In either case, even when MOS FETs 1 to 4 are turned off, a current path must be created for the load current IL to continue flowing due to the effect of the inductive component 5a. For this reason, in an inverter transistor or a DC current regulator made of bipolar transistors, a seven-way wheeling diode is connected in antiparallel to each transistor. In this case, the specific properties of the MO8FET are advantageous. That is, the MOS FET includes bipolar antiparallel-connected diodes 13 to 4a each integrated into an integrated circuit, as shown by broken lines in FIG. Since these diodes 1a to 4a are used as freewheeling diodes, there is no need to connect another 7-way wheeling diode in parallel to the MOS FET.

However, the integrated diodes la-4a, unlike other diodes, cannot be switched from the on state to the off state arbitrarily quickly. This type of diode has a reverse current due to its stored charge. The integrated diodes 1a-4a operate extremely fast compared to normal bipolar diodes, but slower than those between the drain and source of a MOS FET.

The problems arising from the above will be explained with reference to FIG. It is assumed that all MOS FETs 1 to 4 are in the off state until time t, and the load current IL due to the effect of the inductive component 5a (3) flows through the integrated diodes 4a and 1a. That is, the load current IL flows through the MOS FETI in the opposite direction, for example. M
The voltage U2 generated in OS FET2 is connected to diode 1a.
Ignoring the slight voltage drop in , it is equal to the input voltage UE.

At time t1, MOS FET 2 is turned on by input pulse UG2. This allows the MOS
The voltage U2 present across FET 2 falls to zero relatively quickly. At this time, the load current 'TJ is from diode 1a to MO
The current is commutated to the drain-source section of S FET 2. The current i flowing through MOSFET 1 then decreases and the current 12 flowing through MOSFET 2 increases accordingly. However, diode 1a does not turn off immediately and conducts a reverse current for a certain period of time, which must be absorbed by MOSFET 2. Only at time t2, diode 1a begins to turn off, and the MOS FET
The current 11 (4) IL that flows through 1 must also flow.

The off time of diodes 1a to 4a is MOS FET1 to
Since the switching time is relatively long compared to the switching time of 4, a considerably large reverse current pulse flows, which may exceed the tolerance of the MOS FET in some cases. This always occurs when the current is commutated from the diode that was turned on during this period to the other MOSFET that was turned on. Either the newly inserted MOS FET turns on very quickly, or the diode that was previously conducting current does not turn off immediately, effectively creating a short circuit between the terminals of the power supply.

Various measures have been proposed to solve this problem. For example, International Rectif
ier's publication "The HEXFBT's I"
integral Re-verse Rectifier
r-A11Hidden” Bonus for the
C1rcuit Designer'', this of one commutation process is carried out, for example, by means of a series reactor.

However, this series reactor creates new problems due to its energy storage effect. Another possibility for suppressing reverse current is to prolong the switching time of the MOS FET. The integrated diode then has sufficient time to switch to the off state. Such an extension of the switching time can be achieved, for example, by slowly increasing the gate pulse. However, by doing so, one loses much of the important advantage of MOS FETs, namely their short switching times.

Moreover, during the extended switching time, correspondingly large switching losses also occur.
In a circuit in which FETs are connected in parallel, a method of slowly increasing the gate pulse cannot be applied due to variations in switching time.

Magazine "Siemens Forschungs-un"
d Entwi (Hk-1 (7)) The drive control pulse UG2 is 8-tightened and becomes 204.
Page Paper” Driving the SIPMO
8Field-Effect Transistor
as a Fast PowerSwitch
When the MOS FET is turned on when the reverse voltage is high due to I+, the current flowing through the integrated diode flows into the MOS FET.

It is known that the current is commutated from the source circuit.

In that case, the drain is controlled to conduct in both directions.
The source section can be thought of as a resistor connected in parallel with a diode.

This effect is also utilized in commercially available circuit devices. Note that the MOS FB'I' connected in series are turned on alternately with slight overlap. In that case, the freewheeling current is primarily at the drain of the transistor.
Flowing through the source section, only a small amount of accumulated charge is stored in the integrated diode. The reverse current of the integrated diode is significantly reduced. In FIG. 2, the slight overlap (8) with the drive control pulse UG1, the brief but brief freewheeling current, and the peak reverse current at 12 are shown in dashed lines.

In such a commercially available circuit device, MO8FET1
-4 are driven and controlled using push-pull connected magnetic pulse transformers. In that case, two M
A common pulse X) lance is provided for the OS FETI, 2 or 3, 4, and the secondary winding of the pulse transformer must be insulated against the entire operating voltage.
' The position of the effective drive control pulse for MO8F'ET 1-4 is given when the gate threshold voltage is reached. The relative positions of the drive control pulses must be set very accurately. In other words, if the overlap width of the drive control pulses is too wide, two MO
S FETs 1 and 2 or 3 and 4 are bridged through a series circuit, resulting in large short circuit currents. On the other hand, the 1D absorbs the accumulated charge thereby.

In that case, the effective time constant for accumulated charge is approximately 100n
It is S. That is, the surface drive control pulses UGI, UG
2.

The relative position of must have a tolerance within 100 ns. However, such small tolerances are extremely difficult to achieve due to device variations and temperature-related gate threshold voltages.

SUMMARY OF THE INVENTION It is therefore an object of the invention to provide the method mentioned at the outset in such a way that the drive control of a reverse-operating transistor takes place at the correct time interval irrespective of its gate threshold voltage.

This purpose is achieved by the present invention, in which each MO8FET is
This is achieved by monitoring the voltage developed in the source section by a monitoring device and applying a drive pulse to the MO8FET when said voltage is applied in the opposite direction of the MO8FET. That is, control is not provided by a drive control circuit, but by a voltage monitoring device for the resulting voltage. This monitoring device precisely drives and controls the MOS FET when the integrated diode is activated in the conducting direction. That is, by doing so,
It can always be avoided that the diode takes up the entire freewheeling current and therefore has a large stored charge. In the present invention, the drive control time width is independent of the tolerance of the drive control circuit and the gate threshold voltage of the MOS FET, and therefore its position can be set extremely accurately. Moreover, the present invention can be implemented at low cost.

The monitoring device can be easily realized by connecting the drain and source terminals of each MO8FET to both input terminals of a comparator, and connecting the output terminal of the comparator to the gate of the MOS FET. 'ET is driven and controlled at desired time intervals.

The comparator has a diode connected in parallel on the input side, and the input terminal of the comparator is connected to the M
It can be configured to be connected between the source and drain terminals of the OS PET. By connecting the diode, the input voltage of the comparator can be limited by the cooperation with the resistor.

The invention will now be explained in more detail with reference to the embodiment of FIG. In the embodiment of FIG. 3, only the MOS FET 1 in the bridge circuit of FIG. 1 is shown. The drain-source section of MOS FET 1 is bridged by a series circuit of resistor 7 and diode 8. The cathode of diode 8 is MOS F
Connected to the source terminal of ET1. diode 8
The anode of the diode 8 is connected to the negative input terminal of the comparator 6, and the cathode of the diode 8 is connected to the positive input terminal. The output terminal of the comparator 6 is connected to the first input terminal of the adder 9, and the second input terminal of the adder 9 is connected to the MOS FET1.
is connected to the drive control terminal for the Finally, adder 9
The output terminal of is connected to the gate of MOS FET 1.

As long as diode 1a of MOS FET 1 is conductive, voltage Ul is negative. Therefore, the comparator 6 outputs a small output of II I I+ and controls MO8FETI to be in a conductive state. The corresponding voltage diagram of the output voltage of comparator 6 is shown in FIG. 2 as U6. M.O.
Due to the driving control of S FET 1, the drain-source section carries most of the negative current 11 flowing through MO8FETI. This causes the diode 1 to
It is possible to avoid generating a large accumulated charge in a,
Rapid shutoff can be achieved.

When MOS FET 2 is turned on according to the diagram in FIG. 2, a current l flows through MOS FET 1.

decreases as the current 12 flowing through MOS FET 2 increases. As soon as the current 11 passes through the zero point, the MOS FET
The output switches to “11+1.” This causes the MOSFE
The drain-source section of T1 is cut off, while the diode la carries a constant peak reverse current. However, since the charge stored in the diode 1a is small, the peak reverse current shown in FIG. 2 is relatively small. M.O.S.
FET 1 takes on a positive voltage and the output of comparator 6 is maintained at 11111, thereby causing MOS
FET l is kept off. The input voltage of the cosparator 6 is limited by the diode 8.

In this way the MOS FETI is turned off and the MO
When SFET2 is turned on, comparator 6 outputs a negative voltage. When both MO8FETs 1 and 2 are turned off, no current flows and MOS FET I.

2, a positive voltage or zero voltage occurs at the input of the comparator 6. In that case, the comparator 6 does not supply a drive control pulse to the MOS FET 1. When MOSFET2 is turned off, comparator 6 drives MOSFET1 as described above.

Of course, each MO8FET 1-4 must be provided with the monitoring device of FIG. Thus MOS FET
The reverse current can be reduced independently of the drive control circuits for 1 to 4. The switching on of the input-source path can be carried out optimally and accurately, as long as the associated integrated diode conducts current in its conduction direction. That is, by doing so, the generation of a large accumulated charge in the diode 1a during the entire current conduction time is prevented.

On the other hand, there is no risk that the drain-source section will remain under control for a long time and cause a short circuit. In this way the reverse current in the diode can be minimized.

The drive control is independent of individual MOSFET tolerances.

[Brief explanation of drawings]

Fig. 1 is a connection diagram showing an example of a circuit having two MOSFETs connected in series to a power supply, Fig. 2 is a diagram of signals of each part for detailed explanation of the present invention, and Fig. 3 is a diagram according to the present invention. FIG. 2 is a connection diagram showing one embodiment of a monitoring device. 1.2,3.4-=MO8FET, la, 2a. 3a, 4a... integrated diode, 5...
・Load, 6... Comparator, 7... Resistor, 8
...Diode, 9...Adder.

Claims (1)

[Claims] 1) A load is connected to a common connection point of two MO8 field effect transistors connected in series to a power supply, and both MO8 field effect transistors are connected in time so that their turn-on times slightly overlap. In a method of operating an MO8 field effect transistor circuit device whose drive is controlled in a staggered manner, each MO8
The MO8 field effect transistor is characterized in that the voltage occurring in the drain-source section of the MO8 field effect transistor is monitored by a monitoring device, and when the voltage is applied in the opposite direction of the MO8 field effect transistor, a driving pulse is given to each MO8 field effect transistor. How to operate an effect transistor circuit device. 2. In the operating method according to claim 1, the drain and source terminals of each MO8 field effect transistor are connected to both input terminals of a comparator, and the output terminal of the comparator is connected to the gate of the MO8 field effect transistor. A method of operating an MO8 field effect transistor circuit device, characterized in that: 3) In the method described in claim 2, a diode is connected in parallel to the input side of the comparator, and the input end of the comparator is further connected to the source/drain terminal of the MO8 field effect transistor via a resistor. A method of operating an MO8 field effect transistor circuit device, characterized in that: