JPS5950089B2 - Manufacturing method of semiconductor rectifier - Google Patents
Manufacturing method of semiconductor rectifierInfo
- Publication number
- JPS5950089B2 JPS5950089B2 JP6334677A JP6334677A JPS5950089B2 JP S5950089 B2 JPS5950089 B2 JP S5950089B2 JP 6334677 A JP6334677 A JP 6334677A JP 6334677 A JP6334677 A JP 6334677A JP S5950089 B2 JPS5950089 B2 JP S5950089B2
- Authority
- JP
- Japan
- Prior art keywords
- plating
- plating film
- manufacturing
- silicon
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Description
【発明の詳細な説明】
本発明は半導体整流装置、特にNiメッキはかれのはい
半導体整流装置の製法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor rectifier, and particularly to a method for manufacturing a semiconductor rectifier using Ni plating.
PN接合形成の完了したシリコン上に電極膜を形成する
為に無電解Niメッキを施しているが、現在シリコンと
Niメッキ膜のオーミックな接触を得る為に、Niメッ
キ前処理として硝酸、弗酸、酢酸、ヨウ素の混酸を使用
してエッチングを行なつている。Electroless Ni plating is performed to form an electrode film on the silicon after the PN junction has been formed, but currently, nitric acid or hydrofluoric acid is used as a pre-treatment for Ni plating to obtain ohmic contact between the silicon and the Ni plating film. Etching is performed using a mixed acid of , acetic acid, and iodine.
この前処理法によるとエッチングスピードが速いために
エッチング后シリコン表面上に無数のピンホール状の凹
部(以下エッチングピットと略記)が見られる。この状
態にてNiメッキを施し、シリコンとNiメッキ膜のよ
りオーミックな接触を得る為に、H2雰囲気により熱処
理をするとN面よりNiメッキ膜がはがれてくる。According to this pretreatment method, since the etching speed is high, countless pinhole-shaped recesses (hereinafter abbreviated as etching pits) are observed on the silicon surface after etching. When Ni plating is performed in this state and heat treatment is performed in an H2 atmosphere to obtain more ohmic contact between the silicon and the Ni plating film, the Ni plating film peels off from the N surface.
Niメッキ前処理としてエッチングする事によりシリコ
ン上に無数のエッチピットが発生し、このエッチピット
の部分は他の表面より表面積が多くNiメッキ析出スピ
ードが早い。一方、無電解NiメッキはNiの析出と同
時に水素ガスが発生する。特にエッチピットの部分によ
り多くの水素ガスが発生しNiメッキ膜が形成されるが
水素ガスはエッチピット部に残り、Niメッキ膜熱処理
時にエッチピット部に残つた水素ガスは熱処理により熱
膨張しNi膜を破壊し、表面に出る。このNiメッキ膜
中に存在する水素ガスの為にNiメッキ膜はがれ不良が
多発しシリコンとNiメッキ膜のオーミック接触が得ら
れないという欠点があつた。本発明製法の目的は上記欠
点を除去し、よりよフいオーミック接触、メッキ品質を
得ることができる半導体整流装置の製法を提供すること
にある。By etching as a pretreatment for Ni plating, countless etch pits are generated on the silicon, and the etch pit portions have a larger surface area than other surfaces and the Ni plating precipitation speed is faster. On the other hand, in electroless Ni plating, hydrogen gas is generated at the same time as Ni is deposited. Particularly, a large amount of hydrogen gas is generated in the etch pit area and a Ni plating film is formed, but the hydrogen gas remains in the etch pit area, and the hydrogen gas remaining in the etch pit area during heat treatment of the Ni plating film thermally expands due to the heat treatment and the Ni plating film is formed. It destroys the membrane and comes to the surface. Due to the hydrogen gas present in the Ni plating film, the Ni plating film frequently peels off, and ohmic contact between silicon and the Ni plating film cannot be achieved. An object of the manufacturing method of the present invention is to provide a method for manufacturing a semiconductor rectifier that eliminates the above-mentioned drawbacks and can provide better ohmic contact and plating quality.
本発明製法の特徴はNiメッキ前処理に重量比で弗酸:
硝酸■1:70の混酸を用いてエッチングする事により
エッチピットの発生を少なくし、シ7 リコン両面によ
りオーミック接触を得てメッキ膜はがれ不良をなくすこ
とにある。以下、実施例に基づいて本発明製法を説明す
る。The manufacturing method of the present invention is characterized by the weight ratio of hydrofluoric acid:
By etching with a mixed acid of 1:70 nitric acid, the occurrence of etch pits can be reduced, and ohmic contact can be obtained between both sides of the silicone to eliminate defects in plating film peeling. Hereinafter, the manufacturing method of the present invention will be explained based on Examples.
先ず、PN接合形成の完了したシリコンを重量比で弗酸
:硝酸1:70の混酸を用いてエツチングする。この重
量比で弗酸:硝酸=1:70の混酸のエツチスピードは
1秒間に0.04μ、前記した従来のエツチング液のエ
ツチスピードは1秒間に0.16μと1/4のエツチス
ピードでゆるやかでシリコン面にできるエツチピツトは
浅く傾斜がなだらかなものでNiメツキ膜はがれ不良を
生ずるような傾斜が急で深いエツチピツトは表われず酸
化しない。次にこの様にして得られたシリコン上に無電
解Niメツキを施すとシリコン両面に均一なNiメツキ
膜が得られ同時に同一表面にもバラツキなく安定したN
iメツキ膜が形成される。First, the silicon on which the PN junction has been formed is etched using a mixed acid having a weight ratio of hydrofluoric acid and nitric acid of 1:70. At this weight ratio, the etch speed of a mixed acid of hydrofluoric acid: nitric acid = 1:70 is 0.04 μ per second, and the etch speed of the conventional etching solution mentioned above is 0.16 μ per second, which is a gentle etch speed of 1/4. The etch pits formed on the silicon surface are shallow and have a gentle slope, and the etch pits that are steep and deep and cause poor peeling of the Ni plating film do not appear and are not oxidized. Next, when electroless Ni plating is applied to the silicon obtained in this way, a uniform Ni plating film is obtained on both sides of the silicon, and at the same time, a stable Ni plating film is obtained evenly on the same surface.
An i-plated film is formed.
次に熱処理(700℃)を加えてもNiメツキ膜はがれ
不良を生ずるようなエツチピツトが存在しないため水素
ガスは存在せず、Niメツキ膜を破壊することなく、N
i−シンターー層が形成され、より良いオーミツク接触
が得られる。Next, even if heat treatment (700°C) is applied, there are no etch pits that would cause the Ni plating film to peel off, so there is no hydrogen gas, and the Ni plating film is not destroyed.
An i-sinter layer is formed to provide better ohmic contact.
単位面積当りのピンホール数を測定したところ、従来の
前処理液ではシリコンのP型面に500〜2000個/
一、N型面には9000〜25000個/一存在したが
本発明になる前処理液ではP型面には500〜1700
個/一、N型面には4000〜10000個/一存在し
ていた。When we measured the number of pinholes per unit area, we found that with conventional pretreatment liquid, there were 500 to 2000 pinholes/unit area on the P-type surface of silicon.
1. On the N-type surface, there were 9000 to 25,000 particles per unit, but in the pretreatment liquid of the present invention, there were 500 to 1700 on the P-type surface.
There were 4000 to 10000 pieces/1 on the N-type surface.
一方、エツチピツト数とNiメツキ膜はがれ不良率との
関係はエツチピツト数が10000個/一までは0%で
30000個/一で10%、50000個/一で約25
%で上記の如く、本発明によれば、N型面で10000
個/一程度でエツチピツトその物がNiメツキ膜はがれ
不良を生じ難い形状であるのでNiメツキ膜はがれ不良
率は0%であつた。On the other hand, the relationship between the number of etching pits and the defect rate due to Ni plating film peeling is 0% when the number of etching pits is up to 10,000 pieces/piece, 10% when it is 30,000 pieces/piece, and about 25% when the number of etching pits is 50,000 pieces/piece.
%, as mentioned above, according to the present invention, the N-type surface is 10,000
The Ni plating film peeling defect rate was 0% because the etch pit itself was shaped so that the Ni plating film did not easily peel off.
本発明製法により従来発生した不良率5〜6%をほぼ0
%に押さえる事が出来た。The manufacturing method of the present invention has reduced the defective rate of 5-6% to almost 0.
I was able to keep it down to %.
Claims (1)
為に無電解Niメッキを施行するに際し、当該Niメッ
キ前処理として重量比で弗酸:硝酸=1:70の混酸を
使用して上記シリコン表面をエッチングすることを特徴
とする半導体整流装置の製法。1 When performing electroless Ni plating to form an electrode film on the silicon on which the PN junction has been formed, a mixed acid with a weight ratio of hydrofluoric acid: nitric acid = 1:70 is used as a pretreatment for the Ni plating. A method for manufacturing a semiconductor rectifier characterized by etching the surface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6334677A JPS5950089B2 (en) | 1977-06-01 | 1977-06-01 | Manufacturing method of semiconductor rectifier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6334677A JPS5950089B2 (en) | 1977-06-01 | 1977-06-01 | Manufacturing method of semiconductor rectifier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS53148966A JPS53148966A (en) | 1978-12-26 |
JPS5950089B2 true JPS5950089B2 (en) | 1984-12-06 |
Family
ID=13226581
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6334677A Expired JPS5950089B2 (en) | 1977-06-01 | 1977-06-01 | Manufacturing method of semiconductor rectifier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5950089B2 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4878099A (en) * | 1982-12-08 | 1989-10-31 | International Rectifier Corporation | Metallizing system for semiconductor wafers |
-
1977
- 1977-06-01 JP JP6334677A patent/JPS5950089B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS53148966A (en) | 1978-12-26 |
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