JPS5949637B2 - alarm device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in an alarm device in which a receiver sequentially calls a repeater using a polling method, collects necessary fire alarms, etc., and controls equipment installed in the repeater.

Conventionally, multiple repeaters are connected in parallel to a small number of common signal lines, and the receiver calls the repeaters in sequence. As an alarm device, a control signal is sent to the device to control terminal equipment such as a fire extinguisher installed there.
It is known that a receiver is equipped with a microcomputer so that all the information in the repeaters is sequentially sent to the receiver according to a program stored in a storage device, but when a large number of repeaters are installed, it takes a long time to go through one cycle. However, it could not be said that they could immediately respond to emergencies.

In view of the above-mentioned points, the present invention provides an alarm system that can immediately respond to an emergency situation in which it does not take long to go through one cycle even if a large number of repeaters are installed.

FIG. 1 is a block diagram of an alarm device according to the present invention.
is a receiver installed in the monitoring center, T1゜T2~Tn is a repeater installed on each floor of a building or each building, and Dl~Dn are logical signals that are grouped together for each warning area via electric lines L1~Ln. A fire or theft prevention device detector L is a receiver Re and each repeater T1. T2
This is a common main signal line connecting between Tn and Tn.

The receiver Re (see Fig. 2) includes a microprocessor 1 consisting of a logic operation unit, a group of registers, etc., a program that controls this microprocessor 1, and a repeater T1.
A storage device 2 consisting of RAM, ROM, etc., in which addresses of ~Tn, various commands, and various data are written and read, and a code signal generated by these means is modulated into the main signal EL, for example, by FM, and sent and received. A modem device 3 consisting of a modem and the like, and a microprocessor 1
It is comprised of a display device 4 that displays the processed results, for example, the area where the fire occurred, and an operation panel 5 that includes a power switch, a start switch, various control/test switches, and the like.

Further, the repeaters T1 to Tn include a microprocessor 6 configured similarly to that of the receiver Re, a program for controlling the operation of this repeater T, an address of this repeater T,
A RAM, ROM, etc., consisting of a fixed part in which the address of the data part is stored, which is rewritten at any time according to the instruction word and the operating state of the detectors D1 to Dn, and a data part in which the operation of the detector is written according to this address. Signals provided corresponding to the memory device 7 configured and the electrical circuits L1 to Ln, which are converted into "0" and "1" signals and sent indicating whether or not the detectors D1 to Dn are in operation for fire, etc. line t
Interface 8 that sequentially scans and detects 1 to tn
and a modem device 9 for sending and receiving signals to and from the main signal line and NL, as in the case of the receiver Re.

Furthermore, to explain the data section of the storage device 7, which is a characteristic part of the present invention, using the model shown in FIG. Detector D1 in 1 warning area
The operating status of the detector D2, such as the fire status, is in the 1st bit of the n+1st word, and the operating status of the detector D2 in the second warning area is in the 2nd bit of the n+1th word.
- The fire status of the 46th warning district is written in the 4th bit of the (n+7)th word with 1" indicating operation and '0' indicating non-operation.

Also, in this case, the n word which is the first word is provided as a specific word, the first bit of which is the logical sum of each bit of the n+1th word, and the second bit of which is the logical sum of each bit of the n+1th word.
The logical sum of the bits of the two words is written in the seventh bit, and the logical sum of the bits of the n+7th word is written in the seventh bit.

Furthermore, if there are 20 warning districts in repeater T2, the operating status of the detector in each district is written in at least the 6th bit of the n+1°n+2 word and the n+3 word according to the number of districts. Like, again n
The logical sum of the (n+1) to (n+3)th words is written in correspondence to the 1st to 3rd bits of the word.

Next, the operation of this device will be explained with reference to the flowchart shown in FIG.

When the start switch on the operation panel 5 of the receiver Re is turned on, the microprocessor 1 is set to the initial state, control is started according to the program stored in the storage device 2, and each As the start command signal is sent to the repeaters T1, T2, .

Each repeater T receives the start command signal via the modem device 9.
1. In T2 to Tn, the microprocessor 6 is set to an initial state in step S1, and the number N of the guard area where the operation of the detector is to be detected is set to 1 in step S2, and the process moves to step S3.

In step S3, the interface 8 is operated to open the gate to which the operation signal of the detector D1 in the first warning area is sent, and the process moves to step S4.

In step S4, the microprocessor 6 determines, for example, whether there is a fire or not. If there is no fire, the microprocessor 6 moves to step S5 and refers to the address of the detector D1 in the storage device 7 and stores the first bit of the predetermined (n+1)th word in the storage device 7. is set to 0'', and the process proceeds to step S6.

In step S6, the microprocessor 6 determines whether the number of the guarded area has reached the final number n of the repeater, and if N = n, the process returns to step S2.
In this case, N=1, so after NKI is added in step S7, the process returns to step S3, where the second warning area, the third warning area, and so on are repeated. As shown in the model, the 2nd and 3rd bits of the (n+1)th word, . . . the 4th bit of the (n+7th) word are set to "0", and step S6 is reached.

Since the microprocessor 6 determines N2n in step S6, the process returns to step S2 and the data portion is rewritten in accordance with the new operating states of the detectors D1 to Dn.

However, while this operation was repeated, the first
When a fire occurs in the 0 warning area and the detector is activated, the microprocessor 6, which finished writing the data for the 9th warning area and opened the 10th gate in step S3, determines that there is a fire in step S4.

Then, the microprocessor 6 moves to step S8, and while referring to the address of the storage device 7, sets the third bit of the (n+2)th word to l'' as shown in FIG. 5, and moves to step S9.

In step S9, the second bit of the n word, which is a specific word, is set to 1'' in response to the n+2 word stored as fire, and step S6 is reached, and the process returns to the normal route.

In this way, all repeaters T1. During T2 to Tn, the operation of the detector in the repeater is recorded in the storage device 7 at any time.
is written to the data portion of the word, is rewritten, and the logical sum of these words is written to the corresponding bit of the first word of the data portion.

Under the control of the receiver Re, the data portions of these storage devices 7 are instructed to sequentially attach the address code of their own repeater and send the first word n to the receiver Re.

The first word n sent to the receiver Re is decoded by the microprocessor 1 while referring to the storage device 2, and when it is determined that all bits of this word n are 0'',
Control is performed sequentially to call the first word of the next repeater.

However, if a fire occurred during this process and the data portion of the repeater's storage device 7 was rewritten as shown in Figure 5, the first word n was decoded by the receiver Re. At this time, it is determined that there is a fire because the second bit is set to 1''.

Furthermore, in the receiver Re, n corresponding to the second bit
+ Commands over the main signal line to send the contents of the 2 words to the receiver Re.

The n+2 word sent from the repeater is decoded by the microprocessor 1 while referring to the storage device 2, and the 3rd bit is set to 1'', so that the word n+2 is read from the 10th district of the repeater. A command is sent to the main signal line to display on the display device 4 that there is a fire, and to recall the first word n of the storage device 7 of the next repeater.

In this way, unless a fire occurs, each repeater T, ,
Since only the first word n of the storage device 7 of T2 to Tn continues to be sent to the receiver Re, all repeaters T
1. T2 to Tn can be called, and the time required to call a repeater where a fire or the like has occurred is shortened.

Fig. 6 is a model diagram of an embodiment of the storage device T of each repeater that uses the alarm device of this invention to control general equipment, etc., and detects the first warning area as in the case of Fig. 3. The operating status of the detector is in the 1st bit of the n+1 word, and the operating status of the detector in the second warning area is in the 2nd bit of the n+1 word.
...The fire status of the 46th warning district is configured to be written in the 4th bit of the n+7th word, and
An n word is provided as a specific word, the first bit of which is the logical sum of each bit of the n+1 word, and the second bit of which is the logical sum of each bit of the n+2 word. The 7th bit is configured to write the logical sum of each bit of the (n+7)th word.

Furthermore, the command codes for smoke evacuation equipment, evacuation guidance equipment, air-conditioning equipment, etc. are written in words n-1, n10s, n+9, etc., and all words in this storage device 7 are . . n-1 to n + 9 . . . The logical sum of the detectors is written in the first bit.

This storage device 7 is connected to the receiver Re almost similarly to the case shown in FIG.
and repeater T1. Writing and reading are controlled by the microprocessors 1 and 6 of T2 to Tn, and the microprocessor 6 in this embodiment is provided with step S10 as shown in the flowchart of FIG. 7 by the program in the storage device 7. storage device 7
The 0 bits of all words are set to 1''.

Therefore, as in the case of Figure 5, when a fire breaks out in the 10th alert area, the 3rd bit of the n+2 word and the 2nd bit of the nth word as a specific word become 'l' as shown in Figure 8. Furthermore, in step 810, the O bits of all words . . . n-1 to n+9 are set to l''.

Therefore, in this alarm device, if repeater 'r1j 'r2
Even if the monitoring information of the air conditioning system is called into the receiver Re via ~Tn, it is decoded that the first bit O of the contents of the n+9th word of the storage device 7 is set to l''. Then, the control of the heating and cooling equipment is temporarily interrupted and the control is switched to the same control as the embodiment shown in FIG. 3, in which the specific words n and n+2 words of the repeater are called, and the fire area can be determined.

Therefore, an alarm device equipped with such a storage device 7 can control general equipment as well, and can issue an alarm earlier than the embodiment shown in FIG.

□ In the above embodiment, the specific word n is one word, but depending on the number of guarded areas, it may be multiple words. Also, the specific word n is the first word of the data part, and the specific bit of all words is the Oth bit. However, it may also be used as the last word of the data section, or as the 7th bit.

In the alarm device of the present invention, a specific word or a specific word and a specific bit are provided in the data section of the storage device of the repeater, so even if a large number of repeaters are installed, it does not take much time to go through the emergency situation [ This has the effect of being able to respond immediately.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the alarm device of the present invention;
Figure 2 is a block diagram of the main parts of Figure 1, Figures 3 and 5.
6 and 8 are state model diagrams of different embodiments of the storage device of the repeater; FIGS. 4 and 7 are flowcharts for the storage device of FIGS. 3 and 6, respectively. Re...Receiver, T1. T2～Tn・・・・・・
・Repeater, Dl ~ Dn... Fire or theft prevention device detector; Ll ~ Ln... Electric line, L.
...Main signal line, 1,6...Microprocessor, 2,7...Storage device, 3.9...
...Modem device, 4...Display device, 5...
···Operation board.

Claims (1)

[Claims] 1. A plurality of repeaters are connected in parallel to a small number of common signal lines, the repeaters are sequentially called by the receiver, and necessary alarms such as fire are sent from the repeater to the receiver. In an alarm system in which a control signal is sent to a repeater to control terminal equipment such as a fire extinguishing system installed there, each repeater has at least the number of alert areas for fire, etc. detectors belonging to this repeater. The number of bits that match and the number of words to which these bits belong are those in which the presence or absence of a detector in each warning area is rewritten at any time, and the specific word in the latter is stored in this memory. 1. An alarm device characterized in that the alarm device is rewritten as needed by the logical sum of bits in each word of the device. 21. The alarm device according to claim 1, wherein a plurality of detectors are provided in the 21 warning area. 3. The alarm device according to claim 1, wherein the specific word of the storage device is composed of a plurality of words. 4. The alarm device according to claim 1, wherein the storage device is composed of bits and words, the first word of which is a specific word. 5. The alarm device according to claim 1, 3, or 4, wherein the storage device is controlled by a microprocessor provided in the repeater. 6. The alarm device according to claim 5, wherein the microprocessor provided in the repeater is controlled by a main microprocessor provided in the receiver. 7 Multiple repeaters are connected in parallel to a small number of common signal lines, and the receiver calls the repeaters one after another, and necessary alarms such as fire are transmitted from the repeater to the receiver, and then from the receiver to the repeater. In an alarm system that sends a control signal to control terminal equipment such as a fire extinguishing system, each repeater has at least a warning area for the fire detector belonging to this repeater. The number of bits that match the number of bits and the number of words to which these bits belong are rewritten as needed to indicate whether or not the detector in each warning area is operating, and the specific word of the latter is stored in this memory. The logical sum of the focus in each word of the device can be rewritten at any time, and the specific bit of all the words of this storage device is characterized by the logical sum of the operation of the detector of this repeater or the one that can be rewritten at any time. alarm device. 8. The alarm device according to claim 7, wherein a plurality of detectors are provided in the warning area. 9. The alarm device according to claim 7, wherein the specific word of the storage device is composed of a plurality of words. 10. The alarm device according to claim 7, wherein the storage device is composed of bits and words, the specific word being the first word, and the specific bit being the 0th bit. 11. The alarm device according to claim 7, 9, or 10, wherein the storage device is controlled by a microprocessor provided in the repeater. 12. The alarm device according to claim 11, wherein the microprocessor provided in the repeater is controlled by a main microprocessor provided in the receiver.