JPS5948073U - hybrid integrated circuit - Google Patents
hybrid integrated circuitInfo
- Publication number
- JPS5948073U JPS5948073U JP14380782U JP14380782U JPS5948073U JP S5948073 U JPS5948073 U JP S5948073U JP 14380782 U JP14380782 U JP 14380782U JP 14380782 U JP14380782 U JP 14380782U JP S5948073 U JPS5948073 U JP S5948073U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- integrated circuit
- hybrid integrated
- lower resistor
- printed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の厚膜混成集積回路の平面図、第２図は第
１図の厚膜混成集積回路の厚膜抵抗体の部分の断面図、
第３図はこの考案の混成集積回路の一実施例の構成を示
す断面図、第４図はこの考案の混成集積回路の他の実施
例を示す断面図である。
１・・・・・・アルミナ基板、２・・・・・・導体、４
・・・・・・下部抵抗体、５・・・・・・上部抵抗体。FIG. 1 is a plan view of a conventional thick film hybrid integrated circuit, and FIG. 2 is a sectional view of the thick film resistor portion of the thick film hybrid integrated circuit of FIG.
FIG. 3 is a sectional view showing the configuration of one embodiment of the hybrid integrated circuit of this invention, and FIG. 4 is a sectional view showing another embodiment of the hybrid integrated circuit of this invention. 1... Alumina substrate, 2... Conductor, 4
...Lower resistor, 5...Upper resistor.
Claims (1)
パターンを有する導体と、この導体および上記アルミナ
基板上に印刷して乾燥した後に焼成された下部抵抗体と
、この下部抵抗体上にこれとはシート抵抗値を異にして
印刷および乾燥した後、上記下部抵抗と同上に焼成する
ことにより形成されかつ下部抵抗体とともにそれとの合
成抵抗値を有する厚膜印刷抵抗体を得る上部抵抗体とに
よりなる混成集積回路。A conductor having a predetermined pattern formed by printing and firing on an alumina substrate, a lower resistor printed on this conductor and the alumina substrate, dried and fired, and a lower resistor formed on the lower resistor. is printed and dried with different sheet resistance values, and then baked on top of the lower resistor to obtain a thick film printed resistor having a combined resistance value with the lower resistor and the upper resistor. A hybrid integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14380782U JPS5948073U (en) | 1982-09-22 | 1982-09-22 | hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14380782U JPS5948073U (en) | 1982-09-22 | 1982-09-22 | hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5948073U true JPS5948073U (en) | 1984-03-30 |
Family
ID=30320889
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14380782U Pending JPS5948073U (en) | 1982-09-22 | 1982-09-22 | hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5948073U (en) |
-
1982
- 1982-09-22 JP JP14380782U patent/JPS5948073U/en active Pending
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