JPS5947857A - System for inserting additional circuit in stereo modulator and demodulator - Google Patents

System for inserting additional circuit in stereo modulator and demodulator

Info

Publication number
JPS5947857A
JPS5947857A JP15870682A JP15870682A JPS5947857A JP S5947857 A JPS5947857 A JP S5947857A JP 15870682 A JP15870682 A JP 15870682A JP 15870682 A JP15870682 A JP 15870682A JP S5947857 A JPS5947857 A JP S5947857A
Authority
JP
Japan
Prior art keywords
signal
circuit
signals
sum
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15870682A
Other languages
Japanese (ja)
Inventor
Toshihiko Suzuki
敏彦 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
EIDEN KK
Original Assignee
EIDEN KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EIDEN KK filed Critical EIDEN KK
Priority to JP15870682A priority Critical patent/JPS5947857A/en
Publication of JPS5947857A publication Critical patent/JPS5947857A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/86Arrangements characterised by the broadcast information itself
    • H04H20/88Stereophonic broadcast systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/44Arrangements characterised by circuits or components specially adapted for broadcast
    • H04H20/46Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95
    • H04H20/47Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95 specially adapted for stereophonic broadcast systems
    • H04H20/48Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95 specially adapted for stereophonic broadcast systems for FM stereophonic broadcast systems

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To reduce noise of a sum signal or a difference signal at a low frequency stage, by inserting an additional circuit such as noise reduction circuit to either a sum signal line or a difference signal line between a matrix circuit and a de-matrix circuit. CONSTITUTION:The matrix circuit M receives left and right signals L, R and outputs the sum signal L+R and the difference signal L-R. The de-matrix circuit DM receives the signals L+R and L-R, and outputs individually the signals L and R. The additional circuit U0 such as noise reduction circuit is inserted to either line between the circuits M and DM. The signals L, R are switched at switching circuits U1, U2 and superimposed, and outputted as a carrier suppression AM modulation signal forming a composite signal for main carrier modulation. In this case, the noise in the signal L-R at the low frequency stage is reduced with the circuit U0.

Description

【発明の詳細な説明】 この発明はTV音声多重放送等に1史用するスデレオ変
φ復調器に差信号(L  Ii)寸だ&j、オ[1信号
(L+IOのノイズ低減用回路等の付JtyS回r1′
J全挿入するイツ〃チ回路挿入方式に係る。
[Detailed Description of the Invention] The present invention provides a difference signal (L Ii) size, 1 signal (L + IO noise reduction circuit etc. JtyS times r1'
This relates to the one circuit insertion method where all J is inserted.

従来のステレオ変・復調器をAM−FM方式のスイッチ
ング方式ステレオ変調器に例をとシ第1図を用いて説明
する。第1図中性号(IH2+はそれぞれ左信号(第1
音声信号)Lお上び右1計シーi(2+’+ 2音声信
号)Rの入力端子、U、U2υ、第1、i(G 2のス
イッチング回路、LPF、 LPF2は第1.11!2
のローパスフィルタ、U3は重畳器、(3)は出力ず・
;IA子、(711(51は副搬送波f8の入力端子で
ある。そして入力端子(11(2)にそれぞれ左信号り
および右信号■くが入力すると、この左信号りおよび右
信号Rが、i−l”; Iスイッチング回路U、および
第2スイッヂング1I−1l路U2において副搬送波f
6でスイッチングされ第10−・パスフィルタLPF 
、および第20−バスフイルタLPF2の出ノJ端には
それぞれL −1−(L) D88信号およびR十(R
)DIIB信号がそれぞれ現われる。次いでこの両信号
が重畳器U−1で腹合されて出力端子(3)から主搬送
波変調用のifj合イjH弓I−4−R+ (+−〜−
R) +1!I11が出力される。ここでこの、?4合
イ;3号における(L−R)D!I11は搬送波抑圧A
M変調信号で副信号と指標され、一方和信号■74−R
は主115号と指標されている。スイッチング方式のス
テレオ変調器(復、ll・〕器も同様)はこの主、副筒
信号間のセパレーションの安定度の良さから多用されて
いるが、第10−パスフイルタLPF lf 左(u号
りが、号だ第20−バスフィルタLPF、、で右信号R
が各別にfF2F2送波抑圧副変調、その後に重畳器U
3で重畳されで、主信号り十Rおよび副信号(L”)D
SIIとなるので、当該ステレオ変調器内には和信号(
L−1−R) +7−よび差信号(T−R)の各信号線
路は存在していない。
A conventional stereo modulator/demodulator will be explained using FIG. 1 as an example of an AM-FM switching stereo modulator. Figure 1 Neutral signal (IH2+ is the left signal (1st
Audio signal) L upper right 1 total C i (2+'+ 2 audio signal) R input terminal, U, U2υ, 1st, i (G 2 switching circuit, LPF, LPF2 is 1.11!2
(3) is a low-pass filter, U3 is a superimposed filter, and (3) is an output filter.
; IA child, (711 (51 is the input terminal of the subcarrier f8. Then, when the left signal and the right signal R are respectively input to the input terminal (11 (2), the left signal and the right signal R are i-l''; subcarrier f in the I switching circuit U and the second switching 1I-1l path U2
6 and the 10th pass filter LPF
, and the output J end of the 20th bus filter LPF2 are provided with the L-1-(L) D88 signal and the R+(R
) DIIB signals appear respectively. Next, these two signals are combined in a superimposed device U-1 and sent from an output terminal (3) to an ifj combination for main carrier modulation I-4-R+ (+- to -
R) +1! I11 is output. Here this? 4 Go A; (L-R)D in No. 3! I11 is carrier wave suppression A
The M modulation signal is indexed as a sub signal, while the sum signal ■74-R
is indexed as Lord No. 115. Switching type stereo modulators (same as decoupler, , No. 20 - Bass filter LPF, , right signal R
is separately fF2F2 transmission suppression submodulation, and then superimposed unit U
3, the main signal (R) and the sub signal (L") D
SII, so the stereo modulator contains the sum signal (
L-1-R) +7- and difference signal (TR) signal lines do not exist.

ところで主信号または副信号それぞれにおける8/N改
善のだめ送信側まだは受イ1、fiill (’r: 
:I:、−いで、この低周波(音声)111号の段階で
和1□1号dノ’r: ’iよ差信号のノイズ低減化が
企図きれるJ7゛′J合がある。
By the way, the transmitting side still needs to improve 8/N in each of the main signal or sub signal.
:I:, -, and at the stage of this low frequency (voice) No. 111, there is a J7''J case in which it is possible to reduce the noise of the difference signal by sum1□1dno'r:'i.

しかしながら前記従来のステレオ変調器にあっては当該
機器内に和信′り線路寸、’、T &−]−差イ11号
j(lIl路が存在しないだめ、ノイズ低減を[1的と
11.だ伺属回路を挿入することができないという問題
点があった。このような間型)点は上述のスゲ1/劃変
潤器のみに)股らずスイッチング方式スア1/オ復y+
゛、)器についても同様であり、さらにはFM−FM方
式のステレオ変・復調器についても同様であツr’−0
この発明はこのような従来の間m点”c f’l’N決
I−ることを目的としている。
However, in the conventional stereo modulator, noise reduction must be carried out because there is no path between the signal line and the line size, ', T&-]-difference A11j (lIl) in the device. However, there was a problem in that it was not possible to insert a corresponding circuit.This kind of inter-type) point is only applicable to the above-mentioned Suge 1/O-Fu-y+.
The same is true for the FM-FM stereo modulator/demodulator.r'-0
The purpose of the present invention is to overcome the conventional problems.

以下この発明を図面に基づい−Crt!i’、明する。This invention will be described below based on the drawings - Crt! i', clarify.

第1図〜第3図社この発明り・ス・rノチング方式ステ
レオ変W”J器に適用した2r51フSbある。
Figures 1 to 3 show a 2R51F Sb applied to this invention's S-R notching type stereo converter W''J.

なお第2図以下の各図においで前nu: 71’! 1
図に示しだ回路仁゛セ器等と同一ないし均等のものは前
記と同−狩りを以って示し重り!した説明を省略する。
In addition, in each figure following Figure 2, the previous nu: 71'! 1
Items that are the same or equivalent to the circuit assembly shown in the figure are shown and weighted in the same manner as above. The explanation given will be omitted.

首ず(l“ダ成を説明すると、第2図中性号U4はイ1
属回路挿入ユニットで、このものは左信号りおよび右(
Fj号を各別に導入して、嶋該1iへ右信号の和イ「1
号1. 十Rおよび差信号L−Rを各別に出力するマト
リクス回路Mと、この和信号および差信号を5!1人し
て左信号りおよび右信号Rを各別に出力するデマトリク
ス回路DMと、このマトリクス回路Mおよびデマトリク
ス回路DM間の和信号線路または差信号線路の何れかに
介在させたノイズリダクション回路等の付属回路Uoと
で構成されている。因みに付属回路としてはノイズリダ
クション回路の他に同じくノイズ低減機能を有するコン
プレッサまだ1イクスパンダ等も適用される。そしてこ
のような付属回路挿入ユニッ)U4を入力端子(1) 
+2)に連なる左4’を号■、および右信号Rの並行線
路、つまり第1、第2のスイッチング回路U、 U2の
前段部に配設する方式が採られている。
To explain the formation of the neck, the neutral number U4 in Figure 2 is I1.
This is a circuit insertion unit for the left signal and the right (
Fj is introduced separately, and the sum of the right signal is ``1'' to Shima 1i.
No. 1. A matrix circuit M that separately outputs 1R and a difference signal LR, a dematrix circuit DM that outputs a left signal 1 and a right signal R separately, and a dematrix circuit DM that outputs a left signal R and a right signal R separately. It is comprised of an auxiliary circuit Uo such as a noise reduction circuit interposed on either the sum signal line or the difference signal line between the matrix circuit M and the dematrix circuit DM. Incidentally, as an accessory circuit, in addition to the noise reduction circuit, a compressor, an expander, etc. having a noise reduction function are also applied. Then connect the attached circuit insertion unit (such as this) to the input terminal (1)
A system is adopted in which the left 4' connected to the signal (+2) is arranged in parallel with the line (2) and the right signal R, that is, in the front stage of the first and second switching circuits U and U2.

第3図は上記マトリクス回M Mの17.1ζ成回を示
すもので、3個の同相アンシバMP、 Alt、lIl
、 AMI14および1個の反転アンプAMP3と、こ
れら1)ア;/プに接続された出力抵抗r、〜r4とで
内部回路がI’f’?成されている。各アンプAMP、
 −AMP4 tJ、同相技よび反転の榛能を除けばそ
の増幅率に1、−例と1.てぞノ1それ「1」の値を有
している。(1)aは和信−”F I−l−Hの出力端
子、(2)aは差信号L−Rの出力端子である、。
FIG. 3 shows the 17.1ζ generation of the above matrix circuit M M, which includes three in-phase ancivers MP, Alt, lIl.
, AMI14, one inverting amplifier AMP3, and output resistors r, ~r4 connected to these 1) a;/amps, the internal circuit is I'f'? has been completed. Each amplifier AMP,
-AMP4 tJ, its amplification factor is 1, except for the in-phase technique and the inverted Haruno, -Example and 1. Tezono 1 It has a value of "1". (1) a is the output terminal of Washin-F I-I-H; (2) a is the output terminal of the difference signal L-R.

一方、第4図はデマ) l)クスlj:jl路Iへ1の
(1″々成例を示ずもので、上記マトリクス回路Mとは
In:同様に3個の同相アンプAへIP+、層1)6 
AMPIl:Fj 、tび1個の反転アンプAMP 7
と、これら各アンプに接ht、 8れた出力抵抗r1〜
r4とで構成されている、各アンプAMr’ h〜AM
P 8は同相および反転の機能を除りU゛その増幅率は
一例としてそれぞれ%の値をイj’ Lでいる。(1)
bは41信号L + Hの入力端子、+2)l)は、)
三信号1.−Rの入力端子、(1)cは左イtへ号りの
出力端子、(2)Cは右イj”j −”:fRの出力端
子である。
On the other hand, Fig. 4 is a hoax) l) Kusu lj: jl path I to 1 (1'' does not show an example; the above matrix circuit M is In: Similarly, three common mode amplifiers A to IP+, Layer 1) 6
AMPIl:Fj, t and one inverting amplifier AMP7
And the output resistor r1 connected to each of these amplifiers is
r4, each amplifier AMr'h~AM
P8 except for the in-phase and inversion functions is U' and its amplification factor is, for example, a % value, Ij' L, respectively. (1)
b is the input terminal of 41 signal L + H, +2)l) is)
Three signals 1. -R's input terminal, (1) c is the left-hand side numbered output terminal, (2) C is the right-hand side's j"j -":fR output terminal.

次に作用を説明する。Next, the action will be explained.

第2図の図示例は付稙回路UOを端子(2)a (21
b間、即ら差111号L−RのiJλ路に介在させたも
のであるが、所望によっては芥子(1)a (1Jb間
、即し和信号L+Rの線路に介在させておく。7トリク
ス回路Mに左信号りおよび右信号Rが各別に導入される
と、この左右信号がマトリクスされて付属回路U、には
差信号L−Rが流れ、低周波段階における当該差信号の
ノイズが低減される。次いで和信号L −1−Rおよび
差信号I、〜Rはデマトリクス回路DMでデマ) IJ
クスされて出力端子(1)c (2)cに左信号りおよ
び右信号Rが各別に導出される。この左、右の信号LR
はスイッチング回路U、 U2でスイッチングされたの
ち一■(畳語U3で重畳され、主搬送波変調用の複合信
号を形成する搬送波抑圧層変調信号(副信号)(LR)
D811と外って出力端子(3)から出力される。
In the illustrated example in FIG. 2, the additional circuit UO is connected to terminal (2) a
b, that is, the iJλ path of the difference No. 111 L-R, but if desired, the mustard (1) a (1Jb, that is, the line of the sum signal L+R) is interposed. When the left signal and the right signal R are separately introduced into the circuit M, the left and right signals are matrixed and a difference signal L-R flows through the attached circuit U, reducing the noise of the difference signal at the low frequency stage. Then, the sum signal L-1-R and the difference signals I, ~R are decoded by the dematrix circuit DM) IJ
A left signal R and a right signal R are respectively derived from the output terminals (1)c and (2)c. This left and right signal LR
is switched by switching circuits U and U2, and then superimposed by U3 to generate a carrier suppression layer modulation signal (sub signal) (LR) which forms a composite signal for main carrier modulation.
D811 and output from the output terminal (3).

このとき差信号L−Rは低周波の段階で既にノイズ低減
されているので副イa号の形となっでもこのノイズ低減
作用はほぼその一!ま維持され1−1副m号のノイズが
低減された複合信号がfiJ ’:) flる3、和信
号L+Rの線路に伺)・4回路Unが挿入されたときも
、そのノイズ低減作用な、L上記とPCl”I:同様で
ある。
At this time, the noise of the difference signal L-R has already been reduced at the low frequency stage, so even if it is in the form of sub-A, this noise reduction effect is almost the same! The composite signal that is maintained and the noise of the 1-1 sub-m is reduced is fiJ':) fl3, and the sum signal L+R line is connected to the line of the sum signal L+R). Even when the 4 circuit Un is inserted, its noise reduction effect is , L as above and PCl''I: Same.

なお第1実施(・1でtよ伺A!i回路伸人ユニッ) 
U4をステレオ変調器に介在させ/ζ場合に:)いて述
ベプこが、そのノイズ低減作用はステ1.−オ#iJ、
 1lltI器に介在させた場合もほぼ同様である。こ
の−喝合υ」:受信時に含まれているノイズが低減さ、
l)だ左、右仏号LRが得られる。
In addition, the first implementation (・1 is tyo visit A! i circuit Nobuto unit)
When U4 is interposed in the stereo modulator/ζ:), the noise reduction effect is as described in step 1. -O#iJ,
The same applies to the case where the 1lltI device is used. This - cheering υ': The noise included during reception is reduced,
l) The left and right Buddhist symbols LR are obtained.

次に第5図にはこの発明の第2実施例を示す。Next, FIG. 5 shows a second embodiment of the invention.

本件出願人は同日伺出AaIに係る発1.!i’lの名
称「ステレオ変調器」で、主信号による主1:2:i送
波の周波数偏移nに対して副(Q号に5Lる主4段送f
皮の周波数(ffi移mが例えば2倍に設定されている
J、;jX5合、これに適切に対応させることのできる
スフレ珂ダ(5j4器4発明した。仁の第2実施例はこ
のようなステレオ変調器に本発すJに係る伺屑回路挿入
方式を適用したJJ(例を示している。図中符号Maは
特殊マトリクス回路で、左、右信号LRを各別に入力さ
せて、I、十Δ1.−ΔRとR十ΔR−ΔLの混合信号
を出力する。
On the same day, the applicant issued a notice regarding Ibisu AaI.1. ! The name of i'l is "stereo modulator", and the frequency deviation n of the main 1:2:i transmission wave by the main signal is
When the skin frequency (ffi shift m is set to 2 times, for example; j A JJ (an example is shown) in which the JJ-related scrap circuit insertion method applied to a stereo modulator is applied. The symbol Ma in the figure is a special matrix circuit, and the left and right signals LR are input separately, and the I, A mixed signal of 1.DELTA.1.-.DELTA.R and R1.DELTA.R-.DELTA.L is output.

ここにΔの値は Δ=!A(里−1) の式で規定されるものでシ=2のときΔ=%となる。Here the value of Δ is Δ=! A (Sato-1) It is defined by the formula, and when C=2, Δ=%.

このようなステレオ変調器に適用する場合においても付
属回路挿入ユニy ) Uaは、機器内における左、右
信号LRの並行線路部分に挿入するもので、その挿入位
置は特殊マトリクス回路Maの前段となる。このとき付
属回路挿入ユニットU4におけるデマトリクス回路DM
と、特殊マトリクス回路へ1aとは1個の結合7トリク
スMbとしてtit成することができる。即ち結合マト
リクスMbは和信号L 十Rおよび差信号L−Rを各別
に入力して1.十へり一ΔRおよびR十ΔR−ΔLの各
イ1ス、介111号ケ出力さぜるようにすればよい。
Even when applied to such a stereo modulator, the attached circuit insertion unit Ua is inserted into the parallel line portion of the left and right signals LR in the device, and its insertion position is the front stage of the special matrix circuit Ma. Become. At this time, the dematrix circuit DM in the attached circuit insertion unit U4
and 1a to the special matrix circuit can be formed as one combined 7 matrix Mb. That is, the combination matrix Mb is created by inputting the sum signal L-R and the difference signal L-R separately. It is only necessary to adjust the outputs of each of the input terminals 111 ΔR and R1 ΔR - ΔL.

この結合マトリクスの内部4Pi成を結果fこ番ブにつ
いて数式で示せC」;次のとおりであ/51、L±ΔL
−482%(L+Rル;−(%十Δ)(夏、−夏りR−
ΔR−ΔL−%(L 十R)−(j4十八)(L−1句
即ち入力たる和信号(L十R)を%倍する機能と、差信
号(t −R)を(%+Δ)倍する(宍能を4ifit
えて、さらに各倍率したものを加fiおよび減nする機
能を有せしめることで1個の結合−71リクスとし−c
(1^成することができる。
Show the internal 4Pi composition of this coupling matrix in the form of a formula for the result f.
-482% (L+R; -(%1Δ) (Summer, -Summer R-
ΔR-ΔL-% (L 1R) - (j4 18) (L-1 clause, that is, the function of multiplying the input sum signal (L0R) by %, and the difference signal (t - R) by (% + Δ) Double (4ifit Shino)
In addition, by adding a function to add fi and subtract n to each magnification, it becomes one combined 71 risk.
(1^ It is possible to accomplish.

作用については前記第1実施例のものとほぼ同様で、複
合信号/ζる1、−1−R十”/、 (T−1−R几8
8のうちの主信号L −1−Rまだは副信号+y、 (
L 十R) Its□を低周波信号の段階でノイズ低減
をする。
The operation is almost the same as that of the first embodiment, and the composite signal /ζru1, -1-R1''/, (T-1-R几8
The main signal L -1-R of 8 is still the sub signal +y, (
L 1 R) Reduces the noise of Its□ at the low frequency signal stage.

次いで第6図はこの発明の第3実施例を示す。Next, FIG. 6 shows a third embodiment of the present invention.

この実施例は前記第2実施例におりるステレオ変調器に
対応したステレオ徂調器に旬λ−3回路挿入方式をフハ
用した4j(例を示している。図中I)Maは特殊デマ
トリクス回路でI、+ΔI7−ΔRおよびR+Δ】く−
ΔLT?十 Δ Rの左、右の信号を各別に出力する。
This embodiment is a 4J (example is shown. In the matrix circuit, I, +ΔI7−ΔR and R+Δ]
ΔLT? Output the left and right signals of ΔR separately.

こ1+Δ の事例において超、付属回路挿入コーニットU4は特殊
デマトリクス回路DMaの後段に配設する。このときイ
;J’ E’i回路4i7i人:Lニラ) U4におけ
る7トリクス回路Mと、 /4¥殊デマ) I)クス回
路DMaとは1個の結合デマトリクス回路Mdとして構
成するととができる。即ち結合デマトリクス回路Mdは
混合(,1号し+ΔL−ΔRおよびlく+ΔR−ΔLを
各別に導入して和(g号1.+Rおよび差信号I、−R
を出力させるようにすればよい。この結合デマトリクス
回路Mdの内部宿成を結果だけについて数式で示せば次
のとおりである1、 L+R=(L+ΔI、−Δu)+(R十へR−Δy、)
L−R=−↓−((I、+ΔI5−ΔR) −(R+Δ
R−ΔL))J+2Δ 即ちL十ΔL−ΔRとR十ΔR−ΔLとを加詐して和信
号1、 十Rを出力し、L十ΔL−ΔRからI(十ΔI
く−ΔLを減算してこれに望1.−2Δ)をコ1?する
!j! NI辻有している。
In this case, the auxiliary circuit insertion circuit U4 is arranged after the special dematrix circuit DMa. In this case, the 7-trix circuit M in U4 and the matrix circuit DMa are configured as one combined dematrix circuit Md. can. That is, the combined dematrix circuit Md separately introduces the mixed signals (1, 1 + ΔL - ΔR and 1 + ΔR - ΔL), and calculates the sum (g 1. +R and difference signals I, -R
All you have to do is output it. The internal formation of this coupled dematrix circuit Md can be expressed as a mathematical formula for only the result1, L+R=(L+ΔI, -Δu)+(R−Δy to R0,)
LR=-↓-((I, +ΔI5-ΔR) −(R+Δ
R-ΔL)) J+2Δ In other words, L0ΔL-ΔR and R0ΔR-ΔL are combined to output a sum signal 1, 10R, and from L0ΔL-ΔR, I(10ΔI
- ΔL is subtracted from this and desired 1. -2Δ) ko1? do! j! I have NI Tsuji.

作用については入力信号たるf18合イ、1号のうらの
主信号はたけ副(is号を、和474号1− I Rt
たt」、差潜号L−Rの形でノイズ低減し、左信号l、
丸・、1、び和信号Rを各別に出力する。
As for the action, input signal f18 is input, main signal behind No. 1 is Hatake sub(is), sum No. 474 1-I Rt
t', the noise is reduced in the form of the difference latent code L-R, and the left signal l,
Circle, 1, and sum signals R are output separately.

以上詳述したようにこの発明によれば左、右信号LRを
各別に導入して、この左、右イ1.−じの和信号(L+
R)および差1′汀号(t、−R)泉・各別に出力する
マ) IJクス回路と、上記和信号(L+p)朴よび差
信号(L−R)を導入して左、右(Wf ケl−1?を
各別に出力するデマトリクス回路と、この7トリクス回
路およびデマトリクス回路間の和信号かj!路tメζは
差信号線路の何れかに介在さぜ/こノイス゛リダクゾコ
ン回路等の付属回路とで付属回路沖人j、二y I□を
tf)H成し、この伺属回路挿入ユニット忙スデレメ変
d′4器またはステレオ復調器に3.−りる/j:、右
信号り、 Rの並行線路に介在させる方式としだから、
機器内に和信号線路または差信号線路が存在しない方式
のステレオ変・復調器においても、低周波段階での和(
if号または差信号のノイズ低減を図ることができると
いう効果が苅られる。したがって主、副両信号間のセパ
レーションの安定11(の良好なスイッチング方式等を
採用したステレオ変φ復調器に対して(べめて好適な付
属回路挿入方式を提供することができるという効果が得
られる。
As detailed above, according to the present invention, the left and right signals LR are introduced separately, and the left and right signals 1. - same sum signal (L+
R) and difference 1' signal (t, -R) output separately for each input circuit, and the above sum signal (L+p) and difference signal (L-R) are introduced to output left, right ( The dematrix circuit that outputs Wf kel-1? separately, and the sum signal between these 7 matrix circuits and the dematrix circuit are interposed in either of the difference signal lines./This noise reduction 3. Configure the attached circuit Okijin j, 2 y I□ with the attached circuit such as the Zocon circuit, and connect this attached circuit insertion unit to the transducer converter or stereo demodulator. -Ruru/j: Since the right signal R is interposed on the parallel line of R,
Even in a stereo modulator/demodulator that does not have a sum signal line or a difference signal line in the equipment, the sum (
This has the effect of reducing noise in the if signal or the difference signal. Therefore, it is possible to provide a more suitable auxiliary circuit insertion method for a stereo modulating φ demodulator that employs a switching method that provides stable separation between the main and sub signals. It will be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のステレオ変調器を示すプロ・ツク縮図、
2112図はこの発明に係るステレオ変・復調器におけ
る付属回路挿入方式の第1実施例を一部省略して示すブ
ロック線図、第3図は同上第1実施例に適用するマトリ
クス回路の一例を示す回路図、第4図は第1実施例に適
用するデマトリクス回路の一例を示す回路図、第5図は
この発明の第2実施例を示すブロック線図、第6図はこ
の発明の第3実施例を一部省略(2て示ずグJ−1□7
ノ線図−(Zある。 M:マトリクス回路 DM:デマトリクス回路 Uo:ノイズリグ4フ1フ回h′!S 丁Fの伺(14
回路UI+ U2 ’ステレオiU Ij”j ’/l
:÷に¥訂〕るス・1ノチング回路 U4:付5;・ぺ回路挿入1ニット U6、U6:ステレオ復調器に粋はン)ブイノチング回
路 営’I’jj、株式会社 代理人 芦 111  面 衛 ′ツ3図 M ?1\4 図 M
Figure 1 is a professional diagram showing a conventional stereo modulator.
Fig. 2112 is a block diagram partially omitted showing a first embodiment of the auxiliary circuit insertion method in a stereo modulator/demodulator according to the present invention, and Fig. 3 shows an example of a matrix circuit applied to the first embodiment. 4 is a circuit diagram showing an example of a dematrix circuit applied to the first embodiment, FIG. 5 is a block diagram showing a second embodiment of the present invention, and FIG. 6 is a circuit diagram showing an example of a dematrix circuit applied to the first embodiment. 3 Some examples are omitted (2 is not shown)
- (Z exists. M: Matrix circuit DM: Dematrix circuit Uo: Noise rig 4F 1F times h'!S Ding F's inquiry (14
Circuit UI+ U2 'Stereo iU Ij"j'/l
:÷¥Edited ・1 notching circuit U4: Attachment 5; ・Pe circuit insertion 1 nit U6, U6: Ideal for stereo demodulator) V notching circuit management 'I'jj, Agent Co., Ltd. Ashi Page 111 E'tsu 3 figure M? 1\4 Figure M

Claims (1)

【特許請求の範囲】[Claims] 第1音声信号(L)および第2音声信号(R)を各別に
導入して当該第1音声信号(L)および第2音声信号(
R)の和信号(L十R)および差信号(L−R)を各別
に出力するマトリクス回路と、前記和信号(L+R)お
よび差信号(L−R)を導入して第1音声信号(L)お
よび第2音声信号(R)を各別に出力するデマトリクス
回路と、前記マトリクス回路およびデマトリクス回路間
の和信号線路または差信号線路の倒れかに介在させたノ
イズリダクション回路等の付瀉回路とで付属回路挿入ユ
ニットを構成し、該伺属回路挿入ユニットをステレオ変
調器またはステレオ復調器の伺れかにおける前記第1音
声(R号(L)および第2音声信号(R)の並行線路に
介在させることを特徴とするステレオ変・復調器におけ
る付属回路挿入方式。
The first audio signal (L) and the second audio signal (R) are introduced separately, and the first audio signal (L) and the second audio signal (
A matrix circuit that separately outputs the sum signal (L+R) and difference signal (L-R) of R) and the sum signal (L+R) and difference signal (L-R) are introduced to generate the first audio signal ( A dematrix circuit that separately outputs the second audio signal (R) and the second audio signal (R), and a noise reduction circuit or the like interposed between the matrix circuit and the dematrix circuit by the fall of the sum signal line or the difference signal line. The circuit constitutes an auxiliary circuit insertion unit, and the auxiliary circuit insertion unit is used to generate the first audio signal (R number (L) and second audio signal (R) in parallel) in the stereo modulator or stereo demodulator. A method of inserting an auxiliary circuit in a stereo modulator/demodulator, which is characterized by intervening it in the line.
JP15870682A 1982-09-11 1982-09-11 System for inserting additional circuit in stereo modulator and demodulator Pending JPS5947857A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15870682A JPS5947857A (en) 1982-09-11 1982-09-11 System for inserting additional circuit in stereo modulator and demodulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15870682A JPS5947857A (en) 1982-09-11 1982-09-11 System for inserting additional circuit in stereo modulator and demodulator

Publications (1)

Publication Number Publication Date
JPS5947857A true JPS5947857A (en) 1984-03-17

Family

ID=15677572

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15870682A Pending JPS5947857A (en) 1982-09-11 1982-09-11 System for inserting additional circuit in stereo modulator and demodulator

Country Status (1)

Country Link
JP (1) JPS5947857A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01176622A (en) * 1988-01-06 1989-07-13 Toshiba Corp Impregnated type cathode composition
EP0629054A2 (en) * 1993-06-08 1994-12-14 Matsushita Electric Industrial Co., Ltd. Noise suppressing apparatus capable of preventing deterioration in high frequency signal characteristic after noise suppression and in balanced signal transmitting system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01176622A (en) * 1988-01-06 1989-07-13 Toshiba Corp Impregnated type cathode composition
EP0629054A2 (en) * 1993-06-08 1994-12-14 Matsushita Electric Industrial Co., Ltd. Noise suppressing apparatus capable of preventing deterioration in high frequency signal characteristic after noise suppression and in balanced signal transmitting system
EP0629054A3 (en) * 1993-06-08 1997-01-29 Matsushita Electric Ind Co Ltd Noise suppressing apparatus capable of preventing deterioration in high frequency signal characteristic after noise suppression and in balanced signal transmitting system.
US5982901A (en) * 1993-06-08 1999-11-09 Matsushita Electric Industrial Co., Ltd. Noise suppressing apparatus capable of preventing deterioration in high frequency signal characteristic after noise suppression and in balanced signal transmitting system
KR100327632B1 (en) * 1993-06-08 2002-07-06 마츠시타 덴끼 산교 가부시키가이샤 Noise suppression device

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