JPS5941907A - Monolithic integrated circuit for demodulating angle-modulated wave - Google Patents

Abstract

PURPOSE:To reduce the number of terminals for connecting external parts and reduce the noise included in an output signal, by incorporating a part of a capacitor on a monolithic semiconductor. CONSTITUTION:An audio IF signal inputted from an input terminal 1 of a monolithic semiconductor 29 has the amplitude limited by an amplifier 2 and is inputted to the base of a transistor TR 21 through a capacitor 31. The output of the amplifier 2 is outputted to a terminal 3 and has the phase changed by a reactance circuit 9 and is applied to the base of a TR 11 through a terminal 5. The phase difference between signals applied to bases and TRs 21 and 11 is 90 deg. when the signal has the center frequency, and the phase lags to make the frequency lower when the frequency is higher; and therefore, outputs proportional to the phase difference are outputted to terminals 27 and 28. By this constitution, the number of terminals for connecting external parts is reduced. Since low frequency components of the noise generated by the amplifier 2 are suppressed, the noise included in the output signal is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a monolithic integrated circuit for demodulating angular modulated waves, for example, an FM demodulating circuit for audio in a television receiver. A suitable circuit is provided.

Conventionally, the peak differential detection method has often been used for 11'M detection of audio in television receivers, but recently the Kudrature detection method, which has a wide band and excellent linearity, has come into use.

An example of a conventional circuit using the Kudrature detection method is shown in FIG. Figure K &- (1) is the input terminal, (2)
amplifier (4), (5) connected to the input terminal (1)
are the output terminals connected to the amplifier (2), (5), (
6) is the input terminal, (force), (8) is the terminal (4) and (5) respectively.
), terminals (3) and (6) are connected with an external capacitor (9) is a reactance circuit connected externally between terminals (5) and (6), (10), (11) is the terminal (
transistors whose bases are connected to 5) and (6), respectively;
(12), (13) are transistors (10), (
11) is connected to the base of the resistor (14), and the resistor (14) is connected to the base of the resistor (1
2), a voltage source connected to (13), (15),
(16) are resistors connected between the emitters of transistors (10) and (n) and ground, respectively, (17) and (18)
) are transistors whose bases are commonly connected to the connection point a, h (10), and transistors (19) and (20) whose bases are commonly connected to the connection point, h (11).
transistors connected to the emitters of, (21), (2
2), the collectors of which are transistors (17) and (19
) and the transistor 08), the transistor (20) is commonly connected to the emitter and the base is connected to the terminals (3) and (4), and (23) is the transistor (21).
A constant current source commonly connected to the emitters of and (22), (2
4) (25) h each transistor (17) (20
) and the collectors of transistors (18) and (19) are connected to the load resistance, (26) is the load resistance (24)
(25) and the collectors of transistors (10) and (11) are connected to this power supply terminal. (27) , (28
) are output terminals connected to load resistors (24) and (25), respectively.

(29) shows the part integrated into the monolithic semiconductor V:3.

Next, the operation will be explained. The audio intermediate frequency multiplied Jij (hereinafter referred to as S/F signal) input manually from the input terminal (1).

) is amplitude limited by the amplifier (2) and output to the output terminals (3) and (4), as well as to the bases of the transistors (21) and (22). The SIF signals output to the output terminals (3) and (4) by the external capacitors (7), (8) and the reactance circuit (9) are centered at the terminals (5) and (6), respectively. 90 in frequency
It is adjusted so that it shifts by °. The frequency of the S engineering F signal is lower than the center frequency of the central station S engineering F.
The signal phase of the input terminal (5) advances from 90' with respect to the signal phase of the output terminal (4). A signal whose phase difference changes depending on the frequency is transmitted through transistors (17) to (22).
) are multiplied by a multiplier, and the output shown in equation (1) is output to output terminals (27) and (28).

=−−(!JO(2ωt+1)−1−Tcooφ
...(In formula (1), the amplitude of the S-F signal at the input terminals (4) and (5) for A and Bf, respectively, ω is the angular frequency of the human signal, and φ is the input terminal (4) ( 5).When the output signal shown in equation (1) passes through a low frequency filter, the high frequency component of the 11th term is attenuated and the low frequency component of the 2nd term remains, and the A signal signal proportional to the configuration difference is output. Therefore, when the frequency-modulated signal (F!) is input manually from the input terminal (1),
By the operation described above, the output terminals (27), (28)
An FM demodulated signal is output.

Conventional FM detection circuits are configured as described above, so when integrated into a monolithic semiconductor integrated circuit, four terminals (3) (4) (5) (6) are required to attach external components.
) must be provided. Also, since the amplifier (2) and the transistors (21) and (22) are DC-coupled, the noise generated in the amplifier (2) when the weak part is under human power is eliminated, and the transistors (21) and (22) are connected to the human power output terminal. (27)
Alternatively, (28) has the disadvantage of generating a noise voltage.

This invention was developed in order to eliminate the drawbacks of the conventional capacitors as described above. By incorporating part of the capacitor on a monolithic semiconductor, the number of external terminals for attaching components was reduced, and The object of the present invention is to provide a monolithic Toza product circuit for square harmonic repetition, which is suitable for monolithic semiconductor integrated circuits and has low frequencies suppressed by AC coupling using a capacitor, and has low noise even when a weak signal is input.

An embodiment of the present invention will be described below with reference to the drawings. Second
In the figure, the same reference numerals as in Figure 1 indicate the same or equivalent parts, (30) a buffer connected to the output of the Vi amplifier (2), (31) the output of the amplifier (2) and the transistor (21). ), (32) and (33) are resistors connected to the base of the transistor (21) and the product, respectively, and (34) is a constant voltage source.

S engineering F trust amplifier (2) manually powered from input terminal (1)
) and is applied to the base of the transistor (21) via the capacitor (31). On the other hand amplifier (2)
The output of is outputted to the terminal (3) through the buffer (30).

The signal output to the terminal (3) is sent to the reactance circuit (9
) and is applied to the base of the transistor (11) through the terminal (5). Transistor (2nd grade)
The phase difference between the signals applied to the bases of (11) and (11) is adjusted so that, as in the conventional circuit, when the S/F signal is at the center frequency, it is 90°, and as the frequency increases, the phase lags, and as the frequency decreases, the phase advances. Therefore, as shown in equation (1), the output proportional to the phase difference is expressed as ffMI element (27) (2
8).

In addition, in the above embodiment, the capacitor (31) is passed through (l
is added to the base of the transistor (21),
The base of the transistor (22) may be used, and although the signal input from the terminal (5) is applied to the base of the transistor (11), it may be the base of the transistor (10). Also, the signal passed through the capacitor (31) is connected to either the transistor (10) or (11), and the signal passed through the terminal (5) is connected to either the transistor (21) or (22). The same effect can be achieved.

As described above, if the monolithic aggregation circuit for angle harmonic demodulation of the present invention is used, the number of external parts for connecting components can be reduced compared to the conventional one, and it is possible to Since the signal is also input via a capacitor, the low frequency component of the noise generated in the amplifier is suppressed when the input signal is weak, so there is an advantage that the noise included in the output signal can be reduced.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional FM detection circuit, and FIG. 2 is a circuit diagram showing an embodiment of the present invention. In the figure, (1) is the input terminal, (2) is the amplifier, and (3
) is the output terminal, (5) is the input terminal, (9) beam actance circuit, (17) (18) (19) (20) (
21) (22) is a transistor that constitutes ÷ in multiplication,
(27) and (28) indicate output terminals, and (29) indicate fii components integrated on a monolithic semiconductor. (30)
The device (31) is a capacitor integrated on a monolithic semiconductor. Note that the same reference numerals in the drawings indicate the same or first parts. Agent Makoto Kazuno - Figure 1 Figure 2 Commissioner of the Japan Patent Office 1. Display of incident Patent application No. 57-158252 2
, Title of the invention Monolithic assembly circuit 3 for square and harmonic recovery 1, Relationship to the case of the person making the amendment Patent applicant address 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name (601) Mitsubishi Electric Stock Company representative: Katayuni Hachibu 4, agent address: 2-3-6, Maruno Potter-chome, Chiyoda-ku, Tokyo, column 6 for detailed explanation of the invention in the specification to be amended, contents of the amendment (1) Specification is corrected as follows.

Claims (1)

[Claims] an input terminal into which an angularly modulated wave signal is input; an amplifier connected to the input terminal and provided with first and second output terminals; and first and second inputs into which two signals to be multiplied by each other are input, respectively. In a device in which a terminal and a multiplier having an output terminal for taking out a multiplied signal are integrated on the same monolithic semiconductor, the first output terminal t of the amplifier is connected to #4 on the monolithic half body. A second output terminal of the amplifier is coupled to the first input terminal of the multiplier via a capacitor connected to the multiplier. A monolithic 'M% product circuit for demodulating an angularly modulated wave, characterized in that the monolithic 'M% product circuit is coupled to a second input terminal of the angularly modulated wave demodulator.