JPS5940632A - Scan controller - Google Patents

Abstract

PURPOSE:To perform exposure scan control with a simple constitution, by controlling a reciprocating means for exposing an original with time on the basis of a pulse counted value. CONSTITUTION:A CPU counts clock pulses to access an ROM and reads and executes a program successively to output a sequential control signal from an output device. Then, the reciprocating means for exposing the original under optical system forward movement and backward movement clutch control, etc., by control signals 1theta3 and 2theta4 from the output device with time is controlled. Therefore, the simple constitution which eliminates the need for a limit switch, relay, etc., makes an exposure scan on the original.

Description

[Detailed description of the invention]

The present invention relates to a scanning control device for exposure scanning of a document. 2. Description of the Related Art Conventionally, in a copying machine or the like, an optical system or the like has been moved back and forth in order to expose and scan a document. In this case, gomo. A switch was provided in the path of movement of the optical system, etc. to switch back motion, and the switch was switched when the optical system etc. operated. Therefore, when various travel distances are required, it is necessary to increase the number of switches accordingly, which complicates the travel path. In order to eliminate the above-mentioned drawbacks, the present invention does not control the forward movement using a switch or the like provided on the moving path, but rather uses a time signal to control the forward movement. Furthermore, in this case, control is performed by counting a predetermined number of pulses that are in synchronization with the movement of the reciprocating means, thereby ensuring an appropriate scanning distance even if the moving speed of the reciprocating means changes. I can do it. Furthermore, by using this example, it is possible to program the sequence of the copying machine recording device in chronological order, which makes it extremely easy to change the sequence. Furthermore, this example has the feature that a high degree of circuit integration is possible and the number of parts can be greatly reduced. Furthermore, this embodiment has the feature that sequence control of different copying apparatuses can be performed by using the same circuit and changing only the program. Furthermore, in this example, since driving a predetermined device cannot be executed unless the process leading to driving the device is completed, there is a feature that malfunctions do not occur due to input erroneous signals. Furthermore, this embodiment has the feature that no errors occur in sequence control since program execution is monitored at predetermined points in the progress of actual copying, such as the position of the drum baud. Hereinafter, we will explain how to use a 4-way vertical copying machine that forms a primary latent image from a document, repeatedly forms a secondary latent image from this primary latent image, and then develops and transfers this secondary latent image to produce a number of copies. The present invention will be explained using an example in which sequence control is performed by a bit-parallel processing microcomputer. First, the copying process will be outlined with reference to FIG. 1, which is a sectional view of a glue tension copying machine, and FIG. 2, which is a time chart. 61
51 is the key operation panel, 51 is the original table, 52 is the exposure lens, 53, 54, 56, 57°, 58 is the reflective mirror, 55 is the lens/zoom system, 1 is the photosensitive drum, 3II'i is the front irradiation lens. /7°
, 4 is the primary charger, 6 is the secondary static eliminator, and 7 is the entire surface irradiation/
13 is a pre-modulation bander, 1] is a modulation charger, 8 is an insulated drum, 24 is a developer, 33 is a paper feed roller, 34 is a timing roller, 36 is a transfer charger, 73 is a separation claw, 70
72 is a paper detector, 45 is a fixing roller, 47 is a discharge tray, 31 is a transfer paper, 1411t blower, 18 is a heater, the photosensitive drum 1 has a transparent insulating layer, a photoconductive layer,
It has a mesh photoreceptor (for example, detailed in Published Patent No. 19455 of 1975) having a conductive layer around the drum, and the charger is temporally and spatially divided into front and rear parts. There is. The operation of the copying apparatus is performed by commands from the operation panel 61. The operation panel 61 includes two displays 62, 63, two pilots 5 and 66, and a keyboard 64. The numerical keys "0" to "9" on the keyboard 64 are used to set the number of copies, and the contents of the keys pressed in sequence are entered on the display 62. The [ω] key means an infinite number of times, and lights up the pilot Ranzoro 5 of “ω”. Then key r R, J (1iB'rEN'rION)
is used to set the number of saws that can be repeatedly obtained by one electrostatic latent image formed on the screen, and the number is set by the subsequent entry of the numeric key or Iooj key. The contents are displayed on the display 63 or the pilot lamp 66. [The cOJrcRl key is used to correct each setting number. rsINGjFi is used to start copying one sheet, [MULT-1] is used to start multiple copies using the numeric key, and r8TOPJ is used as a VC to stop copying before the set number of copies is completed. Next, the time chart shown in FIG. 2 will be explained. First, when the power switch is turned on, the screen heater 18, fixing roller heater, etc. are turned on, and after a waiting time, the machine enters a preparation state. Then, the number of sheets is set from the front G-Pi operation panel 61,
Next, start copying r8INGJ or rMLIL'l'
When the key is pressed, the screen drum motor M1 rotates. At this time, the reciprocating clutch of the optical system is activated, and the first reflecting mirror 53, which is installed integrally with the original illumination plate 52 and the lamp reflecting mirror, is moved between the screen drum l.
Move at a speed ■1 that is mutually synchronized with the circumferential speed of. Therefore, the setting of the optical system home position and the exposure process begin as described below. During the irradiation of the original illumination drum, the screen drum motor M1 rotates at ■l, and when it is turned off and the insulated drum motor M1' is turned on at the same time, the speed of both drums instantly doubles. ■Go up to 2. While the screen/drum motor M1 is rotating, the front irradiation lamp 3 and the entire surface irradiation lamp 7 are turned on to perform exposure, and an optical cooling fan is driven to prevent heat from accumulating in the optical system due to irradiation by the document illumination unit 52. . And - next phase electric appliance 4. Along with the operation of the secondary static eliminator 6, a negative latent image is formed on the screen as described above. Further, when the copy start key is activated, the powder image transfer charger 36,
The paper separation charger 37, the insulated drum snow blower 50, and the paper separation suction fan are turned off at the end of the copying operation. However, since the rotational speed of the insulating drum in the charger 36.degree. 37.50 is slow due to the peripheral speed of the screen drum motor, the potential is lowered to prevent excess charge from being charged on the insulating drum. Next, after the -th m image is formed, the screen drum motor is turned off and the insulating drum motor is turned on, modulating, developing,
Copying operations such as paper transfer and separation are started. After modulation, the first copy is completed when the scree/drum rotates three times, but after that, one copy is completed every time the scree/drum makes one revolution. First, the rotation of the drum is switched to the insulation group ram motor Ml', and at the same time, the pre-modulation charger 13 and the conveyor belt 38 (first
The conveyance roller clutch, which transmits the cleaning motor's force to the roller (see figure), is turned on. As the rotation progresses and the screen drum advances 228 degrees from its home position, the device 11 turns the modulation band at 241 degrees for transferring the electrostatic latent image formed on the screen drum to the insulating drum. Paper feed roller clutch CL3 for feeding one sheet of paper on the paper feed table is turned on, and after the screen drum starts modulating, it enters the second rotation cycle and paper feed roller clutch CL3 is turned on at the home position.
The timing roller/clutch CL4 is turned on at 160 after the developing motor operates at 40 in order to match the leading edge of the paper fed out by kneading with the leading edge of the developed visible image on the insulating drum. If 1. If the number of copies is one, the modulation charger 311 is turned off at position 228, but in this case, since there are two copies, it is not turned off. Furthermore, with X7, 241
The paper feed roller clutch CL3 is turned on to feed the second sheet of paper. At 360, the first timing roller ψ clutch CL4 is turned off. Entering the third rotation cycle, turn off the paper feed roller clutch and the first timing roller clutch at the home position, and apply the brake to the timing roller at 100. At step 160, the second timing roller/clutch CL4 is turned on. At step 228, the modulation charger 3]1 is turned off. If one copy is to be made, the developing motor M2 and the toner bridge prevention motor are turned off in step 5(). 36 Turn off the timing roller clutch at [ ]. For two-sheet copying, the IJ motor N12 and the toner bridge prevention motor are turned off at 50 of the fourth rotation cycle, and the insulated drum motor Ml' and the conveyance roller clutch are turned off at 330, and the two-sheet copying cycle is completed. end. The separation pawl solenoid SL1, which separates the paper from the insulating drum, operates between 276 and 316 during the second and subsequent cycles. FIG. 3 shows a circuit configuration for controlling the operation of each device in the copying machine to execute the above-described copying process. ROMV
i The sequence contents of the copying device are 1-ordered in advance,
This is a read-only memory that can be incorporated into each address and whose contents can be retrieved each time an address is set, and is shown in detail in FIG. 3-1. That is, s is set in advance in a known matrix circuit with a code in order from address 0 to the final address.
The control contents (including not only the operation of the device but also the control contents of other circuits) are stored in the BAT binary code. ■1～
2#-i An input device that stores the copy status.
- Shown in Figure 4. 01 to 4 are devices that output signals for controlling the operation of the copying machine, and the details are shown in Figure 3-3. FLAM is a read/write memory that stores the number of copies and temporary control signals during process control, and is a well-known memory that stores a binary code. A set is composed of multiple sets, and an arbitrary set is selected by an address designation signal, and the 0 CPU that writes data to or reads data from a plurality of flip-flops (7) writes the data to the above memory and inputs. One or more registers PB, PC for specifying the address of the output device, and one or more registers A, B, C, D for primary storage.
. It has a control unit CT that has addition/subtraction logical operation functions to decode and process data input from the data signal line [7,
The image is formed by a plurality of lines with the external circuit. To give an overview, first the R program is programmed from the CPU.
The OM address is specified, the contents of the specified address are read into the CPU through the data signal line 86, the CPU decodes the kneading, and according to the decoded contents, the CPU itself Process data based on the content of
At times, data in the ViCPU is stored at a specified address in RAM, data at a specified address in RAM is input into the CPU, and at other times, data in the CPU is stored as an output signal of the input/output section. Sequence control is performed by outputting to line 88 and inputting the contents on input signal line 89 of the input/output section into the CPU. The control procedure according to the present invention will be explained in detail below. First, the basic timing for sequence program processing will be explained with reference to the clock time chart of FIG. Each command of the program is pre-encoded and stored in 8 lines in the ROM, and each code is designated by decoding the n codes from the address code bus line with an address decoder, and then deciphering the 20 codes. One of them is selected and output. The address where the instruction in this ROM and RCM is stored is specified by the ON1 address designation register (PC). The instructions programmed by fl are output one after another,
Ru. This register PC is input to the ROM by multiplexer A-C at a predetermined time. The ROM outputs the instruction code on eight lines, but since the data code bus 86 has four lines, it is time-divided and output to the data code bus in two parts. 8W9, s by the signal α of 2 and 3 clocks of instruction code outputted in 2 times of 4 lines each.
w6° SW7 is opened and closed to be latched into registers C and D, and this content is decoded by an instruction decoder, which then generates a control signal α for processing according to the instruction content. In short, the address where the program is stored is specified in four basic clock cycles, the instruction code stored at that address is decoded, and the content of the above instruction is completed in the following six clock cycles. Execute. And again,
The programmed instructions following the above address are executed at similar time intervals. Therefore, it takes a time equivalent to 10 clocks to execute one execution instruction (1 stellaf°) in a programmed sequence. A 2-word instruction requires 20 clocks. Note that registers A and B are for calculation, and are date circuits controlled by the control signal α for each switch SW.
This is a circuit known per se for detecting overflow of register A. The control unit CT decodes registers C and D and reads register A. This is a circuit for calculating B and outputting a control signal α, and its functions are schematically shown in FIG. 14 (described later). Next, input/output signals will be explained. The correspondence between each launch (for example, a flop) of the output device of the copying machine and the output device is as follows.
Output 1θ1 Front irradiation lamp power lθ21st charger (front) Device 1θ3 Optical system forward clutch output 2θ11st charger (rear) Force 2θ2 Original exposure/pull device 2θ32nd static eliminator (2) 204 Optical system double-acting clutch Out 3θ1 Latent image transfer charger (3) 3θ4 Screen @ bias charger out 4θ1
Paper feed roller clutch force 4θ2 Timing hot roller clutch device 4θ3 Separation solenoid V (4) 4θ4 Timing roller brake Also, the correspondence between the status signal of this copying machine and each launch input line of the input device is as follows. It is. Specific examples of these input/output circuits are shown in FIGS. 5 and 6. FIG. 5 shows the case where each Ilo corresponds to the output line of the 4b port, and FIG. 6 shows the case where a converter is provided in the case of 4 or more. Table 2 The first speed at which the drum-motor of the copying machine shown in Figure 1 rotates is 120 vtyn/sec, and the second speed is 360 a.
m/sec. Scree/Drum rotation angle 1″
Two built-in internal oscillators (this can be any astable multi-vibrator) that generate 1 pulse per 7.
Since it is 0 mψ, the clock of clock pulse 1 also has a period of 1
Approximately 8 m/sec, and similarly clock pulse 2
The clock mJIJll-, t2.66 m/sec. These clock pulses can be generated by optically detecting the hole 6o in the rotary plate 56, which rotates at several times the speed of the insulating drum. When the status signal is at the “°1°” level, there is no “°°”
or “NO”, and II OI + II ru means
' means "GooD"'. The control circuit shown in Fig. 3-2 consists of a known r-) circuit from which a 4-bit signal is output by the read 17 control signal 2, and a known gate circuit from which a 4-bit signal is input by the write control signal 2. . In addition, the control circuits in Figures 3-3 and 3-4 each have an output side f.
A known tart circuit in which a data code is output by I41 No. 2 and a selection signal from an output device 0, and a known dirt circuit in which a data code is input by an input control No. 2 and a selection signal from an input device (■). Consisting of Next, a schematic flow of copying control using the zologram method will be explained using diagram λ7. 1, #, following the input, the key entry/try cycle of setting the number of copies and starting copying is executed without shuffling, and if it is in a standstill state in which nothing is done, the cycle is looped and the state waits for a key entry. When the operator enters the desired number of copies and presses the copy start key, execution of the copy cycle begins. For each cycle, determine whether the machine is in end mode (i.e., when the desired number of copies has been completed, when a stop command is received, when toner runs out, when paper runs out, etc.). If it is not in the end mode, the self-shot cycle is looped. If it is in the end mode, the copying operation is stopped, the process returns to the initial cycle of setting the desired number of copies and entering the copy start key, and waits. As mentioned above, since the operations are processed sequentially, setting the number of copies and entering the key to start copying during the copying cycle are prohibited, and during key entry, the copying cycle starts 1-,
It has characteristics such as no. (Key Entry Cycle) Key/Tori i1' 00~ to set the desired number of copies
Numerical keys up to 9, 6 multi °' key to start copying, ``single'' key to start copying one sheet. This is done using the pass stop ``'' key to issue a stop command and the ``clear'' key to correct the set number of copies. The following description will be made with reference to 70- in Figure 8. The number of copies can be set up to 2 digits (that is, 99 copies), and the 1st digit is stored in the RAM address 1 and the 2nd digit is stored in the RAM address 2. After turning on the power, 几AN1 is displayed on the display at 5TEPO-1.
1 and 2? -Display evening and wait for key press at 5TEPO-2. Therefore, the power on/state can be confirmed by the numerical display. When the key is pressed, S'l'EPO-3
Determines whether it is a numeric key or another key, and if it is a numeric key, executes 5TEPO-4, 0-5, stores the newly pressed numeric value in address ) L A M 1, and presses 8'l"EPO- 1
Go back and display this. Therefore, it is convenient to be able to display numerical settings starting from the lower digits. If 5TEPO-3 is a key other than a numeric key, proceed to 5TEPO-6 or later. “Clear”
If it is the ° key, clear the RAM with 5TEPO-7,
Return to S'l'EPO-IK and display "oo". If it is a multi-key, proceed to the copy cycle, enter N and II in RAM address 3 with 1 single key stroke 5TBPO-9, and proceed to the copy cycle. RA hl 3 address is used to determine whether or not it is in the end mode. , 0'°, the process advances to the next copying cycle, and when it is 1, the end mode is set.This ROM address 3 is used to execute one copying cycle and then determine whether or not the end mode is entered. (Refer to Figure 8) (Copy cycle) Following the key/manufacturing/tree cycle described above, a copy cycle begins to execute the steps shown in the flowchart of Figure 9 below. First, 8'l'EP1 Check whether there is copy paper and developer and whether the temperature of the fixing heater is within the specified range.If NO, wait until it becomes OK.If the above conditions are OK, proceed to 8TE1)2. A drum rotating at a first speed.
Start the motor ('Vl). This 5TEPI
, 2 will be explained in detail later. Next, in 5TEP 3, check whether the optical system is at the home position. If it is not at the home position, turn on the double-acting clutch so that the optical system moves to the left when looking from the front of the main body, and The motor is mechanically coupled and moved to the home position. Once the home position is reached, STI! ; At P5, the clutch is turned off to stop the optical system. Therefore, scanning can always be started from a fixed position. Next, at 5TEP 6, check the home position of the screen/drum that is mechanically connected to the drum motor and is already rotating synchronously, and if it is not at the home position, the rotating screen drum is Wait until it reaches its home position. Details will be described later (FIG. 11). When the optical system reaches the home position, the optical system is already on standby at the home position, so the copy creation cycle starts from 5TEP7 to N. First, turn on/off the pre-irradiation lamp, primary charger, and exposure lamp. The drum motor is already rotating at this time, but after turning off the second speed change drum φ motor at 5TEP 72, it returns to 8'l'EP7, so at this time the Vi first speed Therefore, the first speed drum motor should be started again at S'l"EP 7. If 10 copies are made in one latent image formed on the screen drum, a total of 55 copies will be made. In this case, the latent image must be created six times, so the number of repetitions must be stored in advance in a part of the memory.Therefore, at S'rEP 7, which enters the Kogi cycle, 4
This (in this case, 10) is stored at the address as described above. Next v (Enter STEP 8, count the number of clock pulses generated per 10 rotations of the screen drum rotating at the first speed, and when this reaches 60 (that is, when the screen drum has rotated 60 degrees from its home position) S'l'
Turn on the primary charger (rear) with EP 9. After that, when CPl becomes 105 using the same method, S'l'EP
11 Te2 Turn on the deletion iaI device, then CP
When l is 12, turn on the forward clutch so that the optical system moves to the right when viewed from the front of the main body (S'l"EP12.1
3). After that, wait for the home position to appear again (S'l'EP] 4) o, that is, S'
If, between l'BP 7 and 14, the frequency of clock pulse 1 is not synchronized with the rotation of the screen drum or there is a mistake in counting, the sequence continues to depend only on the counting of clock pulses. When controlled, S'
l'h:I) Since mistakes that occur during one rotation of the screen drum from 7 to 14 are accumulated, this can be prevented by resetting the count of 5TEP 14. Similarly, S'l'EP 35, 5TEP 57, S
'l'EP 6 ] is also provided for the same reason. Since S'l'EP 15 and later are based on the same idea as above, the details will be omitted. That is, in this device, the rotation angle of the screen drum (i.e., the number of pulses) and 1 to 7 are stored in advance in the memory from one change point to the other in 11 sequences, and when the number of pulses is reached, the control device Turn it off. In other words, when 48 pulses from tlt, Ii, etc. are counted at the drum home position, the front primary charger is turned off (Step 16), when VC55 pulses are counted, the rear primary charger is turned off (Step 18), and when 47 pulses are counted, the forward movement is performed. The clutch and exposure lamp are turned off to finish scanning the original (step 20). Therefore, there is no need to provide an optical system detection switch on the moving path for terminating the tatemae. Next, do 20 pulses and count 10 pulses, 8'i'E
At P 24, the creation of the electrostatic latent image on the screen drum is completed (7. Since the transfer cycle to the insulated drum immediately begins, the r ram motor is switched from the first speed to the second speed. Therefore, after that, counting is performed. The clock is clock pulse 2 (described above), which is generated once per 10 rotation angles of the screen drum rotating at the second speed.Similar control is then performed to turn on the paper feed roller (step 30), and step 39 is applied to i. When the pulses are counted, the optical system's double-movement clutch is turned on to cause the optical system to move back and forth. Therefore, since there is a delay until the swinging movement starts after the forward movement stops, there is less shock when changing the movement. Furthermore, since the repeating process is started without waiting for the start and completion of the backward movement, the copying time can be shortened. 5TEP 43
Add 1 to the number of copies, 5TEP 44 to S'l"01
) determines whether a 5TOP command is issued, and if a 5TOP command is issued, it enters address 3 in RAM 3AM and stores the end mode. Also, in 1,9TEP 45, key e
Determine whether the desired number of copies set in the machine/tree cycle matches the number of copies 2, and if they match, 5T
Enter the same <RAM3AM3 address in EP 46 to memorize that it is the end mode. If it does not match, proceed to 5TEP 47, subtract 1 from the number of repetitions set at address R, AM4 at 5TEP 7, and repeat 5TEP.
48, determine whether R, AM 4 address is O, and S'rE
Jump to P 46 and enter the same <)IAM3AM3 address. If it is the end mode, the screen bias and latent image transfer charger are turned off at 5TEP49. Subsequent S'l'EP 51, ST1 bow P60゜5TEP
66 determines whether the end mode is active or not. When the end mode is entered, the 5TEP 51 keeps the first paper feed roller off. However, since the separation claw is turned on in Stella 7'54 and the following sequence is continued, new paper is not fed, but the copying of the already fed paper can be completed and ejected. At 5TEP60, turn off the developer and use S'rE.
At P 66, the home position of the next screen drum is determined, and if it is not the end mode at this step, the process returns to 5TEP 40 and repeats copying from the primary latent image. S'l'EP 68 determines whether the end mode has reached the number of repetitions, or whether it has occurred due to the 5TOP command or the number of copies being made matches the set number of copies. If the former, the screen Wait for the screen drum home position, where the drum appears after one more rotation, and when it comes, turn off the second speed drum motor υ,
5TEP 7K Return, switch to first speed drum motor, and repeat steps from electrostatic latent image formation again. In the latter case, after searching for the screen/drum home position with 5TEP67, CF2 is 330 (5TEP69)
Turn off the drum fist motor (v2) when
Completely complete the copy cycle, return to the first key entry cycle, and again press the operator's finger (Cl)
By terminating the copy cycle at 330 (ie, 3♂ before the scree/drum reaches its baud position), the drum is prevented from stopping some distance past the home position. This eliminates the approximately one rotation required for the operator to then issue a copy command and reach the home position of the screen drum at S'll'EP 6, thus eliminating the extra time required for the first copy. The program commands for executing each of the above steps are executed using the platform of tJ COM A manufactured by Nikkei Co., Ltd. (explained in Section 7). 0100 XlX2X3X4 Address designation command YIY2Y3Y4 ZIZ2Z3Z4 , and transfer Z1 to Z4 to the FBI. During program execution, a certain address in the RCM is specified by PC, and at time T1, code 0100 is output to the data code bus, and at T2, SW6.9 is output. It is latched in register C by opening and closing of . Same <'l" 2
I decoded this and recognized that it was an address specification command, and the same <
Xl-4 following at T2 is output to the bus bar, 'I'3
Register P B 3 K by opening/closing SW9゜SWI 5
Latched. Next, turn the PC +1 and read the code Yl~4. Output z1 to 4,
This is PB2. The new (-2) address that you want to store in the FBI and use in a later program is stored in the PB.The execution timing is slightly different from that shown in Figure 4.
If the 7° condition is met, the destination address Yl~4. Z1-4
is transferred to each PR2' and FBI, and further PB2 is transferred to PC2 and F.
Transfer BI to PCI 1-Complete, but does not jump if not completed. Jump instruction when Xl-4 detects overflow o V F as 1 at 0010, 0100 when register A is O, 1000 unconditionally, 1010 OV
When F is 0.1100, this is a jump instruction when register A is not 0. First, at time TI+T2, an address in the RCM is designated by the PC, and at time T1, code 0101 is output to the circuit code motherboard, and at time T2, it is latched into register C by opening/closing SW6.9. Similarly, at T2, continuation <
latched to. Now, assuming that X1 to 4 = 0100, in time T4, the code of 0101,0100 is decoded, it is recognized that it is a jump instruction, and the contents of register A are determined, and the following time is T5 to TIO. First, determine whether the content of register A is zero, and if it is not zero, P
C +2 [2 and exit the jump command. If it is zero, add 1 to the PC and continue the code Y1 to 4 in the ROM.
．． 8W9 for Z1-4, and PB2. by opening and closing SWt1 and 8W13. Store in FBI. Furthermore, PB2
→PC2, PBI→Transfer to PC1. As a result, the jump destination address appears on the PC, and in the next Tt-T10 cycle, the new jump destination address is specified in f'tOM and the jump is completed. 3, 0110 1000 Transfer command (1) This is P
Store the data at the address set in B in register A (hereinafter referred to as load). At time Ti+T20, the address in the ROM is designated by the PC, and at time rζ of T1, code 0110 is output to the data code bus, and at time T2, it is latched into register C by opening and closing SW6.9. Same < 1 followed by T2
000 is output to the bus bar and latched into register D at T3 with an opening/closing of 8N%17°9. Register C at T4,
The code of D is decoded, and the code of PB is output to the address code bus line during the time T5 to T10, and the key register of l(, AM, output device, key display input/output device) specified by this address is output. The contents are output to the data code bus line and stored in register A by opening and closing SW9 and SW2.
3 The codes for setting the input/output devices and memory itself required in the following procedure for controlling copying by making full use of the instruction codes shown in Table 3 are as follows. This means that the xVi code is not limited. Table 4 ff1J Of the 12 address code bus lines, the top four are lines for selecting memories, etc., and each memory and input/output device has a circuit known in itself for decoding this. The other eight lines are furthermore lines for specifying sub-addresses of the memory, each memory having a circuit known per se for decoding them. Each input/output unit in the input/output device has data 4b in this example.
Since it corresponds to each digit of it, no special designation circuit is required. Next, representative steps in the copying cycle shown in FIG. 9 will be specifically described. First, step 1 and step 2 are
This will be explained using the instruction flow and code shown in figure O. In the instruction flow, after step 0 of the key entry described above, in step 1-1, the address (0) of (1) of the input device is entered.
110) to register PB3, and then proceed to the next step 1.
-2, the human power device (1
) is transferred to register A, and in step 1-3 it is determined whether the contents of that register are 0 or not, and if not, the address ('0110) of input device (1) is transferred to P B
3, repeat the settings, transfer the contents, and judge. However, when the contents of the register A become O':) and the paper, toner, etc. conditions of the input device (1) are satisfied, the process moves to step 2. In step 2-1, the address (001) of (1) of the output device is
0) in register PB3, and in step 2-2, put [0001 in order from the lower digit of the code into register A, and in step 2-3, write down the contents of register A and set the output device specified by register PB3. It is transferred to (1) and drives the 1θ4 drum motor v1 corresponding to output device *oool in (1). This procedure will be explained in detail with reference to the circuit example shown in FIG. The execution procedure of Step 2 is recorded in advance from addresses 1 to 8 in the ROM based on the above-mentioned Table 3. S'l'E1) ILOM number% ROM
=+-)'1-10(100000000000100
Address code of 0110 person device (1) 0000 0000 0001 0000 0000
1-2 1 # 0010 01
10 1000# # 0100 0000
0000 Sha/f destination ROM address 2-1 #
# 0101 01000010 Output device (1)
Address code 1 # 0110 (100000
002-3# # 1000 100
0 1000 The process from when the contents of address 0 of the H.OM is read until the motor v1 is operated will be explained using the time chart of FIG. 4 and the circuit of FIG. 3. First, the register PC is cleared at the same time as the power is turned on, so as mentioned above, the address code mother I? j! 12 books contain the contents of the PC (1000゜oo
The :+-s of oo and oooo are output g and address O of the ROM is designated. As a result, the upper code 0100 of address 0 is output to the four data code bus lines at time T11, and is launched into register C at time T2 by opening and closing of SW9 and SW6. Immediately, this is decoded by the command decoder CT, which then converts the code appearing on the data code bus into PB3. PB2. A control signal α is generated to be stored in the FBI. Therefore 1゛2
When the time comes, l(, OM(lower code 01 of address 1
10 is output to the bus line, and then S
PB3 is latched by opening and closing W9°5W15. Next, add 1 to register P C and set the next R, OMt number jt.
The code of the above bus bar is upper OO00, lower 0 (100
11j1, and the stiffness is similarly calculated as S'AI by α above.
By opening and closing 9°5WII, PB2. PBI is latched and execution ends until the opening of 'l' IO. Continued ('I' 1 (7) time yc null (!l:, PC
+1, specify ROM2 address, and set upper code 0 with TI
110 output '1゛2, latch it in register C,
And lower: 7-do 1ooo output, stiffness is latched into register D at T3. '■ Deciphered with 14, T5~T10
At the time of , the code of P B, i.e. 0110 00o
o Outputs oooo to the address code bus line and inputs it to the input device (
1), all the signals input to these four lines are output in parallel to the data code bus, and SW9, SW
Register A is latched by opening/closing VC of No.2. (1st
(See Figure 4) This input device (1) has a paper remaining amount signal (1=absent, 0-present) on the four input lines as shown in Table 3. Toner remaining amount signal (1 = absent, 0 = present), fuser heater proper temperature detection signal (1 = NG, 0 = OK), stop command (
1 = present, 0 = absent), so all inputs are +0"
If it is level, it is okay to enter the copy cycle. Only 1. +1 DC with 'l'll) tOM3
When specifying the obi area, the upper '0101 is first stored in register C1.
The lower order 1100 is latched into register D as described above and decoded. Determining this as a conditional jump instruction, read register AkO, add 1/CPC, and write ROM, code at address i, upper oooo,
Output oooo00 to the 11th order data code bus as described above, and output binary 00 (l O to PB2, lower 00
Transfer 00 to P B l. Therefore, the code of PB becomes XXXX 0000 0 (100. Then, PB2 is transferred to PC2 and PBl is transferred to PCl to complete the execution, so the code of PC becomes i (+ 000 (10000
It becomes 000. Therefore, at time T1, the address code )tOM, 0 appears again on the address code bus line, and the 1-1-
The contents of addresses 10 to 3 will be repeated. But again,
If register A=0, that is, if all the state detection signals are OK, add 2 to PC. Therefore, the jump instruction is exited, and the R.OM5 address is designated on the address code bus at the next time Tl. Similarly to the above, the address code of the PBVc output device (1) is set by calling the ROM address 5.6. Then, when PC is +1 to y, l't OM 7 zone is specified at the next time T], and at T2, its upper code t&(1111 is latched to register C and decoded, and the following lower 1000 is SW9 , open and close SW2 to latch it in register A and finish.Furthermore, add 1 to pc, specify the ROM8 address in the next T1, and in T2, latched the upper 1000 of the contents of this address in register C, and in T3, latched the lower 10119 in register DK. Then, the contents of register A 1000 are sent to SWI and the opening/closing of 8W8.
At the same time as the code bus (output), the code 0010 0000 0000 latched to PB is output to the address code bus (12), the output device (1) is specified, and the code on the data code bus is output to the output device N (+1 of 4). Launch the output line of the book. Therefore, the output is tel = 0.1
e2=o, lθ3=o, and 1θ4=1. l
Since θ4 is connected to the P ram motor Vl (first speed V) through the interface circuit shown in FIGS. 3-4, the drum motor starts at first speed. Next, the drum home position confirmation procedure in step 6 in FIG. 9 will be explained in detail with reference to the command flow in FIG. 11. When the swing latch off is completed in step 5, the address (0111) of the input device (2) is set in the register PB3 in step 6-1, and the register PB3 is set in step 6-2.
The contents of the input device (1) set in step 6-3 are transferred to register A, and in step 6-3, the contents of register A are rotated clockwise.
As a result of the rotation in step 6-4, it is determined whether register A has overflowed or not, and if not, steps 6-1, 6-2 of reading the input again and overflow determination 6-3 are repeated. When an overflow of register A is detected in step 6-4, that is, when the home position is detected, the process proceeds to step 7. The code in Table 1 that executes steps 6-1 to 6-4 is written in step 5 from 1 oooo + as follows. S'11. ；P It OMl ground R,0
M Near)'0 1 1 11000000
6-2 0 1 2 011010006
-3 0 1 3 111101116-
4 0 1 4 0101 0010 0
VF=llsha/no0 1 5 00010000 That is, following step 5, the upper code 0100 is output from address 10 of the ROM to the data code bus line and latched into register C. Ru. Immediately, the contents of register C are decoded by the CPU, and a control signal α is sent to store the next code appearing on the data code bus into PB.
occurs. Therefore, when the lower code 0111 at address 10 is output to the data bus in the next clock, it is latched into PB3 by 8W9.15, which does not open or close with the α signal. From now on, until the execution of ROM address 12 is completed, the same process as the execution up to address 02 in the previous example is performed.
Output 11 0000 0000 to the address code bus line,
Specify the input device (2), output the signals input to the four wires of the input device (2), for example, 0000, in parallel to the data code bus, and open/close the register Ar by opening/closing SW9 and 2.
(This is latched.) This input device (2) has a screen home position detection signal (1: Yes, 0) shown in Table 2.
: No), optical system home position detection signal (1: Yes, 0: No)
, first and second clock pulse detection signals (l: present, 0:
(Nothing) is input (the above example shows that nothing has been detected). Next, ROM address 13 is specified and the top 11 contents are specified.
The lower 0111 of register C9 is latched into register D as described above and decoded by the CPU. Judgment 1-, the command to rotate the stiffness to the right shifts the series 4-digit contents of register A by one digit to the right. Furthermore, register AK is 0000
is not stored, so even if shifted, the resistor AV
i No overflow. Next, after executing the shift, add 1 to the PC and fLOM14R0M1
At address 4, upper 0101 is register C1 lower 0 (1
10 is stored in register D and decoded. This is judged to be a conditional jump instruction, and the previous register A is
Since the overflow detector OVF due to the right shift is not 1 and the screen home position # is not detected, 1) C is further increased by 1 and address R0M15 is designated. Then, the content 0001 0000 of address R0M15 is output to the 11th data code bus, and the upper [1eO001 is output to PB2.
Transfer 'st', o o o o to PBI, then transfer PB to PC to complete this step, and then transfer to ROM again.
The IO address designation code is stored. Next clock (T
1) Output the contents of this PC and read it from ROM address 10 to R0.
Repeat address M13. However, an overflow is detected in step 6-4, that is, register AK″0 is detected in step 6-2.
001 (home position detection) is stored, and step 6-3
By shifting to the right, a 1 is placed in the oVF, which decodes the difference and generates a signal α that increases the PC by +2. Therefore, the code of the ROM address that passes through the jump OM address and goes to step 7 is stored in the PC. Next, count the copy clocks in step 8 of FIG. The procedure for turning on the i+ appliance will be explained in detail using the command flow shown in FIG. The name of the instruction flow is 1 (, corresponding to each OM address as in the previous example). First, in step 8-1, the time from driving the r ram motor in step 7 to turning on the primary charger, that is, the predetermined copy clock time. N of the ROM where the number 6o is stored
Set the code of the leased land (for example, address 120) to PB. The code written in the ROM (from address 20 to address 499 is shown below).When address 200 is specified,
Oloo and oooo are sequentially input as data base) i K li, the upper 0100 is stored in register C, and the lower 1 oooo is read in CPtJ and stored in PB3. Next, the PC
When address R0M21 is specified by +1, its contents are (
11000000) are output to the data bus line and stored in the PB2° FBI in the same manner as described above. That is, the ROM designation code and the 120 address designation code in the ROM are stored. Step 8-2. In other words, add 1 to DC and IL
When the address OM22R0M22 is addressed, its contents are output to the data bus, and the upper 1101 is stored in the register C1, the lower (l). R
Specifying OM and its address 120, contents of address 120 6
Outputs the code () (corresponding to the above count value) to the data code bus. Then, the upper 4 bits of the 8 bits of the counting code are transferred to register A and the lower 4 bits are transferred to register B and stored therein. After storing, specify address R0M23 with CP2+IL and proceed to step 8-3. That is, the contents of this address are sequentially outputted to the data code bus line, stored in a register, decoded, and a control signal α is generated, and the contents of register A are transferred to PB2. (7) Proceed to step 8-4. When address R0M24 is specified, the contents of this address are converted to the 1st navigation data code mother #il.
K is output and resolved, and the upper n1 of the condensation register B is transferred to register A, and in the next step 8-5, the specified ROM 25 @ is decoded by decoding the instruction code of
) forward this to the FBI. Vil' in step 8-6
Decipher the instruction code at address tOM26 and execute the above PB3.2.
．． Store the contents of 1 in RAM via the data bus (~starting the charger operation)

[11. Temporarily remembers the start time. When the PC is +1 and the process proceeds to the next step 8-7, the ROM 27 address is specified, and the contents are outputted to the data code bus through the process shown in the previous example (G) below, and the lower 01 is decoded by decoding the upper oioo.
ll (code corresponding to input device (2)) is stored in PB3. In step 8-8, the input contents of the input device (2) are transferred to register A, and in the next step, the contents of register A are rotated counterclockwise. That is, the contents of the input device (2) are different from the previous example,
Shift to left digit. The reason why the copy clock detection signal is further rotated to the left in step 7'8-10 is to detect the presence or absence of 1 at this position since the copy clock detection signal is located at the second digit on the left. Proceeding to step 8-11, the ROM 32 address is designated, and as in the previous example, it is determined whether or not there is an overflow. When 0■)゛ detects ] by two left shifts, it jumps to step 7 specified by ROM address 33 and repeats the same suvno again. When OVF'l is not detected, proceed to the next stenoa '8-12. In this example, the copy clock pulse count is performed by detecting the rising edge of the copy clock signal, so that level 0 of the copy clock pulse is detected first, so that the above steps are performed. Therefore Stella 7'8-12 to 8-16
is the process of detecting level 1 of the copy clock pulse. This process Vj has the same flow as the previous example and R,
Executes with 0M code. When OvF is detected as 1 in step 8-16, the process advances to step 7'8-17, and the contents stored in the RAM in step 8-6 are read again to PB3.2゜1.
Transfer to. Then, in step 8-18, PB is decremented by 1, and in Stella 7'8-19, the subtracted PB is stored in R,l. PB2 in step 8-20.
(The contents of PB will not be deleted by executing step 8-19.)
It is transferred to register A, and in step 8-21, the contents of register A are pinched and it is determined whether the high order of the numeric code that was not subtracted is 0 or not. Since the register A is not 0, the program jumps to the ROM 27 address specified by the ROIV 146 address, that is, the stencil f8-7, and executes the steps up to now again. Therefore, the value stored in RAM is set to -1 when the copy clock rise button is pressed.
By doing this step by step, the current step is repeated a predetermined number of times to count up to the upper digits () of the numerical code. (7) When register A becomes 0, the process proceeds to step 8-22, transfers the contents of PBl having the lower order of the subtracted numerical code to register A, and determines whether register A is 0 or not in step 8-23. .ROM49 when register A is not 0
ROM specified by address 27 stets 7°8-
Go to 7 again and repeat the steps so far until the lower digit is O.
Execute until. Only when the register A becomes O is the counting step of the copying clock completed, and the operation sequence of the copying machine proceeds to the next ninth step, in which the -th order charger is turned on. Furthermore, since the synchronization of the clock pulse dedicated to the CPU is 1 μSec, the time required to execute one cycle of the above counting steps is approximately 30 steps, and since each step is at most 10 clocks × l μsec fz, the time required to execute one cycle of the above counting steps is at most 300 μsec. Since the synchronization of the copy clock pulse is approximately 8 m5ec as described above, 0 does not affect the counting. FIG. 14 shows a schematic circuit example of a control section which decodes the instruction code and data code of the ROM and outputs the control signal α in the above control procedure. This is a functional explanation of the steps in FIG. 10, and other steps can be implemented in a similar manner.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a retention copying machine that utilizes the control system of the present invention. FIG. 2 D11 Sequence time chart of a retention copying machine, FIG. 3, and FIGS. 3-1 to 3-4 are examples of the control circuit according to the present invention, and FIG. 4 is a clock for advancing the address of the ROM. Figure 5 shows an example of the circuit of the input/output section, Figure 6 shows another example, Figure 7 shows a schematic flowchart of the copy cycle according to Figure 3, VC, and Figure 8 shows the example of the circuit in Figure 7. The key entry flowchart, FIG.
Flowchart of sequence control in the figure, FIG. 10 is an example of the command flow at the start of input judgment drive in FIG. 9, FIG. 11 is an example of the command flow for the home position sheet, and FIG. 13 is an example of the instruction flow in the copy clock counting VC, FIG. 13 is an example of writing the ROM code required in FIG. 12, and FIG. 14 is a schematic circuit diagram of the control unit.
In Figure 4, ROM is a read-only memory that stores the copy sequence as an instruction code, RAM is a read/write memory that stores the set number of copies, etc., ■ is a device for inputting data such as copy status, and O is a copy processing device. The corresponding output device and CPU are central processing units that read and discriminate data and instructions and output all required signal data. Figure 10 Procedural amendment (method) September 2q, 1980 Director-General of the Patent Office Kazuo Wakasugi 1 Indication of the case 1988 Patent Application No. 56201 2,
Title of the invention: Scanning control device 3, relationship with the case of the person making the amendment Patent applicant's address: 3-30-2 Shimomaruko, Ota-ku, Tokyo Location: L? 1I46 Canon Co., Ltd., 3-30-2 Shimomaruko, Ota-ku, Tokyo (telephone 7)
58-2111) August 30, 1981 (Shipping date) a, f1m correct target specification, reprint of the contents of the amendment (no change in contents) Procedures Written amendment (voluntary) 1988 4 May 2nd, 2017, Director of the Japan Patent Office Kazuo Wakasugi 1, Indication of the case, Patent Application No. 56201 of 1982, 2, Name of the invention Scanning control device 3, Person making the amendment Relationship to the case Patent applicant address Shimomaruko, Ota-ku, Tokyo 3-30-2 Name (100
) Canon Co., Ltd. Representative: Ryu Kaku, Department 4, Agent address: 3-30-25 Shimomaruko, Ota-ku, Tokyo 146, Specification subject to amendment 6, Contents of amendment (1) Scope of claims of the specification Correct the column as shown in the attached sheet. (2) Correct "increase in width" to "increase" in line 4 of pages 1-2. (3) Lines M11-13 of page 1-2 are corrected as follows. ``In order to accurately control the amount of scanning movement based on this pulse counting, the reciprocating means is started to be driven based on a movement start position detection signal for scanning.'' 2. Claims: A reciprocating means for exposing and scanning a document; - A driving means for reciprocating the reciprocating means; -1;
means for generating a series of pulses in synchronization with the movement of the reciprocating means, counting a predetermined number of pulses from the pulse generating means in order to stop the reciprocating means after -7 of the 'main/return ILI*'; and control means for controlling the drive means to stop when the drive is completed.

Claims (1)

[Scope of Claims] A reciprocating means for exposing and scanning a document, a driving means for reciprocating the reciprocating means, a means for generating a series of pulses in synchronization with the movement of the reciprocating means, and an exposure start. an input means for commanding the reciprocating means to start forward movement of the reciprocating means to start the exposure scan; and a control means for controlling the driving means to stop by completing counting a predetermined number of pulses from the pulse generating means.