JPS5939573U - Character signal recording circuit - Google Patents
Character signal recording circuitInfo
- Publication number
- JPS5939573U JPS5939573U JP13504482U JP13504482U JPS5939573U JP S5939573 U JPS5939573 U JP S5939573U JP 13504482 U JP13504482 U JP 13504482U JP 13504482 U JP13504482 U JP 13504482U JP S5939573 U JPS5939573 U JP S5939573U
- Authority
- JP
- Japan
- Prior art keywords
- character signal
- circuit
- conjunction
- recording
- recording circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Studio Circuits (AREA)
- Television Signal Processing For Recording (AREA)
- Television Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
図は何れも本考案の一実施例を示し、第1図は要部回路
ブロック図、第2図はフェード設定解除時の各部波形説
明図、第3図はフェード設定時の各部波形説明図をそれ
ぞれ顕わす。
主な図番の説明、5・・・混合回路、4・・・レベル制
御回路、10・・・文字信号発生回路。Each figure shows an embodiment of the present invention. Figure 1 is a block diagram of the main circuit, Figure 2 is an explanatory diagram of the waveforms of each part when the fade setting is canceled, and Figure 3 is an explanatory diagram of the waveforms of each part when the fade setting is canceled. Reveal each. Explanation of main drawing numbers, 5...Mixing circuit, 4...Level control circuit, 10...Character signal generation circuit.
Claims (1)
に入力する混合回路と、該混合回路の前段に配され記録
開始操作に連動して前記ビデオカメラ出力をフェードイ
ンせしめ記録終了操作に連動してフェードアウトせしめ
るレベル制御回路と、フェード動作に連動してフェード
期間中前記文字信号出力を発する文字信号発生回路とを
配し、フェード画面に文字を重畳した混合出力を記録す
ることを特徴とする文字信号記録回路。a mixing circuit that mixes the video camera output and character signal output and inputs the mixture to the recording circuit; and a mixing circuit arranged before the mixing circuit that fades in the video camera output in conjunction with a recording start operation and in conjunction with a recording end operation. and a character signal generation circuit that generates the character signal output during the fade period in conjunction with the fade operation, and records a mixed output in which characters are superimposed on a fade screen. Signal recording circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13504482U JPS5939573U (en) | 1982-09-06 | 1982-09-06 | Character signal recording circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13504482U JPS5939573U (en) | 1982-09-06 | 1982-09-06 | Character signal recording circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5939573U true JPS5939573U (en) | 1984-03-13 |
JPS6336765Y2 JPS6336765Y2 (en) | 1988-09-29 |
Family
ID=30304083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13504482U Granted JPS5939573U (en) | 1982-09-06 | 1982-09-06 | Character signal recording circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5939573U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03115468U (en) * | 1990-03-13 | 1991-11-28 |
-
1982
- 1982-09-06 JP JP13504482U patent/JPS5939573U/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03115468U (en) * | 1990-03-13 | 1991-11-28 |
Also Published As
Publication number | Publication date |
---|---|
JPS6336765Y2 (en) | 1988-09-29 |
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