JPS5937726A - Automatic frequency control circuit - Google Patents

Abstract

PURPOSE:To eliminate malfunction of a circuit due to the intermission of a burst, by supplying the output of a phase comparing circuit to a peak holding circuit through a gate circuit. CONSTITUTION:The oscillation frequency of a voltage-controlled oscillation circuit 7 which is supplied to a frequency mixing circuit 2 for the frequency conversion of a time-division input signal is controlled by a control signal. This control signal is obtained by making a phase comparison between the output of a frequency mixing circuit 2 and that of a frequency mixing circuit 2 by the phase comparing circuit 5 and leading the comparison output through the gate circuit 8 and the peak holding circuit 6. A specific gate signal generated corresponding to the leading edge of the time-division input signal is applied to a terminal 9 of the gate circuit 8 and when the gate signal is applied, the output of the phase comparing circuit 5 is turned off.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in an automatic frequency control circuit that is effective for systems that transmit burst signals such as 'I'DMA satellite communications.

Generally, in a TDMA communication line that transmits burst signals, it is necessary on the receiving side to establish carrier wave recovery as soon as possible after each burst and demodulate the received signal. An excellent method for carrier wave regeneration is a system that combines a multiplier circuit, a narrowband filter circuit, and a frequency mixing circuit. That is, this method uses a multiplier circuit to remove modulation noise from a received signal, extracts the extracted bright line spectrum using a narrowband filter circuit, and extracts a carrier signal using a step-down circuit. However, the input received signal generally has a frequency offset with respect to the reference frequency, and it is necessary to provide an automatic frequency control circuit to remove the influence of this phase offset.

Figure 1 is a schematic diagram of a conventional automatic frequency control circuit, in which 1 is a signal input terminal, 2 is a frequency mixing circuit, 3 is a signal branching circuit, 4 is a narrowband filter circuit, and 5 is a phase comparison circuit. Circuit 6 is a peak hold circuit.

7 is a voltage controlled oscillation circuit (VCO). The purpose of this circuit is to operate so that the input frequency of the narrow band filter circuit 4 is always at the center of the band filter circuit despite frequency fluctuations of the input signal. The input signal frequency of this circuit is fi,
When the oscillation frequency of the VCO 7 is fv, the output frequency fm of the mixing circuit 2 is fm=fi−fv. The output signal of the narrowband filter 4 undergoes a phase shift θ(f) as expressed by the following equation with respect to its input frequency f. Here, fb is the 3 dB lower frequency of the narrowband filter, and fo is its center frequency. Therefore, the output voltage Vc of the phase comparator 5 is Vc = kcθ (fm)
(kc is a constant).

Also, peak hold circuit 6. Letting the gains of VCO7 be kp and kv, respectively, fm=fi-kv-kpkc O(1m)=fi-k
(fm-fo) Here, if k = -kv kp kc -x/4, then f
m(1+k) = f i + kf.

Since in general k〉〉1 fi -+ f in fm.

Therefore, fluctuations in the input frequency are compressed.

However, in TDMA communication, as shown in FIG. 2, interference with other stations occurs between bursts. Figure 2(a) shows the input signal of the narrowband filter circuit;
b) is its output signal. The #1 burst signal at the output of this narrowband filter circuit is defined as A(t)cos・(ω
1t+01), #2 burst signal as B(t)cas(ω
2t+02), the output voltage V of the phase comparator circuit 5
c is 2 ・Vc = B'sinω11 t・(A(t)(
(ig (Or, @+θ t)+B(t)×circle(ω2t+02)) = B'A(t)s! n ((ω2-ω1house-θt)
+B B(t) gin (-01) where B' is the amplitude of the input signal of the narrowband filter circuit, and θ1. θ2 is each angular frequency ω1. This is the phase shift caused by ω2. Since A(t) is 0 in the steady state, the phase detection voltage Vc becomes -B-B(t) output θ2. This frequency control circuit is stable as long as it is controlled by the phase voltage in the second term of the above equation, but due to the frequency difference (ω2 - ω1) between the received signals, a large voltage shown in the first term of the above equation is output. That is,
As shown in FIG. 2 tc), a voltage is generated depending on the beat frequency. This voltage is supplied to the peak hold circuit, and if the input of this peak hold circuit is greater than the output hold voltage, the input signal is passed. Therefore, in conventional circuits, the automatic control circuit operates correctly due to the frequency difference between bursts. The drawback was that it didn't.

SUMMARY OF THE INVENTION An object of the present invention is to provide an automatic frequency control circuit that eliminates malfunctions of the circuit due to intermittent bursts and can automatically perform normal frequency control.

The automatic frequency control circuit 11 of the present invention includes a voltage controlled oscillation circuit whose oscillation frequency is controlled by a control voltage, a frequency mixing circuit which performs frequency conversion of a time-division input signal using an output signal of this voltage controlled oscillation circuit, and this mixing circuit. a signal branching circuit that branches the output signal of the signal branching circuit into two; a narrowband filter circuit that receives one output signal of the signal branching circuit as an input; and a signal branching circuit that receives the output signal of the narrowband filter circuit as one input. a phase comparison circuit that compares the phase of the other output signal with the other input; and a predetermined gate signal made to correspond to the rising edge of the time-division input signal to substantially turn off the output of the phase comparison circuit. a gate circuit that holds the peak of the output signal of this gate circuit;
It is configured to include control voltage supply means for supplying the output signal of the peak hold circuit as the control voltage for driving the voltage controlled oscillation circuit.

The present invention will be explained in detail below with reference to the drawings.

FIG. 3 is a block diagram of an embodiment of the present invention, and FIG. 4(a) to
(6) is an operation waveform diagram of FIG. 3. The same numbers as in FIG. 1 indicate the same components, 8 is a gate circuit, and 9 is a control signal input terminal. As shown in FIG. 4(d), a gate signal generated externally is input to this terminal 9, and according to this gate signal, the gate circuit 8 outputs the output of the phase comparator 5 (FIG. 4(C)). gates to cut off a portion of the input signal and inhibit its output, particularly where interference between bursts occurs. Therefore, since no abnormal voltage due to the inter-burst frequency difference is input to the peak hold circuit 6 as shown in FIG. 4(e), the automatic frequency control circuit according to the present invention is not adversely affected by the inter-burst frequency difference.

It is clear that the gate circuit 8 operates in the same manner even if it is provided at the input terminal of the phase comparator circuit 5, as shown in FIG.

Here, the control signals supplied from the outside will be explained.

In TDMA communication, there is always a reference station that controls each communication station, and the first time you connect a line, you will be communicating with this reference station, or in this case, you will be communicating with one station, so burst interference will not occur. . A TDMA frame is established through communication with this reference station, and since this frame structure is generally assigned in advance, the position on the frame of another station to be communicated with can be known in advance. Therefore, a control signal can be generated in advance corresponding to the position on the frame of another station. The width of this control signal only needs to be about the length of the rise and fall of the loop filters on both automatic frequency sides, so for example, in the Intelsat system, a gate width of about 2 μs is sufficient.

[Brief explanation of drawings]

Figure 1 is a block diagram of a conventional automatic frequency control circuit, Figure 2 is a block diagram of a conventional automatic frequency control circuit.
Figures (a), (b), and (C) are waveform diagrams explaining the operation of Figure 1, and Figure 3 is a block diagram of an embodiment of the present invention. 4(a) to 4(e) are waveform diagrams explaining the operation of FIG. 3, and FIG. 5 is a block diagram of a second embodiment of the present invention. In the figure, 1... Signal input terminal, 2... Frequency mixing circuit, 3... Signal branch circuit, 4...
Narrowband filter circuit, 5... Phase comparison circuit, 6...
...Peak hold circuit, 7...Voltage controlled oscillation circuit (VCO), s...Gate circuit, 9.
...This is a control input terminal. Treatment A Konmo 3V

Claims (1)

[Claims] A voltage controlled oscillation circuit whose oscillation frequency is controlled by a control voltage, a frequency mixing circuit which converts the frequency of a time-division input signal using the output signal of this voltage controlled oscillation circuit, and a signal branch which branches the output signal of this mixing circuit into two. a narrowband filter circuit that receives the output signal of one of the signal branch circuits as an input; and a narrowband filter circuit that receives the output signal of the narrowband filter circuit as one input and receives the output signal of the other signal branch circuit as the other input. a gate circuit that substantially turns off the output of the phase comparison circuit by a predetermined gate signal made to correspond to the rising edge of the time-division input signal; An automatic frequency control circuit comprising: a peak hold circuit that holds the peak of an output signal of the circuit; and a control voltage supply means that supplies the output signal of the peak hold circuit as the control voltage that drives the voltage controlled oscillation circuit.