JPS593739U

JPS593739U - arrester circuit

Info

Publication number: JPS593739U
Application number: JP5545483U
Authority: JP
Inventors: 信夫佐藤; 飯田　政雄; 章菊地; 藤岡　信照
Original assignee: 沖電気工業株式会社; 日本電信電話株式会社
Priority date: 1983-04-15
Filing date: 1983-04-15
Publication date: 1984-01-11

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図、および第２図は従来のアレスタ回路図、第３図
は本考案の第１の実施例を示す回路図、第４図は定電圧
クランプ素子のクランプ動作状態説明図、第５図は本考
案の第２の実施例を示す回路図、第６図は本考案の第３
の実施例を示す回路図である。１・・・ＰＮＰＮ半導体素子、２・・・通話路装置、３
゜４・・・伝送線、５・・・コモンモードチョークコイ
ル、６・・・放電素子、７・・・半導体定電圧クランプ
素子、８・・・伝送線充電電源、９，１０・・・父イオ
ード、１１・・・コンデンサ、１２・・・抵抗器、１３
・・・チョークコイル、２０・・・過電圧保護回路。＝　　　　Ｋと　　１１1 and 2 are conventional arrester circuit diagrams, FIG. 3 is a circuit diagram showing the first embodiment of the present invention, FIG. 4 is an explanatory diagram of the clamping operation state of the constant voltage clamp element, and FIG. 5 is a circuit diagram showing a second embodiment of the present invention, and FIG. 6 is a circuit diagram showing a third embodiment of the present invention.
FIG. 2 is a circuit diagram showing an embodiment of the present invention. 1... PNPN semiconductor element, 2... Communication path device, 3
゜4...Transmission line, 5...Common mode choke coil, 6...Discharge element, 7...Semiconductor constant voltage clamp element, 8...Transmission line charging power source, 9, 10...Father Iode, 11... Capacitor, 12... Resistor, 13
...Choke coil, 20...Overvoltage protection circuit. = K and 11

Claims

[Scope of utility model registration request]

(1) Diodes connected in series in opposite directions between the two transmission lines in each of one or more sets of transmission lines each consisting of two transmission lines; and - diodes connected in series in opposite directions to each other. In an arrester circuit in which an overvoltage protection circuit consisting of a two-terminal circuit network is connected to each series connection point of the series-connected diodes, the primary arrester, the secondary arrester, and the voltage rise An arrester circuit characterized in that one end of each of two two-terminal circuit networks formed by connecting a suppression circuit in parallel is connected to the above-mentioned connection point in common, and the other end of the two-terminal circuit network is grounded.

(2) The two-terminal circuit network is constituted by a parallel connection circuit of a discharge element, a semiconductor constant voltage element, and a series connection circuit of a capacitor and a resistor. - Utility model registration claim 1 arrester circuit.

(3) The arrester circuit according to claim 1, wherein the two-terminal circuit network is constituted by a parallel connection circuit of a discharge element, a semiconductor constant voltage element, and a capacitor.

(4) Utility model registration claim 1, characterized in that the two-terminal circuit network is constituted by a parallel connection circuit of a series connection circuit of a discharge element, a capacitor, a semiconductor constant voltage element, and a choke coil. Arrestor circuit as described.