JPS6321440U - - Google Patents

Info

Publication number
JPS6321440U
JPS6321440U JP11141086U JP11141086U JPS6321440U JP S6321440 U JPS6321440 U JP S6321440U JP 11141086 U JP11141086 U JP 11141086U JP 11141086 U JP11141086 U JP 11141086U JP S6321440 U JPS6321440 U JP S6321440U
Authority
JP
Japan
Prior art keywords
terminal
group
line
terminals
common
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11141086U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11141086U priority Critical patent/JPS6321440U/ja
Publication of JPS6321440U publication Critical patent/JPS6321440U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Thermistors And Varistors (AREA)
  • Emergency Protection Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

図は本考案の一実施例の構成を示す図である。 2,3…回線、4,5,6,7…ダイオード群
、10…ガスアレスタ、11…バリスタ。
The figure shows the configuration of an embodiment of the present invention. 2, 3... Line, 4, 5, 6, 7... Diode group, 10... Gas arrester, 11... Varistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力側および出力側にそれぞれ複数の回線が接
続された電気機器のサージ吸収回路において、各
正端子がそれぞれ前記入力側の各線路に接続され
、各負端子がそれぞれ一括して共通端子に接続さ
れた第1ダイオード群と、各負端子がそれぞれ前
記入力側の各線路に接続され、各正端子がそれぞ
れ一括して共通端子に接続された第2ダイオード
群と、各正端子がそれぞれ前記出力側の各線路に
接続され、各負端子がそれぞれ一括して共通端子
に接続された第3ダイオード群と、各負端子がそ
れぞれ前記出力側の各線路に接続され、各正端子
がそれぞれ一括して共通端子に接続された第4ダ
イオード群と、前記第1および第3ダイオード群
の前記各共通端子の接続点と前記第2および第4
ダイオード群の前記各共通端子の接続点との間に
配設されたサージ吸収素子とを具備してなること
を特徴とするサージ吸収回路。
In a surge absorption circuit for electrical equipment in which multiple lines are connected to the input side and the output side, each positive terminal is connected to each line on the input side, and each negative terminal is connected to a common terminal. a first group of diodes whose negative terminals are connected to each line on the input side, a second group of diodes whose positive terminals are collectively connected to a common terminal, and a second group of diodes whose positive terminals are connected to each line on the output side. A third diode group is connected to each line on the output side, and each negative terminal is connected to the common terminal at the same time, and each negative terminal is connected to each line on the output side, and each positive terminal is connected at once to the common terminal. A fourth diode group connected to a common terminal, a connection point between the common terminals of the first and third diode groups, and the second and fourth diode groups.
A surge absorption circuit comprising: a surge absorption element disposed between a connection point of each of the common terminals of a group of diodes.
JP11141086U 1986-07-22 1986-07-22 Pending JPS6321440U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11141086U JPS6321440U (en) 1986-07-22 1986-07-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11141086U JPS6321440U (en) 1986-07-22 1986-07-22

Publications (1)

Publication Number Publication Date
JPS6321440U true JPS6321440U (en) 1988-02-12

Family

ID=30991307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11141086U Pending JPS6321440U (en) 1986-07-22 1986-07-22

Country Status (1)

Country Link
JP (1) JPS6321440U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5843635A (en) * 1981-09-09 1983-03-14 Nippon Telegr & Teleph Corp <Ntt> Surge absorbing circuit in communication system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5843635A (en) * 1981-09-09 1983-03-14 Nippon Telegr & Teleph Corp <Ntt> Surge absorbing circuit in communication system

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