JPS593653Y2 - Image distortion correction circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image distortion correction circuit that can correct bottle cushion image distortion in a television receiver.

A conventional circuit of this type will be explained below with reference to FIG.

, 1 is a horizontal output circuit, 2 is a vertical oscillator, 3 is a vertical drive amplifier circuit, and 4 is a vertical output circuit.

First, the horizontal output circuit 1 will be explained.

HC is a horizontal deflection coil, one end of which is grounded through the load winding 5b of the saturable reactor 5 and the three-figure correction capacitor C3.

One end of the control winding 5a of the saturable reactor 5 is connected to the DC power supply element B.
The other end is connected to the collector of transistor Q through resistor R5.

R2 and R3 are resistors forming part of the base bias circuit for transistor Q.

t is an input terminal to which a vertical sawtooth current is supplied, which is grounded through a series circuit of an integrating capacitor C1 and a first resistor R1.

This input terminal t is connected to the base of the transistor Q through a series circuit of a DC blocking capacitor C2 and a variable resistor VR.

Further, a damping resistor R4 is connected in parallel to both ends of the control winding 5a of the saturable reactor 5.
The impedance of the control winding 5a is selected to be sufficiently large compared to the impedance of the control winding 5a.

For example, the impedance of the resistor R4 is about 10 kΩ, while the impedance of the control winding 5a is about 10 kΩ.
It is about 00.

Furthermore, the series circuit of capacitor C1 and resistor R1 constitutes a part of vertical output circuit 4 together with vertical deflection coil VC.

The input terminal t described above corresponds to the midpoint of connection between the vertical deflection coil VC and the capacitor C1.

Further, the first resistor R1 is also a negative feedback resistor for supplying a gain control signal to the vertical drive amplifier circuit 4 described above.

The midpoint of the connection between the capacitors and the resistor R1 is connected to the emitter of the transistor Q through the resistor R6, and is also connected to one end of the resistor R3.

However, this conventional image distortion correction circuit has the following drawbacks.

This will be discussed below.

A sawtooth wave vertical deflection current as shown in the second diagram flows through the series circuit of vertical deflection coil VC, capacitor C1, and resistor R1.

Therefore, a vertical parabolic voltage as shown in FIG. 2A is generated across the capacitor C1, and a vertical sawtooth wave voltage as shown in FIG. 2B is generated across the resistor R1.

Therefore, the voltage at the input terminal t becomes a parabolic voltage with a distorted waveform in which the voltage in FIG. 2B is superimposed on the voltage in FIG. 2A as shown in FIG. 2C.

Therefore, by simply supplying a distorted parabolic voltage with such a waveform to the base of transistor Q, the horizontal deflection coil HC
If only the horizontal sawtooth wave current flowing through the screen is modulated by a distorted vertical parabolic signal, the reproduced screen will be distorted into a trapezoid as shown in FIG.

Therefore, in this circuit, a sawtooth wave current based on the vertical sawtooth wave voltage shown in FIG. 2B generated in the resistor R1 is supplied to the emitter side of the transistor Q via the resistor R6. The vertical sawtooth wave component in the distorted vertical parabolic current flowing through the line 5a is canceled.

Therefore, not only a pure vertical sawtooth wave current as shown in the second diagram but also a vertical parabolic current flows through the resistor R1 in a superimposed manner, so if the gain of the vertical oscillation output is controlled by the terminal voltage of this resistor R1, Vertical linearity deteriorates.

In view of this, the present invention proposes an image distortion correction circuit that eliminates the above-mentioned drawbacks with a simple configuration by simply changing some of the connections of the above-mentioned conventional circuit and selecting the values of the circuit elements. It is something to do.

An embodiment of the present invention will be described below with reference to FIG. 4, but parts corresponding to those in FIG.

The present invention consists of a saturable reactor 5 having a load winding 5b connected to a horizontal deflection coil HC, a transistor Q having a collector connected to a control winding 5a of the saturable reactor 5, and a vertical sawtooth wave current supplied to the saturable reactor 5. A series circuit of an integrating capacitor C1 and a first resistor R1 are connected in series between the input terminal t and the ground, and the input terminal t is connected to the base of the transistor Q via a DC blocking capacitor C2. In an image distortion correction circuit in which the voltage at the end of the first resistor R1 is used as a gain control signal for the vertical oscillation output, the emitter of the transistor Q is connected to A second resistor R4 is grounded and connected in parallel with the control winding 5a of the saturable reactor 5 so that only the vertical parabolic current flows through the control winding 5a of the saturable reactor 5. The resistance value of the resistor R4 is selected.

To explain further, the emitter of transistor Q is connected to resistor R6.
directly grounded through.

The base of transistor Q is also directly grounded through resistor R3.

For example, the impedance of resistor R4 is 2°2Ω.
In this case, the impedance on the control winding 5a side of the saturable reactor 5 is, for example, 140Ω (if the signal frequency is 60Ω).
Hz).

Next, the operation and effect of the circuit according to the present invention shown in FIG. 4 will be explained.

At the input terminal t, that is, the base of the transistor Q, there is a
As shown in , a voltage in which a vertical sawtooth voltage is superimposed on a vertical parabolic voltage is applied, but since the impedance of the second resistor R4 is selected as described above, as a result, the collector of the transistor Q Of the distorted vertical parabolic current shown in the fourth diagram flowing in the 4th diagram, the pure vertical parabolic current component (FIG. 5B) mainly flows through the control winding 5a of the saturable reactor 5, Figure C)
flows primarily through the second resistor R4.

Therefore, the horizontal sawtooth current of the horizontal deflection coil HC will be modulated by the undistorted vertical parabolic signal.

The reason why currents with different waveforms flow through the resistor R4 and the control winding 5a of the saturable transformer is due to the inductance component of the control winding 5a.

The inductance component of the control winding 5a exhibits high impedance at high frequencies.

Therefore, the voltage change in the first half of the distorted parabolic waveform as shown in FIG. Become.

Therefore, the current flowing through the resistor R4 is large in the first half of the vertical period, and small in the second half.

In this way, under the influence of the inductance of the control winding 5a, a current with an emphasized vertical sawtooth wave component as shown in FIG. 5C flows through the resistor R4, while a current with an emphasized vertical sawtooth wave component as shown in FIG. An undistorted parabolic wave current as shown flows.

The combined current has a waveform as shown in FIG. 5A.

Incidentally, if the impedance of the second resistor R4 is made small,
The shunting effect of the vertical sawtooth wave current component increases accordingly, but in order to flow a sufficient vertical parabolic current to the control winding 5a, the value cannot be made too small, so an appropriate value should be selected taking both into consideration. do.

Furthermore, since it is no longer necessary to ground the emitter of the transistor Q via the first resistor R1, there is no possibility that a vertical parabolic current component will flow through the resistor R1, and deterioration of vertical linearity can be avoided.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional image distortion correction circuit, Fig. 2 is a waveform diagram, Fig. 3 is a pattern diagram showing image distortion, Fig. 4 is a circuit diagram showing an embodiment of the present invention, and Fig. 5 is a circuit diagram showing a conventional image distortion correction circuit. The figure is a waveform diagram. HC is a horizontal deflection coil, 5 is a saturable reactor, 5a and 5b are its control windings and load windings, Q is a transistor,
t is an input terminal, C1 is an integrating capacitor, R1 is a first resistor, C2 is a DC blocking capacitor, and R4 is a second resistor.

Claims (1)

[Scope of utility model registration request] a saturable reactor having a load winding connected to a horizontal deflection coil, a transistor having a collector connected to a control winding of the saturable reactor, and an input terminal to which a vertical sawtooth current is supplied and ground; It has a series circuit of an integrating capacitor and a first resistor connected in series, the input terminal is connected to the base of the transistor via a DC blocking capacitor, and the terminal voltage of the first resistor is connected to the base of the transistor. In the image distortion correction circuit used as a gain control signal for the vertical oscillation output, the emitter of the transistor is grounded without going through the first resistor, and the emitter is connected in parallel with the control winding of the saturable reactor. and a second resistor connected to the saturable reactor, the resistance value of the second resistor being selected so that only a vertical parabolic current flows through the control winding of the saturable reactor.