JPS5935492A - Manuscript lighting device - Google Patents

Manuscript lighting device

Info

Publication number
JPS5935492A
JPS5935492A JP57145744A JP14574482A JPS5935492A JP S5935492 A JPS5935492 A JP S5935492A JP 57145744 A JP57145744 A JP 57145744A JP 14574482 A JP14574482 A JP 14574482A JP S5935492 A JPS5935492 A JP S5935492A
Authority
JP
Japan
Prior art keywords
substrate
chips
led chips
wiring board
core type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57145744A
Other languages
Japanese (ja)
Inventor
Nobuki Ibaraki
伸樹 茨木
Mamoru Mizuguchi
水口 衞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57145744A priority Critical patent/JPS5935492A/en
Publication of JPS5935492A publication Critical patent/JPS5935492A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements

Abstract

PURPOSE:To enable the multiple LED chips to be arrayed in a small pitch assuring the operational reliability for a long time by a method wherein a metallic core type wiring substrate is utilized for arraying the LED chips. CONSTITUTION:The surface of a metallic core type wiring substrate 1 is coated with a resin film 2 to form the electrode patterns 3a, 3b. The multiple LED chips 4a, 4b connecting respective one electrode terminals to the pattern 3a are linearly arrayed on the film 2 while the other electrode terminals are connected to the pattern 3b through the intermediary of a lead wire. A cylindrical lens 6 opposing to the chips 4a, 4b is formed into one body with the lower surface of its base bonded and fixed on the substrate 1. The lens 6 focussing the light from the chips 4a, 4b irradiates a manuscript surface B as shown by the chain lines A. In such a constitution, since the substrate 1 is made of a metallic core body, heat radiation efficiency is improved.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明はファクシミリやオフィス・オートメーション機
器における原稿画像の読取シに用いられる原稿照明装置
に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a document illumination device used for reading document images in facsimiles and office automation equipment.

〔発明の技術的背景とその問題点〕[Technical background of the invention and its problems]

ファクシミリやオフィス・オートメーション機器におけ
る原稿画像の読取りは、従来一般に原稿照明光源に螢光
灯を用い、これによって照明された原稿画像を球面レン
ズ系を介してCCDリニア・イメージ・センサ等の固体
撮像装置に結像して行われている。
To read original images in facsimiles and office automation equipment, conventionally, a fluorescent lamp is generally used as the original illumination light source, and the illuminated original image is transmitted to a solid-state imaging device such as a CCD linear image sensor through a spherical lens system. This is done by focusing on the image.

ところが近年、この種の画像読取シ装置の小型・軽量化
と取扱いの容易化を図るべく要求が高まっている。そこ
で原稿照明用光源として発光ダイオード(IJD )等
の固体発光素子を用い、t fc口、ド・レンズ・アレ
イ等の結像距離O短い等倍光学系と、M84画像の主走
査幅と等しい光センサ素子アレイとを用い、これらを一
体化した密着型リニア・イメージ・センサが提唱される
に至っている。
However, in recent years, there has been an increasing demand for this type of image reading device to be smaller, lighter, and easier to handle. Therefore, a solid-state light-emitting element such as a light-emitting diode (IJD) is used as a light source for document illumination, and a 1-magnification optical system with a short imaging distance O such as a TFC aperture or a de-lens array is used, and a light source equal to the main scanning width of an M84 image is used. A contact type linear image sensor that uses a sensor element array and integrates these has been proposed.

この場合、上記固体発光素子を用いて構成される原稿照
明用光源として次のことが要求される。先ず原稿上の赤
色、特に朱印を読取る必要から、興明光として緑色(λ
=550〜570 nm )系の短波長光を用いること
、また原稿の主走査方向に線状に一様に照明すること、
史には光士ンサの感度によって定まる所定の照度で照明
すること醇である。
In this case, the following requirements are required for a light source for document illumination constructed using the solid-state light emitting device. First of all, it was necessary to read the red color on the manuscript, especially the red stamp, so the green color (λ
= 550 to 570 nm) type short wavelength light, and uniform illumination linearly in the main scanning direction of the document;
Historically, it is common practice to illuminate with a predetermined illuminance determined by the sensitivity of the light sensor.

しかして、上記の一直線状の照明を均一に行わしめる為
に、複数個のLED素子を直線状に配列し、各LED 
g子からの光をシリンドリカル・レンズを用いて集光す
ることが考えられている。
Therefore, in order to uniformly perform the above-mentioned linear illumination, a plurality of LED elements are arranged in a linear manner, and each LED
It has been considered to use a cylindrical lens to condense the light from the g-son.

然し乍ら、LED素子は通常、個々に集光機能を有して
いるが為に、直線状に配列した場合、照度ムラが生じ易
いこと、また素子の配列ピッチがその形状によって制限
される為に、所望とする照度を得難い、更に全体形状が
大型化する郷の問題があった。
However, since LED elements usually have a light gathering function individually, uneven illuminance tends to occur when arranged in a straight line, and the arrangement pitch of the elements is limited by their shape. There were problems in that it was difficult to obtain the desired illuminance, and the overall shape became larger.

そこで、 LEDをチップの段階で基板上に配設形成す
ることが考えられている。ところが、一般的なfラス・
エポキシ基板を用いた場合、基板の熱伝尋率が悪い為に
LEDチ、ゾの放熱が不十分となる。この結果、LED
チッゾが温度上昇してその発光効率が低下し、またLE
Dチッグのバッフペイジョンが不完全なことに起因して
長期信頼性が?Qられなくなる等の問題が生じた。
Therefore, it has been considered to arrange and form LEDs on a substrate at the chip stage. However, the general f-las
When an epoxy substrate is used, heat dissipation from LEDs 1 and 2 becomes insufficient due to the poor thermal conductivity of the substrate. As a result, the LED
Chizzo's temperature rises, its luminous efficiency decreases, and LE
Is the long-term reliability due to incomplete buff page of D Chig? Problems such as not being able to answer questions arose.

ま゛たセラミック基板を用いる上−とも考えられている
が、やはシ放熱の問題が存在し、基板裏面に金属性の放
熱フィンを設ける等の必要が生じた。また、このセラミ
ック基板を用いた場合には、そのコスト上昇が否めず、
実用性・汎用性に乏しかった。
It has also been considered to use a ceramic substrate, but this poses the problem of heat dissipation, making it necessary to provide metal heat dissipation fins on the back surface of the substrate. In addition, when using this ceramic substrate, the cost will inevitably increase.
It lacked practicality and versatility.

〔発明の目的〕[Purpose of the invention]

本発明はこのような事情を考應してなされたもので、そ
の目的とするところは、信頼性が高く、シかも量産性に
富んだ実用性の高い原稿照明装置を提供することにある
The present invention has been developed in consideration of the above circumstances, and an object thereof is to provide a highly practical document illuminating device that is highly reliable, mass-producible, and highly practical.

〔発明の概要〕[Summary of the invention]

本発明は、基板上に複数の固体発光素子チップを直線状
に配設形成すると共に、これらの固体発光素子チップに
対向してシリンドリカルレンズを設けてこれを前記基板
に一体化した構造を有し、特に上記基板として金属コア
型配線基板を用いた仁とを特徴とする原稿照明装置を提
供するものである。そして、望ましくは上記金属コア型
配線基板の裏面、若しくは側面を放熱構造とするように
したものである。
The present invention has a structure in which a plurality of solid-state light-emitting element chips are linearly arranged on a substrate, and cylindrical lenses are provided opposite to these solid-state light-emitting element chips and are integrated into the substrate. In particular, the present invention provides a document illuminating device characterized in that a metal core type wiring board is used as the substrate. Preferably, the back surface or side surface of the metal core type wiring board has a heat dissipation structure.

〔発明の効果〕〔Effect of the invention〕

かくして本発明によれば、基板が金属コア体からなる為
、その放熱効果を十分に期待できるので複数の固体発光
素子チップを細かいピッチで配列することが可能となり
、その動作信頼性も長期に亘って確保することが可能と
なる、そして原稿を照明するに十分な光量を均一に得る
ことができる上、材料面およびその製造プロセスの面か
ら見て大幅なコスト低減を図ることが可能となシ、月産
性にも優れている等の実用上絶大なる効果が奏せ、られ
る。
Thus, according to the present invention, since the substrate is made of a metal core body, a sufficient heat dissipation effect can be expected, making it possible to arrange a plurality of solid-state light emitting device chips at a fine pitch, and ensuring long-term operational reliability. This system makes it possible to uniformly obtain a sufficient amount of light to illuminate the original, and to significantly reduce costs in terms of materials and manufacturing processes. It has great practical effects, such as excellent monthly productivity.

〔発明の実施例〕[Embodiments of the invention]

以下、図面を参照して本発明の一実施例につき説明する
Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

図は実施例装置の要部を示す概略構成図であシ、1は金
属コア型配線基板である。この配線基板1は、例えばア
ルミニウムを素材とするもので、その断面形状を所謂f
EJ字状として裏面に3条の放熱フィン1aを設けたも
のとなっている。しかして、配線基板1の上面には、絶
縁層としての樹脂膜2が所定の厚みでコーティングされ
ておシ、この樹脂り児2上に、銅を主成分とする電極パ
ターン3m、3bがここでは平行に印刷配線形成されて
いる。この石、極パターン3aに、一方の電極端子f:
後接続て、複数のLEDチッグ4a、4b〜4nが所定
のピッチで直線状に、前記配線基板1の樹脂膜2上に配
設形成されている。そして、各LEDチッグ41゜4b
〜4nの他方の電極端子は金線等のり−ドfJ 5 m
 、 5 b〜5nを介して前記電極パターン3bにそ
れぞれがンディング接続されている。
The figure is a schematic configuration diagram showing the main parts of the embodiment device, and 1 is a metal core type wiring board. This wiring board 1 is made of aluminum, for example, and has a cross-sectional shape of so-called f.
Three radiation fins 1a are provided on the back surface in an EJ shape. The upper surface of the wiring board 1 is coated with a resin film 2 as an insulating layer to a predetermined thickness, and on this resin film 2, electrode patterns 3m and 3b containing copper as a main component are formed. In this case, printed wiring is formed in parallel. This stone has one electrode terminal f:
After connecting, a plurality of LED chips 4a, 4b to 4n are arranged and formed in a straight line on the resin film 2 of the wiring board 1 at a predetermined pitch. And each LED chip 41°4b
The other electrode terminal of ~4n is glued with gold wire etc. fJ 5 m
, 5b to 5n, each is connected to the electrode pattern 3b through a terminal connection.

また、図中6はシリンドリカル・レンズであシ、半円柱
状のレンズ部の下面両側に脚部を設けた形状を有してい
る。そして上記レンズ部を前記複数のLEDテ、グ4a
、4b〜4nに対向させ、脚部下面を前記配線基板1上
に接着固定して一体化されている。このシリンドリカル
・レンズ6は、図中1点鎖線Aで示すようにLEDチッ
プ4m、4b〜Inからの光t−ns光して、図中Bに
示す原稿面に照射するものである。しかして、@線状に
細いピッチで配設された複数のIJDチップ4*、4b
〜4nからの光によシ、原稿面Bは図中Cで示すように
一直線状に均一照明されるものとなっている。
Further, reference numeral 6 in the figure is a cylindrical lens, which has a shape in which legs are provided on both sides of the lower surface of a semi-cylindrical lens part. Then, the lens portion is connected to the plurality of LED tubes 4a.
, 4b to 4n, and the lower surfaces of the legs are adhesively fixed onto the wiring board 1 and integrated. This cylindrical lens 6 emits t-ns of light from the LED chips 4m, 4b to In as shown by the dashed line A in the figure, and irradiates the document surface shown as B in the figure. Therefore, @ multiple IJD chips 4*, 4b arranged in a linear manner at a thin pitch.
The document surface B is uniformly illuminated in a straight line by the light from 4n to 4n, as shown by C in the figure.

かくしてこのように構成される本装置によれば、LED
チ、プ4h、4b〜4nを配設する配線基板1がアルミ
ニウム等の金属コア体からなる為、その熱放散効率が良
い。しかも配線基板1の裏面が放熱フィン1aを設けた
放熱構造を為している為、上記熱放散効率が更に向上す
る。
According to the present device configured in this way, the LED
Since the wiring board 1 on which the chips 4h, 4b to 4n are arranged is made of a metal core made of aluminum or the like, its heat dissipation efficiency is good. Moreover, since the back surface of the wiring board 1 has a heat dissipation structure in which the heat dissipation fins 1a are provided, the heat dissipation efficiency is further improved.

従って、多数のLEDチップ4m、4b〜4nを細いピ
ッチで配設しても、その発熱を効率良く吸収し、これを
放熱することができる為、LEDチッゾ4*、4b〜4
nの動作信頼性を長期に亘って確保することができる。
Therefore, even if a large number of LED chips 4m, 4b to 4n are arranged at a narrow pitch, the heat generated can be efficiently absorbed and radiated, so LED chips 4*, 4b to 4n
The operational reliability of n can be ensured over a long period of time.

またこのようにして多数のLEDチ、プ4a、4b〜4
nを直線状に配設することができるから、原稿面Bに対
してそのiI!+1鍬読取シに十分な光景を均一安定に
与えてこれを照明することができる。
In addition, in this way, a large number of LED chips 4a, 4b to 4
Since n can be arranged in a straight line, the iI! +1 It is possible to uniformly and stably provide a sufficient field of view to the reader and illuminate it.

更には、配線基板1が金属コア体からなる為、その形状
加工が容易である上、高精度の機械加工ができる。しか
も、その強度2寸法安定性。
Furthermore, since the wiring board 1 is made of a metal core body, its shape is easy to process and can be machined with high precision. Moreover, its strength and 2-dimensional stability.

経済性の面でも優れている。その上、図中7に示すよう
に、装置固定用のねじ孔等も容易に精度良く設けること
ができ量産性が良い。そして、従来のセラミック基板等
に比して低価格であり、安価に装置を製作することがで
きる等の効果も奏せられる。尚、前記樹脂膜2は、例え
ば60μm程度の厚みで設けられるものでl)、これに
よる熱伝達の劣化は殆んどない・ このように本構造によれば独々格別の利点が奏せられる
。そして、例え[[AJJサイズの原稿面Bを、その幅
216mmに亘って直線状に照明せんとする場合には、
約130個はLEDチッグ4 m 、 4 b〜4 n
f:1.25mmのピッチで直線状に配列形成すればよ
い。この場合、定格において約5〜6Wの熱がLEDチ
ッゾ4m、4b〜4nから発せられることになるが、本
構造によればこれを効率良く放熱することが可能となる
。つまり、LIEDテッグ4m、4b〜4nとして、原
稿照明条件から緑色発光型のものを用いると、その発光
効率は高々0.5%であシ、供給η」:力の殆んどは熱
として消費される。このような場合であっても、J:記
熱を効率良く放熱できるので、LEDチッグ4a、4b
〜4nの動作信頼性を十分確保することが可能となる。
It is also excellent in terms of economy. Moreover, as shown in 7 in the figure, screw holes for fixing the device can be easily and accurately provided, and mass productivity is good. In addition, it is less expensive than conventional ceramic substrates, etc., and the device can be manufactured at low cost. Note that the resin film 2 is provided with a thickness of, for example, about 60 μm l), and there is almost no deterioration in heat transfer due to this. In this way, this structure provides unique advantages. . For example, if [[AJJ size document surface B is to be illuminated in a straight line over its width of 216 mm,
Approximately 130 LED chips 4m, 4b to 4n
f: It is sufficient to form a linear array at a pitch of 1.25 mm. In this case, approximately 5 to 6 W of heat will be emitted from the LED chips 4m and 4b to 4n at the rated value, but this structure can efficiently dissipate this heat. In other words, if a green light-emitting type is used as the LIED Teg 4m, 4b to 4n based on the document illumination conditions, the luminous efficiency will be at most 0.5%, and most of the power will be consumed as heat. be done. Even in such a case, the LED chips 4a and 4b can efficiently radiate heat.
It becomes possible to ensure sufficient operational reliability of ~4n.

尚、本発明は上記実施例に限定されるものではない。例
えば金属コア型配線基板1の寸法。
Note that the present invention is not limited to the above embodiments. For example, the dimensions of the metal core type wiring board 1.

形状、そして放熱フィン1aの形状等は仕様に応じて定
めればよいものである。また放熱フィン1aを上記配線
基板1の側面に設けることも可能である。更にはLED
チップの配列個数やその他についても、仕様に応じて変
形することができる。散するに本発明はその要旨を逸脱
しない範囲で種々変形して実施することができる。
The shape and the shape of the radiation fins 1a may be determined according to the specifications. Further, it is also possible to provide the radiation fins 1a on the side surface of the wiring board 1. Furthermore, LED
The number of chips arranged and others can also be modified according to specifications. In other words, the present invention can be modified in various ways without departing from the spirit thereof.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の一実施例装置の要部を示す概略構成図であ
る。 1・・・金属コア型配線基板、1m・・・放熱フィン1
.2−・・樹脂膜、s a 、 s b−箪4+にツヤ
ターン、4m。 4 b 〜4 n −LEDチップ、5 a 、 、5
 b 〜5 n−リード線、6・・・シリンドルカル・
レンズ、B・・・原稿面。
The figure is a schematic configuration diagram showing the main parts of an apparatus according to an embodiment of the present invention. 1...Metal core type wiring board, 1m...Radiating fin 1
.. 2-...Resin film, s a, s b-tan 4+ glossy turn, 4 m. 4b to 4n-LED chips, 5a, , 5
b ~5 n-lead wire, 6... cylinder cal.
Lens, B... Original surface.

Claims (2)

【特許請求の範囲】[Claims] (1)基板上に複数の固体発光素子チップを直線状に配
設形成し、これらの固体発光素子チップに対向してシリ
ンドリカルレンズを前記基板に一体化して設けてなる原
稿照明装置において、前記基板として金属コア型配線基
板を用いたことを特徴とする原稿照明装置。
(1) In an original illuminating device, a plurality of solid-state light emitting element chips are linearly arranged on a substrate, and a cylindrical lens is integrally provided on the substrate to face the solid-state light emitting element chips. A document illumination device characterized in that a metal core type wiring board is used as the substrate.
(2)  金属コア型配線基板は、その裏面若しくは側
面を放熱構造としたものである特許請求の範囲第1項記
載の原稿照明装置。
(2) The document illumination device according to claim 1, wherein the metal core type wiring board has a heat dissipation structure on its back surface or side surface.
JP57145744A 1982-08-23 1982-08-23 Manuscript lighting device Pending JPS5935492A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57145744A JPS5935492A (en) 1982-08-23 1982-08-23 Manuscript lighting device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57145744A JPS5935492A (en) 1982-08-23 1982-08-23 Manuscript lighting device

Publications (1)

Publication Number Publication Date
JPS5935492A true JPS5935492A (en) 1984-02-27

Family

ID=15392140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57145744A Pending JPS5935492A (en) 1982-08-23 1982-08-23 Manuscript lighting device

Country Status (1)

Country Link
JP (1) JPS5935492A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6255973A (en) * 1985-09-05 1987-03-11 Copal Co Ltd Led light source
JPS6298119U (en) * 1985-12-09 1987-06-23
JPS63171909U (en) * 1987-04-28 1988-11-09
WO2002086972A1 (en) * 2001-04-23 2002-10-31 Plasma Ireland Limited Illuminator
WO2003098707A1 (en) * 2002-05-22 2003-11-27 Applied Optotech Limited Led array
WO2004070839A2 (en) * 2003-02-05 2004-08-19 Acol Technologies S.A. Light emitting apparatus comprising semiconductor light emitting devices
JP2006237156A (en) * 2005-02-23 2006-09-07 Lg Electronics Inc Light source equipment and manufacturing method thereof
US7659547B2 (en) 2002-05-22 2010-02-09 Phoseon Technology, Inc. LED array
US10401012B2 (en) 2002-05-08 2019-09-03 Phoseon Technology, Inc. High efficiency solid-state light source and methods of use and manufacture

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6255973A (en) * 1985-09-05 1987-03-11 Copal Co Ltd Led light source
JPS6298119U (en) * 1985-12-09 1987-06-23
JPS63171909U (en) * 1987-04-28 1988-11-09
WO2002086972A1 (en) * 2001-04-23 2002-10-31 Plasma Ireland Limited Illuminator
US6995405B2 (en) 2001-04-23 2006-02-07 Plasma Ireland Limited Illuminator
US10401012B2 (en) 2002-05-08 2019-09-03 Phoseon Technology, Inc. High efficiency solid-state light source and methods of use and manufacture
WO2003098707A1 (en) * 2002-05-22 2003-11-27 Applied Optotech Limited Led array
US7659547B2 (en) 2002-05-22 2010-02-09 Phoseon Technology, Inc. LED array
WO2004070839A2 (en) * 2003-02-05 2004-08-19 Acol Technologies S.A. Light emitting apparatus comprising semiconductor light emitting devices
WO2004070839A3 (en) * 2003-02-05 2005-03-10 Acol Technologies S A Light emitting apparatus comprising semiconductor light emitting devices
JP2006237156A (en) * 2005-02-23 2006-09-07 Lg Electronics Inc Light source equipment and manufacturing method thereof

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