JPH09246602A - Light emitting diode array light source - Google Patents

Light emitting diode array light source

Info

Publication number
JPH09246602A
JPH09246602A JP8047400A JP4740096A JPH09246602A JP H09246602 A JPH09246602 A JP H09246602A JP 8047400 A JP8047400 A JP 8047400A JP 4740096 A JP4740096 A JP 4740096A JP H09246602 A JPH09246602 A JP H09246602A
Authority
JP
Japan
Prior art keywords
light emitting
emitting diode
light source
current limiting
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8047400A
Other languages
Japanese (ja)
Inventor
Yoshihiko Josa
佳彦 帖佐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP8047400A priority Critical patent/JPH09246602A/en
Publication of JPH09246602A publication Critical patent/JPH09246602A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Abstract

PROBLEM TO BE SOLVED: To realize a high luminous intensity per unit length by preventing the temp. rise of a light emitting diode array light source to increase the operating current. SOLUTION: Current limiting resistors 10 connected in series to a number of series connected light emitting diode chips are removed from a printed board of this light source. Instead of them, one or more current limiting resistors 10 are connected to a set 21 which mounts this light source, so as to be in series to all the chips 12.

Description

【発明の詳細な説明】Detailed Description of the Invention

【発明の属する技術分野】本発明はファクシミリ、ワー
ドプロセッサあるいは複写機の画像読み取り用イメージ
スキャナーなどに使用される光源に適した発光ダイオー
ド整列光源に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode array light source suitable for a light source used in an image scanner for image reading of a facsimile, a word processor or a copying machine.

【0002】[0002]

【従来の技術】近年、画像読み取り用の発光ダイオード
整列光源が、ファクシミリ、ワードプロセッサあるいは
複写機のイメージスキャナー部等において、イメージセ
ンサーで画像情報を読み取る原稿に光を照射するための
部品として使用されている。以下に、従来の画像読み取
り用の発光ダイオード整列光源の例について、図4〜図
7を参照して説明する。
2. Description of the Related Art In recent years, light emitting diode aligned light sources for image reading have been used as parts for illuminating a document whose image information is read by an image sensor in a facsimile, a word processor or an image scanner section of a copying machine. There is. Hereinafter, an example of a conventional light emitting diode array light source for image reading will be described with reference to FIGS.

【0003】図4はこの発光ダイオード整列光源を使用
した密着型イメージスキャナー部の要部断面図である。
この密着型イメージスキャナー部は、発光ダイオード整
列光源1、原稿2、セルフォックレンズ(日本板ガラス
株式会社の商品名)アレイ4、およびイメージセンサー
5で構成されている。位置3はセルフォックレンズアレ
イ4の光軸上にある。セルフォックレンズアレイ4の代
わりに光ファイバアレイを用いてもよい。この密着型イ
メージスキャナー部において、原稿2上の図4の紙面に
垂直な方向の読み取りラインに沿って発光ダイオード整
列光源1から光が照射され、原稿2からの反射光がセル
フォックレンズアレイ4で集束されて同一直線上に配置
されたイメージセンサー5へ導かれる。反射光はイメー
ジセンサー5で受光され、微小画素に分解された画像情
報が各画素濃度に対応する電気信号として取り出され
る。
FIG. 4 is a sectional view of a main part of a contact type image scanner section using this light emitting diode array light source.
The contact-type image scanner unit includes a light emitting diode alignment light source 1, a document 2, a SELFOC lens (trade name of Nippon Sheet Glass Co., Ltd.) array 4, and an image sensor 5. Position 3 is on the optical axis of the Selfoc lens array 4. An optical fiber array may be used instead of the SELFOC lens array 4. In this contact-type image scanner unit, light is emitted from the light emitting diode alignment light source 1 along a reading line in a direction perpendicular to the paper surface of FIG. 4 on the original 2, and reflected light from the original 2 is reflected by the SELFOC lens array 4. It is focused and guided to the image sensor 5 arranged on the same straight line. The reflected light is received by the image sensor 5, and the image information decomposed into minute pixels is taken out as an electric signal corresponding to each pixel density.

【0004】図5および図6は、それぞれこの密着型イ
メージスキャナー部に用いられる発光ダイオード整列光
源の斜視図及び図5のVI−VI断面図である。図5に示す
ように、この発光ダイオード整列光源は、所定の導電回
路(図示省略)が形成されたプリント配線基板6、発光
ダイオードチップ7、金属細線8、透明樹止封止体9、
および電流制限用抵抗体10で構成されている。
5 and 6 are a perspective view and a cross-sectional view taken along line VI-VI of FIG. 5, respectively, of a light emitting diode alignment light source used in this contact type image scanner unit. As shown in FIG. 5, the light emitting diode array light source includes a printed wiring board 6 on which a predetermined conductive circuit (not shown) is formed, a light emitting diode chip 7, thin metal wires 8, a transparent resin sealing body 9,
And a current limiting resistor 10.

【0005】導電回路が形成されたプリント配線基板6
の各所定箇所には、複数の発光ダイオードチップ7が導
電性の接着剤によって直線状に取り付けられ、発光ダイ
オードチップ7の一方の電極が電気的に接続されてい
る。発光ダイオードチップ7の他方の電極は、プリント
配線基板6の所定の導電体に金属細線8で接続されてい
る。電流制限用抵抗体10は数個直列接続された発光ダ
イオードチップ7への供給電流を所定の値に制限するた
めのものである。図7の回路図に示すように、直列に接
続された一定の数(図7では4個)の発光ダイオードチ
ップ7の群毎に、発光ダイオードチップ7の直列接続し
たダイオードチップの数に対応して定めた抵抗値の電流
制限用抵抗体10がプリント配線基板6上に取り付けら
れかつその導電体に電気的に接続されている。この電流
制限用抵抗体10は、個々の発光ダイオードチップ7の
順方向電圧のバラツキによる、相互に並列に接続された
発光ダイオードチップ7の群同士の間の動作電流のバラ
ツキを減らす作用も行う。このような従来の密着型イメ
ージスキャナー部によれば、図4に示すように、発光ダ
イオードチップ7から発した光が透明な樹脂封止体9を
透過して外部へ放射され、原稿2の位置3を照明する。
Printed wiring board 6 on which a conductive circuit is formed
A plurality of light emitting diode chips 7 are linearly attached to each of the predetermined locations with a conductive adhesive, and one electrode of the light emitting diode chips 7 is electrically connected. The other electrode of the light emitting diode chip 7 is connected to a predetermined conductor of the printed wiring board 6 by a thin metal wire 8. The current limiting resistor 10 is for limiting the supply current to the light emitting diode chips 7 connected in series to a predetermined value. As shown in the circuit diagram of FIG. 7, for each group of a certain number (four in FIG. 7) of light emitting diode chips 7 connected in series, the number of the light emitting diode chips 7 connected in series corresponds to the number of diode chips. A current limiting resistor 10 having a predetermined resistance value is mounted on the printed wiring board 6 and electrically connected to the conductor. The current limiting resistor 10 also reduces the variation in the operating current between the groups of the light emitting diode chips 7 connected in parallel due to the variation in the forward voltage of the individual light emitting diode chips 7. According to such a conventional contact type image scanner unit, as shown in FIG. 4, the light emitted from the light emitting diode chip 7 is transmitted to the outside through the transparent resin encapsulant 9, and the position of the document 2 is reduced. Illuminate 3.

【0006】[0006]

【発明が解決しようとする課題】従来の発光ダイオード
整列光源において、市場の要望である更なる高光度化を
達成するためには発光ダイオードチップ7の高光度化が
必要である。しかし、近年の半導体技術においてはその
高光度化は横ばい状態であり、これ以上の光度の向上は
望めない状況である。そこで光度の向上のためには発光
ダイオードチップ7の1チップあたりの動作電流の増加
が必要である。動作電流を増加させると、電流制限用抵
抗体10の更なる発熱の増大により温度が上昇し、発光
ダイオードチップ7のジャンクション部の許容温度を越
えてしまうおそれがある。そのため発光ダイオードチッ
プ7の信頼性の面に課題が生じ現状以上の電流の増加に
よる高光度化は難しい。また、電流制限用抵抗体10の
発熱により、電流制限用抵抗体10近傍の発光ダイオー
ドチップ7の温度が他の発光ダイオードチップ7より高
くなり、放射光の波長が他の発光ダイオード7のものに
対して変化する。その結果、発光ダイオード整列光源全
体として発光波長にバラツキを生じることとなる。プリ
ント配線基板6上での電流制限用抵抗体10の配置の工
夫だけでは電流制限用抵抗体10の発熱による波長のバ
ラツキを解消することは難しい。また、発光ダイオード
チップ7は順方向電圧にバラツキがあるために、電流制
限用抵抗体10を有しない場合は並列に接続された発光
ダイオードチップ7の群同士の間の電流バラツキが大き
く、結果として発光ダイオード整列光源全体での光度バ
ラツキが大きくなるという問題が生じる。従って並列に
接続された発光ダイオードチップ7の群相互間の動作電
流のバラツキを減らす作用を有する電流制限用抵抗体1
0を除去することは難しい。
In the conventional LED array light source, it is necessary to increase the luminous intensity of the LED chip 7 in order to achieve the higher luminous intensity required by the market. However, in recent semiconductor technology, the increase in luminous intensity has leveled off, and further improvement in luminous intensity cannot be expected. Therefore, in order to improve the luminous intensity, it is necessary to increase the operating current per chip of the light emitting diode chip 7. When the operating current is increased, the temperature of the current limiting resistor 10 is further increased due to heat generation, so that the temperature thereof rises, which may exceed the allowable temperature of the junction portion of the light emitting diode chip 7. Therefore, a problem occurs in the reliability of the light emitting diode chip 7, and it is difficult to increase the luminous intensity by increasing the current more than the current one. Further, due to the heat generation of the current limiting resistor 10, the temperature of the light emitting diode chip 7 in the vicinity of the current limiting resistor 10 becomes higher than that of the other light emitting diode chips 7, and the wavelength of the emitted light changes to that of the other light emitting diode 7. To change. As a result, the emission wavelength of the light emitting diode aligned light source as a whole varies. It is difficult to eliminate the wavelength variation due to the heat generation of the current limiting resistor 10 only by devising the arrangement of the current limiting resistor 10 on the printed wiring board 6. Further, since the light emitting diode chips 7 have variations in forward voltage, current variations between groups of the light emitting diode chips 7 connected in parallel are large when the current limiting resistor 10 is not provided. There is a problem that the light intensity variation in the entire light emitting diode aligned light source becomes large. Therefore, the current limiting resistor 1 having a function of reducing the variation in the operating current between the groups of the light emitting diode chips 7 connected in parallel
It is difficult to remove 0.

【0007】また、そのような発光ダイオード整列光源
を組込む装置においては、装置自体の小型化及び軽量化
が求められているので、装置の各構成部品に対しても軽
薄短小化が求められている。しかし、従来の発光ダイオ
ード整列光源の構造では、電流制限用抵抗体10を実装
するためのスペース及び放熱のためのスペースを確保し
なければならないので小型化が非常に困難であり、市場
ニーズに対応できないという問題があった。
Further, in an apparatus incorporating such a light emitting diode array light source, there is a demand for downsizing and weight reduction of the apparatus itself. Therefore, it is also required for each component of the apparatus to be light, thin and short. . However, in the structure of the conventional light emitting diode aligned light source, it is very difficult to miniaturize because it is necessary to secure a space for mounting the current limiting resistor 10 and a space for heat dissipation, and it is necessary to meet the market needs. There was a problem that I could not.

【0008】さらに、プリント配線基板6上の電流制限
用抵抗体10の発熱により、電流制限用抵抗体10に近
接する箇所に発光ダイオードチップ7を配置することが
制約され、使用目的や用途に応じて任意の個数の発光ダ
イオードチップ7を任意のピッチで配列することができ
ず、任意の照度分布を形成することができなかった。
Further, the heat generation of the current limiting resistor 10 on the printed wiring board 6 restricts the arrangement of the light emitting diode chip 7 in a position close to the current limiting resistor 10, depending on the intended use and application. Therefore, it was not possible to arrange an arbitrary number of light emitting diode chips 7 at an arbitrary pitch, and it was not possible to form an arbitrary illuminance distribution.

【0009】本発明は上記従来の問題点を解決するもの
で、電流制限用抵抗体10からの発熱を避けて、動作電
流増加による高光度化、発光ダイオードチップ7の発光
波長のバラツキの改善、光源の小型化への対応、及び任
意の照度分布の形成が可能な画像読み取り用発光ダイオ
ード整列光源を提供することを目的とする。
The present invention solves the above-mentioned problems of the prior art by avoiding heat generation from the current limiting resistor 10 to increase the luminous intensity by increasing the operating current and to improve the variation of the emission wavelength of the light emitting diode chip 7. An object of the present invention is to provide a light source for aligning light emitting diodes for image reading, which can cope with downsizing of a light source and can form an arbitrary illuminance distribution.

【0010】[0010]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明の発光ダイオード整列光源は、導電回路が
形成されたプリント配線基板の上に、導電回路の所定箇
所に直線状に配置されて取り付けられかつ一定数の発光
ダイオードが直列に接続された発光ダイオード群を複数
群電気的に並列に接続したものである。また電流制限用
抵抗体を発光ダイオード整列光源のプリント配線基板上
に設けるのに代えて、代わりに発光ダイオード整列光源
が取り付けられる装置側において、発光ダイオード整列
光源の電源と発光ダイオード整列光源間に直列に1個又
はそれ以上の電流制限用抵抗体を設けたものもある。
In order to achieve the above object, a light emitting diode array light source of the present invention is arranged linearly at a predetermined position of a conductive circuit on a printed wiring board having a conductive circuit formed thereon. A plurality of light emitting diode groups, which are attached and attached and in which a fixed number of light emitting diodes are connected in series, are electrically connected in parallel. Further, instead of providing the current limiting resistor on the printed wiring board of the light emitting diode aligned light source, on the side of the device to which the light emitting diode aligned light source is mounted instead, there is a series connection between the power source of the light emitting diode aligned light source and the light source aligned with the light emitting diode. In some cases, one or more current limiting resistors are provided.

【0011】[0011]

【発明の実施の形態】この発明の発光ダイオード整列光
源は、導電回路が形成されたプリント配線基板と、前記
プリント配線基板の導電回路の所定箇所に直線状に配置
された複数の発光ダイオードで構成されており、前記複
数の発光ダイオードは前記導電回路によって一定数の発
光ダイオードが直列に接続された発光ダイオード群が複
数群並列に接続されている。
BEST MODE FOR CARRYING OUT THE INVENTION A light emitting diode array light source of the present invention comprises a printed wiring board on which a conductive circuit is formed and a plurality of light emitting diodes linearly arranged at predetermined locations of the conductive circuit of the printed wiring board. The plurality of light emitting diodes are connected in parallel by a plurality of light emitting diode groups in which a fixed number of light emitting diodes are connected in series by the conductive circuit.

【0012】また発光ダイオードの電流制限用抵抗体を
前記プリント配線基板と電源との間であって、この発光
ダイオード整列光源を組み込む装置内に設けた構成の発
明もある。
There is also an invention in which a current limiting resistor for a light emitting diode is provided between the printed wiring board and a power source and provided in an apparatus incorporating the light emitting diode alignment light source.

【0013】電流制限用抵抗体をプリント配線基板上よ
り除去し、代わりに装置側へ装備するので、電流制限用
抵抗体からの発熱による影響が無くなり、発光ダイオー
ドの動作電流を増加でき、市場の要望である高光度化が
可能となる。また電流制限用抵抗体からの発熱による発
光ダイオードの発光波長のバラツキの改善も可能とな
る。
Since the current limiting resistor is removed from the printed wiring board and mounted on the device side instead, the influence of heat generated from the current limiting resistor is eliminated, and the operating current of the light emitting diode can be increased, which is It is possible to achieve the desired high luminous intensity. Further, it is possible to improve the variation in the emission wavelength of the light emitting diode due to the heat generated from the current limiting resistor.

【0014】さらに電流制限用抵抗体がプリント配線基
板上にないので、部品点数の削減とそれによる組立工数
の減少及びプリント配線基板の幅を減らすことが可能と
なる。またプリント基板の定尺の材料からの取れ数の増
加による材料費削減でコスト低減が可能となるだけでな
く、光源の小型化が容易となり設計の自由度が増す。一
方装置全体としても、従来は直列に接続された一定数の
発光ダイオード群毎に装備していた複数の電流制限用抵
抗体を発光ダイオード整列光源のプリント配線基板上よ
り除去し、代わりに発光ダイオード整列光源が取り付け
られる装置側において発光ダイオード整列光源と電源間
に1個又はそれ以上の電流制限用抵抗体を装備する方法
をとっている。したがって抵抗の部品点数削減となりコ
スト低減となる。
Further, since the current limiting resistor is not provided on the printed wiring board, it is possible to reduce the number of parts, the number of assembling steps, and the width of the printed wiring board. Further, not only the cost can be reduced by reducing the material cost due to the increase in the number of the printed-circuit boards taken from the standard size material, but also the miniaturization of the light source is facilitated and the degree of freedom in design is increased. On the other hand, as for the entire device, a plurality of current limiting resistors, which were conventionally equipped for a fixed number of light emitting diode groups connected in series, were removed from the printed wiring board of the light emitting diode array light source, and instead the light emitting diodes were replaced. On the side of the device to which the aligned light source is attached, one or more current limiting resistors are provided between the light emitting diode aligned light source and the power source. Therefore, the number of resistor parts is reduced, and the cost is reduced.

【0015】また、プリント配線基板上から電流制限用
抵抗体を除去することにより、発光ダイオードの配置上
の制約がなくなりプリント配線基板の導電体パターンを
任意の形に形成し、任意の個数の発光ダイオードを任意
のピッチで直線状に配列している。したがって使用目的
や用途に応じた照度を実現できる。また、発光ダイオー
ドの配置のピッチが等ピッチであって、均一な照度分布
を得るための等倍系照度分布、または発光ダイオードの
ピッチを任意に変えることで任意の照度分布、例えば中
央部に対して両端部の照度が高い1/cos 4θカーブを
描く縮小系照度分布を得ることが容易になり、市場の要
望に応じた製品設計が容易に可能となる。
Further, by removing the current limiting resistor from the printed wiring board, there is no restriction on the arrangement of the light emitting diodes, the conductor pattern of the printed wiring board is formed in an arbitrary shape, and an arbitrary number of light emission is performed. The diodes are arranged linearly at an arbitrary pitch. Therefore, it is possible to realize the illuminance according to the intended purpose and application. Further, the pitch of the arrangement of the light emitting diodes is equal pitch, and the illuminance distribution of the same magnification system for obtaining a uniform illuminance distribution, or by arbitrarily changing the pitch of the light emitting diodes, an arbitrary illuminance distribution, for example, with respect to the central part As a result, it becomes easy to obtain a reduced illuminance distribution that draws a 1 / cos 4θ curve in which the illuminance at both ends is high, and it is possible to easily design products according to market demands.

【0016】[0016]

【実施例】以下、本発明の発光ダイオード整列光源にお
ける実施例の構成について、図1および図2を参照しな
がら説明する。図1はこの実施例の斜視図、図2は図1
のII−II断面図である。図1および図2において、先ず
プリント配線基板11は、定尺の材料を複数個のプリン
ト配線基板11を含むサイズの加工基板(図示省略)に
切断し、コストダウンのために多数個取りの構成とす
る。この加工基板に所定の配線回路パターンの導電回路
15を複数個同時に形成する。導電回路15を形成した
後、加工基板を所定の寸法に切断して個々のプリント配
線基板11に分割する。図1の(a)及び(b)に示す
ように、各発光ダイオードチップ12は各導電回路15
の所定箇所にそれぞれの一方の電極を導電性接着剤によ
り直線状に取り付け電気的な接続を行なう。また発光ダ
イオードチップ12の他方の電極は他の導電回路15の
所定箇所にそれぞれ金属細線13で接続する。発光ダイ
オードチップ12の配列のピッチは例えば2〜10mm
である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The structure of an embodiment of the light emitting diode aligned light source of the present invention will be described below with reference to FIGS. 1 is a perspective view of this embodiment, and FIG. 2 is FIG.
11 is a sectional view taken along line II-II of FIG. In FIG. 1 and FIG. 2, first, the printed wiring board 11 is formed by cutting a fixed-sized material into processed substrates (not shown) of a size including a plurality of printed wiring boards 11, and taking a plurality of printed wiring boards 11 for cost reduction. And A plurality of conductive circuits 15 having a predetermined wiring circuit pattern are simultaneously formed on this processed substrate. After forming the conductive circuit 15, the processed substrate is cut into a predetermined size and divided into individual printed wiring boards 11. As shown in FIGS. 1A and 1B, each light emitting diode chip 12 has a conductive circuit 15
One of the electrodes is linearly attached to a predetermined position of the conductive adhesive to electrically connect the electrodes. The other electrode of the light emitting diode chip 12 is connected to a predetermined portion of the other conductive circuit 15 by a thin metal wire 13. The pitch of the arrangement of the light emitting diode chips 12 is, for example, 2 to 10 mm.
It is.

【0017】直線状に配列された発光ダイオードチップ
12、発光ダイオードチップ12が電気的に接続された
導電回路15の一部および金属細線13は、プリント配
線基板11の表面上に載置された状態で樹脂封止され
る。樹脂封止は、シリコーン樹脂などの透明樹脂封止体
14によりプリント配線基板11上の部品を封止し、部
品を保護する。プリント配線基板11の表面には、発光
ダイオードチップ12及び金属細線13を接続する導体
部分を除き、半田の付着を防止するためレジスト剤の塗
布によりレジスト層16を形成する。レジスト層16
は、発光ダイオードチップ12の放射光を反射させて効
率的に取り出すために光反射率の高い色、例えば白色に
するのが望ましい。
The light emitting diode chips 12 arranged linearly, a part of the conductive circuit 15 to which the light emitting diode chips 12 are electrically connected, and the thin metal wires 13 are placed on the surface of the printed wiring board 11. It is sealed with resin. The resin encapsulation protects the parts by encapsulating the parts on the printed wiring board 11 with the transparent resin encapsulant 14 such as a silicone resin. A resist layer 16 is formed on the surface of the printed wiring board 11 by applying a resist agent in order to prevent the adhesion of solder, except for the conductor portion connecting the light emitting diode chip 12 and the thin metal wire 13. Resist layer 16
Is preferably a color having a high light reflectance, for example, white in order to reflect the emitted light of the light emitting diode chip 12 and extract it efficiently.

【0018】近年の半導体製造技術の発達により発光ダ
イオードチップ12の順方向電圧のバラツキが小さく押
さえられるようになった。さらにこれに加えて、順方向
電圧を選別する技術が発達したので、それにより選別し
た発光ダイオードチップ12を用いることにより、直列
に接続された一定数の発光ダイオードの直列接続体の順
方向電圧のバラツキが小さくなった。従って直列接続体
18、19・・・相互間の動作電流のバラツキを小さく
することができるようになった。従って、従来の例の図
7に示すように、発光ダイオードチップ7をいくつかの
群に分割し、各群内の発光ダイオードチップ7を直列に
接続し、各群毎に電流制限用抵抗体10を設ける必要は
なくなった。このため多数の発光ダイオードチップ12
を直列接続し、且つその直列接続体を複数組並列に接続
した直並列接続体22に対して1個の電流制限用抵抗体
10を直列に接続するだけで十分である。電流制限用抵
抗体10は2個以上のものを接続してもよい。その結
果、プリント配線基板11上から電流制限用抵抗体10
を除去してプリント配線基板11を組込む装置21側へ
1個又はそれ以上の電流制限用抵抗体10を装備する方
法をとることができ、その方法をとった。図3は、本実
施例の発光ダイオード整列光源の発光ダイオードチップ
12の接続例を示す回路図である。図において、発光ダ
イオードチップ12は第1群18と第2群19に分けら
れ、各群18、19内ではすべて直列に接続されてい
る。そして第1群18と第2群19とは互に並列に接続
されている。電流制限用抵抗体10は互に並列に接続さ
れた第1群と第2群からなる直並列接続体22と電源2
0との間に直列に接続されている。発光ダイオードチッ
プ12の接続方法は図3に示す回路図に限定されるもの
ではなくどのように接続してもよい。発光ダイオード整
列光源を組み込む装置21側には、一般に多数の実装部
品のためのプリント配線基板を使用しておりスペース的
にも余裕がある。従ってたとえ大きさが大きくても、1
個又はそれ以上の電流制限用抵抗体10を装置側に組込
むことは全く問題とならない。例えば他の実装部品と共
用のプリント配線基板上に他の実装部品と同時に抵抗体
10を取付けてもよい。
With the recent development of semiconductor manufacturing technology, variations in the forward voltage of the light emitting diode chip 12 can be suppressed to a small level. In addition to this, since a technique for selecting a forward voltage has been developed, by using the light emitting diode chip 12 thus selected, the forward voltage of a series connection body of a certain number of light emitting diodes connected in series can be improved. The variation is reduced. Therefore, it has become possible to reduce variations in operating current between the series-connected bodies 18, 19 ... Therefore, as shown in FIG. 7 of the conventional example, the light emitting diode chips 7 are divided into several groups, the light emitting diode chips 7 in each group are connected in series, and the current limiting resistor 10 is provided for each group. No longer needed. Therefore, a large number of light emitting diode chips 12
It is sufficient to connect one current limiting resistor 10 in series to the series-parallel connection body 22 in which a plurality of series connection bodies are connected in parallel. Two or more current limiting resistors 10 may be connected. As a result, the current limiting resistor 10 is applied from above the printed wiring board 11.
It is possible to adopt a method in which one or more current limiting resistors 10 are mounted on the side of the device 21 in which the printed wiring board 11 is incorporated by removing the above. FIG. 3 is a circuit diagram showing a connection example of the light emitting diode chip 12 of the light emitting diode aligned light source of this embodiment. In the figure, the light emitting diode chips 12 are divided into a first group 18 and a second group 19, and all the groups 18 and 19 are connected in series. The first group 18 and the second group 19 are connected in parallel with each other. The current limiting resistor 10 includes a series-parallel connection body 22 including a first group and a second group, which are connected in parallel with each other, and a power supply 2.
It is connected in series with 0. The method of connecting the light emitting diode chips 12 is not limited to the circuit diagram shown in FIG. 3, and any method may be used. A printed wiring board for a large number of mounting components is generally used on the side of the device 21 in which the light emitting diode array light source is incorporated, so that there is room in terms of space. Therefore, even if the size is large, 1
Incorporating one or more current limiting resistors 10 into the device side poses no problem. For example, the resistor 10 may be mounted simultaneously with other mounted components on a printed wiring board shared with other mounted components.

【0019】この発明の実施例によれば、発光ダイオー
ド整列光源のプリント配線基板上に電流制限用抵抗体1
0を設けないので電流制限用抵抗体10からの発熱の影
響はうけない。従って発光ダイオードチップ12の動作
電流を増加させることができ、市場の要望である発光ダ
イオードの高光度化が可能となる。また、電流制限用抵
抗体10をプリント基板11上に設けないことにより各
発光ダイオードチップ12間の温度の不均衡が解消さ
れ、温度不均衡による各発光ダイオードチップ12の間
の発光波長のバラツキを改善することができる。発光ダ
イオード整列光源自体に関しては、電流制限用抵抗体を
設けないこととそれによる組立工程の短縮化でコストダ
ウンができる。また、電流制限用抵抗体を設けないので
プリント配線基板11の幅を狭くすることができ、発光
ダイオード整列光源を小型化することができる。また定
尺シート状材料からの基板の取れ数の増加により材料費
が削減され、コストダウンとなる。
According to the embodiment of the present invention, the current limiting resistor 1 is provided on the printed wiring board of the light emitting diode array light source.
Since 0 is not provided, it is not affected by heat generated from the current limiting resistor 10. Therefore, the operating current of the light emitting diode chip 12 can be increased, and the luminous intensity of the light emitting diode can be increased, which is a market demand. Further, since the current limiting resistor 10 is not provided on the printed circuit board 11, the temperature imbalance between the light emitting diode chips 12 is eliminated, and the variation in the light emission wavelength between the light emitting diode chips 12 due to the temperature imbalance occurs. Can be improved. Regarding the light emitting diode array light source itself, the cost can be reduced by not providing the current limiting resistor and shortening the assembly process accordingly. Further, since the current limiting resistor is not provided, the width of the printed wiring board 11 can be narrowed and the light emitting diode aligned light source can be miniaturized. Further, the material cost is reduced due to an increase in the number of substrates that can be taken from the standard length sheet material, resulting in cost reduction.

【0020】さらにこの実施例の発光ダイオード整列光
源は電流制限用抵抗体を有しないので、発光ダイオード
チップ12の配置上の制約が無く、用途や使用目的に応
じて導電回路15のパターンを変更し、任意の個数の発
光ダイオードチップ12を任意のピッチで配列すること
ができる。従って用途や使用目的に応じて任意の照度を
得ることができる。またイメージスキャナー等に組み込
んで使用されるものでは、発光ダイオードチップ12の
ピッチが等ピッチである、等倍系照度分布の発光ダイオ
ード整列光源を得ることができる。また発光ダイオード
整列光源で照明される原稿面の照度を、原稿の中央部に
対して両端部で高くする必要のある装置に直接組み込ん
で使用するものでは、発光ダイオードチップのピッチを
任意に変えることにより、任意の照度分布、例えば 1
/cos 4θカーブに適合する縮小系照度分布を形成する
発光ダイオード整列光源を実現できる。このように市場
の要望に応じた製品設計が容易となる。本実施例では発
光ダイオードチップ12を直接プリント配線基板11上
に配置して導電性接着剤によって固定する例を示した
が、発光ダイオードチップ12をリードフレーム等に接
着して固定しエポキシ樹脂等で封止した単品タイプの発
光ダイオードを使用しても同様の効果を得ることができ
る。
Further, since the light emitting diode array light source of this embodiment does not have a current limiting resistor, there is no restriction on the arrangement of the light emitting diode chip 12, and the pattern of the conductive circuit 15 can be changed according to the application or purpose of use. Any number of the light emitting diode chips 12 can be arranged at any pitch. Therefore, it is possible to obtain an arbitrary illuminance according to the purpose or purpose of use. In the case of being used by being incorporated in an image scanner or the like, it is possible to obtain a light emitting diode aligned light source having an equal magnification illuminance distribution in which the pitch of the light emitting diode chips 12 is equal. Also, if the illuminance of the original surface illuminated by the light emitting diode alignment light source is directly incorporated into a device that needs to have higher illuminance at both ends of the original, the pitch of the light emitting diode chips can be changed arbitrarily. Allows any illuminance distribution, for example 1
It is possible to realize a light emitting diode aligned light source that forms a reduced system illuminance distribution that conforms to the / cos 4θ curve. In this way, product design according to market demands becomes easy. In this embodiment, the light emitting diode chip 12 is directly arranged on the printed wiring board 11 and fixed by a conductive adhesive. However, the light emitting diode chip 12 is adhered and fixed by a lead frame or the like and is fixed by an epoxy resin or the like. The same effect can be obtained by using a sealed single type light emitting diode.

【0021】[0021]

【発明の効果】本発明の発光ダイオード整列光源は、プ
リント配線基板上に電流制限用抵抗体を有しないので、
電流制限用抵抗体からの発熱による温度の上昇がない。
したがってその分発光ダイオードチップの動作電流を増
加して高光度化が実現できる。さらに、電流制限用抵抗
体からの発熱による発光ダイオードの発光波長のバラツ
キがなくなるとともに温度の不均衡による光度のバラツ
キを改善することができる。
Since the light emitting diode array light source of the present invention does not have a current limiting resistor on the printed wiring board,
There is no temperature rise due to heat generated from the current limiting resistor.
Therefore, the operating current of the light emitting diode chip is increased by that amount, and high luminous intensity can be realized. Further, it is possible to eliminate the variation in the emission wavelength of the light emitting diode due to the heat generated from the current limiting resistor and to reduce the variation in the luminous intensity due to the temperature imbalance.

【0022】また、発光ダイオード整列光源を形成する
プリント基板上に電流制限用抵抗体を有しないので、部
品点数の削減とそれによる組立工程の短縮化でコストダ
ウンとなる。さらに、電流制限用抵抗体がないので配線
基板の幅を狭くすることができ、それにより発光ダイオ
ード整列光源をさらに小型化することができ、結果とし
て発光ダイオード整列光源を取り付ける装置を小型化す
ることができる。また、定尺シート状材料から得られる
プリント配線基板の数の増加により材料費が削減されコ
ストダウンが可能となる。
Moreover, since the current limiting resistor is not provided on the printed circuit board forming the light emitting diode aligned light source, the number of parts is reduced and the assembly process is shortened, resulting in cost reduction. Further, since there is no current limiting resistor, the width of the wiring board can be narrowed, which allows the LED light source to be further miniaturized, and as a result, the device for mounting the LED light source to be miniaturized. You can In addition, the increase in the number of printed wiring boards obtained from the regular-sized sheet material reduces the material cost and enables cost reduction.

【0023】さらに、プリント配線基板の導電体パター
ンを用途や使用目的に応じて変更することにより、任意
の個数の発光ダイオードチップを任意のピッチで直線状
に配列することができる。その結果、用途や使用目的に
応じた照度レベルを実現できる。また発光ダイオードチ
ップのピッチが等ピッチである等倍系照度分布または発
光ダイオードチップのピッチを任意に変えることによ
り、任意の照度分布の、例えば 1/cos 4θカーブを
描く縮小系照度分布を形成することが容易になり、市場
の要望に応じた製品設計が可能となる。
Furthermore, by changing the conductor pattern of the printed wiring board according to the application or purpose of use, it is possible to arrange an arbitrary number of light emitting diode chips in a straight line at an arbitrary pitch. As a result, it is possible to realize the illuminance level according to the purpose and purpose of use. Further, by reducing the illuminance distribution of equal magnification system in which the pitch of the light emitting diode chips is equal, or by arbitrarily changing the pitch of the light emitting diode chips, a reduced system illuminance distribution of an arbitrary illuminance distribution, for example, a 1 / cos 4θ curve is formed. This makes it easier to design products according to market demands.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)は本発明の実施例の発光ダイオード整列
光源の斜視図 (b)は(a)の斜視図の部分拡大図
FIG. 1A is a perspective view of a light emitting diode array light source according to an embodiment of the present invention. FIG. 1B is a partially enlarged view of the perspective view of FIG.

【図2】図1のII−II断面図FIG. 2 is a sectional view taken along line II-II of FIG.

【図3】本発明の実施例である発光ダイオード整列光源
の発光ダイオードチップの接続例の回路図
FIG. 3 is a circuit diagram of a connection example of light emitting diode chips of a light emitting diode aligned light source that is an embodiment of the present invention.

【図4】従来の発光ダイオード整列光源を用いたイメー
ジスキャナーの要部断面図
FIG. 4 is a sectional view of a main part of an image scanner using a conventional light emitting diode aligned light source.

【図5】図4のイメージスキャナーで使用された従来の
発光ダイオード整列光源の斜視図
5 is a perspective view of a conventional light emitting diode alignment light source used in the image scanner of FIG.

【図6】図5のVI−VI断面図6 is a sectional view taken along line VI-VI of FIG.

【図7】従来の発光ダイオード整列光源の発光ダイオー
ドチップの接続を示す回路図の一例
FIG. 7 is an example of a circuit diagram showing connection of light emitting diode chips of a conventional light emitting diode array light source.

【符号の説明】[Explanation of symbols]

10 電流制限用抵抗体 11 プリント配線基板 12 発光ダイオードチップ 15 導電回路 20 電源 21 装置 10 Current Limiting Resistor 11 Printed Wiring Board 12 Light Emitting Diode Chip 15 Conductive Circuit 20 Power Supply 21 Device

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 導電回路が形成されたプリント配線基板
と、前記プリント配線基板の導電回路の所定箇所に直線
状に配置され前記導電回路によって一定数の発光ダイオ
ードが直列に接続された発光ダイオード群が複数群電気
的に並列に接続された複数の発光ダイオード整列アレイ
とを有する発光ダイオード整列光源。
1. A printed wiring board having a conductive circuit formed thereon, and a light emitting diode group in which a fixed number of light emitting diodes are linearly arranged at predetermined locations of the conductive circuit of the printed wiring board and connected in series by the conductive circuit. And a plurality of light emitting diode aligned arrays electrically connected in parallel to each other.
【請求項2】 発光ダイオードの電流を制限するための
少なくとも1個の電流制限用抵抗体を前記プリント配線
基板と電源との間であってこの発光ダイオード整列光源
を組込む装置内に設けた請求項1記載の発光ダイオード
整列光源。 【0001】
2. The at least one current limiting resistor for limiting the current of the light emitting diode is provided between the printed wiring board and the power source and in a device incorporating the light emitting diode aligned light source. 1. The light emitting diode aligned light source according to 1. [0001]
JP8047400A 1996-03-05 1996-03-05 Light emitting diode array light source Pending JPH09246602A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8047400A JPH09246602A (en) 1996-03-05 1996-03-05 Light emitting diode array light source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8047400A JPH09246602A (en) 1996-03-05 1996-03-05 Light emitting diode array light source

Publications (1)

Publication Number Publication Date
JPH09246602A true JPH09246602A (en) 1997-09-19

Family

ID=12774070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8047400A Pending JPH09246602A (en) 1996-03-05 1996-03-05 Light emitting diode array light source

Country Status (1)

Country Link
JP (1) JPH09246602A (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0978759A1 (en) * 1998-08-04 2000-02-09 Agfa-Gevaert Aktiengesellschaft Device for exposing photographic recording material using LED's
JP2009111346A (en) * 2007-10-31 2009-05-21 Cree Inc Led array, and method for manufacturing same
JP2010199105A (en) * 2009-02-23 2010-09-09 Stanley Electric Co Ltd Light-emitting device and method of manufacturing the same
JP2010226733A (en) * 2010-04-21 2010-10-07 Mitsubishi Electric Corp Image reading apparatus
JP2011146735A (en) * 2011-03-22 2011-07-28 Rohm Co Ltd Method for manufacturing semiconductor light emitting device
EP2469593A2 (en) 2010-12-21 2012-06-27 Panasonic Electric Works Co., Ltd. Light-emitting device and illumination device using the same
US9076940B2 (en) 2005-01-10 2015-07-07 Cree, Inc. Solid state lighting component
US9335006B2 (en) 2006-04-18 2016-05-10 Cree, Inc. Saturated yellow phosphor converted LED and blue converted red LED
US9425172B2 (en) 2008-10-24 2016-08-23 Cree, Inc. Light emitter array
US9786811B2 (en) 2011-02-04 2017-10-10 Cree, Inc. Tilted emission LED array
US9793247B2 (en) 2005-01-10 2017-10-17 Cree, Inc. Solid state lighting component
US10842016B2 (en) 2011-07-06 2020-11-17 Cree, Inc. Compact optically efficient solid state light source with integrated thermal management
US11791442B2 (en) 2007-10-31 2023-10-17 Creeled, Inc. Light emitting diode package and method for fabricating same

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0978759A1 (en) * 1998-08-04 2000-02-09 Agfa-Gevaert Aktiengesellschaft Device for exposing photographic recording material using LED's
US9793247B2 (en) 2005-01-10 2017-10-17 Cree, Inc. Solid state lighting component
US9076940B2 (en) 2005-01-10 2015-07-07 Cree, Inc. Solid state lighting component
US9335006B2 (en) 2006-04-18 2016-05-10 Cree, Inc. Saturated yellow phosphor converted LED and blue converted red LED
US10295147B2 (en) 2006-11-09 2019-05-21 Cree, Inc. LED array and method for fabricating same
JP2009111346A (en) * 2007-10-31 2009-05-21 Cree Inc Led array, and method for manufacturing same
US11791442B2 (en) 2007-10-31 2023-10-17 Creeled, Inc. Light emitting diode package and method for fabricating same
US9484329B2 (en) 2008-10-24 2016-11-01 Cree, Inc. Light emitter array layout for color mixing
US9425172B2 (en) 2008-10-24 2016-08-23 Cree, Inc. Light emitter array
JP2010199105A (en) * 2009-02-23 2010-09-09 Stanley Electric Co Ltd Light-emitting device and method of manufacturing the same
JP2010226733A (en) * 2010-04-21 2010-10-07 Mitsubishi Electric Corp Image reading apparatus
EP2469593A2 (en) 2010-12-21 2012-06-27 Panasonic Electric Works Co., Ltd. Light-emitting device and illumination device using the same
US9786811B2 (en) 2011-02-04 2017-10-10 Cree, Inc. Tilted emission LED array
JP2011146735A (en) * 2011-03-22 2011-07-28 Rohm Co Ltd Method for manufacturing semiconductor light emitting device
US10842016B2 (en) 2011-07-06 2020-11-17 Cree, Inc. Compact optically efficient solid state light source with integrated thermal management

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