JPS593548A - Code converting circuit of variable-length code - Google Patents

Abstract

PURPOSE:To convert a code by a simple control and a simple constitution of a circuit, by feeding back an output of an FF circuit for storing an effective bit, to an input of this FF circuit through a switching circuit. CONSTITUTION:A variable-length code S1 whose maximum bits of an input data are, for instance, 8 bits is inputted to a matrix type rotating circuit 21. The data S1 is rotated by the number of bits decided by control of a controlling circuit 26, in the circuit 21, and is supplied to an FF circuit 22 and a switching circuit 23 as an output data S2. For instance, as for the first data, an output of the circuit 21 is selected and outputted in the circuit 23, and is written in an FF circuit 24. In this case, in case when the data written in the circuit 24 is less than 8 bits, a new data is added to the tail of the data which is written already, and when it reaches 8 bits, it is outputted as an output data from an FF circuit 25. In this way, in case when the written data is less than 8 bits, write can be executed simultaneously as to all the bits by feeding back the data which is written already, to the circuit 24 through the circuit 23.

Description

Detailed Description of the Invention (1) Technical Field of the Invention The present invention relates to a variable-length code code conversion circuit that converts an input signal consisting of a variable-length code into a signal consisting of a fixed-length code and outputs the converted signal. It is something.

(i) Background of the technology Generally, in information transmission, variable-length codes are used, in which the number of bits in one word changes depending on the content of the information, and fixed-length codes, in which the number of bits in one word is always constant. It is being The variable length code system has the advantage that the total number of bits required to transmit the same amount of information can be reduced compared to the fixed length code system, and is used for transmitting image signals, audio signals, etc. However, since the number of bits differs for each word, it is inconvenient to process the word as is, and the circuit becomes complicated. Such a drawback can be eliminated by converting a signal sequence consisting of codes of different lengths into parallel data divided into a certain number of bits.

Against this background, it is desired to realize a circuit that converts variable length codes to fixed length codes.

(3) Prior Art and Problems A conventional code conversion circuit for variable length codes is shown in FIG. The code conversion circuit shown in FIG. 1 includes a matrix type rotation circuit 11 that receives a variable length code data input signal having the maximum number of bits, a first 7 lip-flop circuit 12 that receives a rubinode output signal of the matrix type rotation circuit 11, The output signal of the matrix type rotary circuit 11 and the output of the first 7 flip-flop circuit 12 (switching circuit 1 receiving signal g)
3. a second 7 flip-flop circuit 14 that receives the output signal of the switching circuit 13; a third flip-flop circuit 15 that receives the output signal of the second 7 flip-flop circuit 14;
and a control circuit 16 for receiving the bit number information input signal of the data input signal and controlling the circuit.

In the code conversion circuit shown in FIG. 1, variable length code input data is input word by word in parallel to a RU matrix type rotation circuit 11. The rotation circuit 11 moves the bit position within each word by an arbitrary number of bits without changing the order of the rubinode data input in parallel, that is, converts the bit position as if the rubinode data was rotated. It has a function to output in parallel. The above functions of the rotation circuit 11 are controlled by the control circuit 16 according to the bit number information of the variable length code input data.

The output signal of the rotation circuit 11 is written into the first 7-lip-flop circuit 12 and simultaneously written into the second 7-lip-flop circuit 14 via the switching circuit 13. In this case, if there is unwritten data that protrudes from the rubinode during the previous data writing, it is added to the beginning of the parallel data from the first 7 flip-flop circuit 12 via the switching circuit 13 to the flip-flop of M2. circuit 1
Written to 4. In this way, if the parallel data written to the second 7-lip-flop circuit 14 does not reach the rubinode, the next variable-length code input data has the leading bit written to the second 7-lip-flop circuit 14. The data is converted so that it is located at the end of the stored data, and written to the Noribu flop circuit 14.

In this way, when the data written to the flip-full 2-flop circuit 14 reaches the rubinode, its contents are written to the third 7-lip flop 15 and output as fixed-length code output data at a predetermined timing. be done.

By the way, in the code conversion circuit shown in FIG.
When the next data is written, it is written to the second flip-flop circuit 14 via the switching circuit 13, but at that time, only the remaining bits are selectively written in the flip-flop circuit 14. There is a need. Also, 7
If the data written to the flip-flop circuit 14 does not reach the rubinode, it is necessary to write new data only to the unwritten bits while retaining the data already written to the flip-flop circuit 14. Therefore, in the code conversion circuit shown in FIG.
It is necessary to control the writing of data to the flip-flop circuit 14 bit by bit, which poses a problem in that the configuration and control operation of the control circuit become more complicated.

(4) Object of the Invention In view of the problems of the conventional type described above, the main object of the present invention is to feed back the output of a flip-flop circuit for storing valid bits to the input of the flip-flop circuit via a switching circuit. Based on this idea, we have developed a variable-length code code conversion circuit that can write data to the flip-flop circuit at once for all bits, thereby simplifying the configuration and control operation of the control circuit. It is about providing.

(5) Structure of the Invention The present invention provides a matrix-type rotation circuit that receives variable-length code input signals input in parallel and shifts the received input signal to shift the bit position, and the rotation circuit. a first 7-lip-flop circuit that receives the output signal of the rotary circuit, a switching circuit that receives the output signal of the rotary circuit and the output signal of the first 7-lip-flop circuit, and a second 7-lip-flop circuit that receives the output signal of the switching circuit. In the variable-length code code conversion circuit comprising a flip-flop circuit and a third 7-lip-flop circuit that receives an output signal of the second flip-flop circuit and outputs a fixed-length code output signal, the switching circuit further includes a fixed-length code output signal. receiving the output signal of the second 7 lip-flop circuit; The output signal is selectively output bit by bit, so that a fixed length code output signal is created by writing all bits at once in the second 7-ring flop circuit. An object of the present invention is to provide a code conversion circuit for variable length codes.

(6) Embodiment of the Invention A variable length code code conversion circuit as an embodiment of the present invention is shown in FIG. The code conversion circuit shown in FIG.
. . . A matrix-type rotation circuit 21 that receives DIfL, a first flip-flop circuit 22 that receives the rubit output signal of the matrix-type rotation circuit 21, an output signal of the rotation circuit 21, and a first . A switching circuit 23 receives the output signal of the second flip-flop circuit 22, 24, a second 7 flip-flop circuit 24 receives the output signal of the switching circuit 23, and receives an output signal of the second flip-flop circuit 24. Third flip-flop circuit 25 and input signal bit number information BII.

BI2...... BI% is received and each of the above circuits 21~
It is composed of a control circuit 26 that controls 25. The code conversion circuit shown in FIG. 2 is different from the code conversion circuit shown in FIG. different from.

An example of the configuration of the switching circuit 23 in the code conversion circuit of FIG. 2 is shown in FIG. The switching circuit 23 shown in FIG. It has a second stage switching section 232 that receives the output signal of the first stage switching section 231.

The operation of the code conversion circuit shown in FIGS. 2 and 3 will be explained below using the operation explanatory diagram of FIG. 4.

In the code conversion circuit shown in FIG. 2, the maximum bit of input data is, for example, 8 bits, and the variable length code data shown as 81 in FIG. 4 are (A) and (B).

(C) It is assumed that the information is input in the following order. The input data S1 is rotated by the number of bits determined by the control of the control circuit 26 in the rotation circuit 21, and is sent to the first flip-flop circuit 22 as converted output data S2.
and is supplied to the switching circuit 23. For example, regarding the first data (A), the input data is output as is from the rotation circuit 21, the output data of the rotation circuit 21 is also selected and output in the switching circuit 23 (S3), and the second flip-flop is written to the pull-up circuit 24 (S4).

In this case, since only 6 pits are written as valid data in the second 7 lip-flop circuit 24, it is necessary to add them to the tail of the 2 bits at the beginning of the next data (B).

For this purpose, the second input data (B) is transmitted to the rotation circuit 21
The data is rotated so that the first two bits are positioned at the end and output as S2. In the switching circuit 23,
The first stage switching unit 231 selects the output SL (that is, AI) of the second 7-lip-flop circuit 23 and supplies it to the second stage switching unit 232. The output S4 of the 2-7 flip-flop circuit is selected, and the output S2 of the rotation circuit 21 is selected for the last 2 bits, and the output S3 of the switching circuit 23 is selected.
The signal is supplied to the second 7-lip 70-tub circuit 24 as a signal.

The output S3 of this switching circuit 23 is written to the second flip-flop circuit 24, and since all bits of valid data have been written, it is written to the third clip-flop circuit 25 as output data.

Next, the third input data (C) is rotated by one pit in the rotation circuit 21 and supplied to the switching circuit 23 in order to be added to the tail of the unwritten one bit (b3) of the previous data (C). In the switching circuit 23, the previous output data of the rotation circuit 21 (i.e. A2) stored in the first flip-flop circuit 22 in the first stage switching section 231
is selected and supplied to the second-stage switching unit 232, and the second-stage switching unit 232 selects the output data of the second flip-flop circuit 22 for the first bit, and outputs the output data of the rotation circuit 21 for the last 7 bits. Output data is selected. The output of this switching circuit 23 is written as output data to the third 7-resop-flop circuit 25 via the second flip-flop circuit 24, as in the previous case.

Similarly, if there are unwritten bits in the previous input data, new data is added to the tail, and if the valid data written to the second flip-flop circuit 24 does not reach 8 bits, New data is added to the end of the already written data, and when it reaches 8 bits, it is output from the third flip-flop circuit 25 as output data.

In this way, in the code conversion circuit of FIG. 2, the data already written in the second flip-flop circuit 24 is
Even if the number of bits is less than 1,000 bits, the already written data is fed back to the input of the second flip-flop circuit 24 via the switching circuit 23, thereby completely writing the data to the second flip-flop circuit 24. Can be done a bit at the same time.

(7) Effects of the Invention According to the present invention, in a code conversion circuit that converts variable-length code input data and outputs it as fixed-length code data, data is written in all bits at once in a flip-flop circuit that holds valid data. As a result, code conversion can be performed with simple control and circuit configuration.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional code conversion circuit for variable length codes, FIG. 2 is a circuit diagram of a code conversion circuit for variable length codes as an embodiment of the present invention, and FIG. FIG. 4 is a circuit diagram showing an example of the configuration of the switching circuit in the figure. FIG. 4 is an explanatory diagram of the operation of the code conversion circuit in FIG. 2. (Explanation of symbols) 11.21: Matrix type rotation circuit, 12.22
: first flip-flop circuit, 13.23: switching circuit, 14.24: second flip-flop circuit, 15.
25: Third flip-flop circuit, 16.26:
Control circuit, 231: first switching section, 232: second switching section. 233

Claims (1)

[Claims] a matrix-type rotation circuit that receives variable-length code input signals input in parallel and shifts the received input signal to shift bit positions; and a first flip-flop that receives an output signal of the rotation circuit. a switching circuit that receives an output signal of the rotary circuit and an output signal of the first 7-lip-flop circuit; a second flip-flop circuit that receives the output signal of the switching circuit; In the variable-length code code conversion circuit, the switching circuit further comprises a third 7-lip-flop circuit that receives an output signal of the 7-tube circuit and outputs a fixed-length code output signal. An output signal is received, and in the switching circuit, the received output signal of the rotary circuit and the output signals of the first and second seven-rip full tube circuits are selectively output bit by bit. 1. A variable-length code code conversion circuit, characterized in that a fixed-length code output signal is created by writing all bits at once in the clip-flop circuit of No. 2.