JPS5933902A - Mic circuit - Google Patents

Mic circuit

Info

Publication number
JPS5933902A
JPS5933902A JP14428682A JP14428682A JPS5933902A JP S5933902 A JPS5933902 A JP S5933902A JP 14428682 A JP14428682 A JP 14428682A JP 14428682 A JP14428682 A JP 14428682A JP S5933902 A JPS5933902 A JP S5933902A
Authority
JP
Japan
Prior art keywords
line
coating
dielectric
circuit
block section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14428682A
Other languages
Japanese (ja)
Inventor
Toshiyuki Saito
俊幸 斉藤
Hideo Sugawara
菅原　秀夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14428682A priority Critical patent/JPS5933902A/en
Publication of JPS5933902A publication Critical patent/JPS5933902A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/02—Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08—Microstrips; Strip lines
    • H01P3/085—Triplate lines
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/201—Filters for transverse electromagnetic waves
    • H01P1/203—Strip line filters
    • H01P1/20327—Electromagnetic interstage coupling
    • H01P1/20354—Non-comb or non-interdigital filters
    • H01P1/20363—Linear resonators

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Waveguide Connection Structure (AREA)

Abstract

PURPOSE:To prevent adhesion of dust and a failure such as migration, by coating only a DC block section of a coupling line impressing a DC voltage to a prescribed line formed on a dielectric board with a dielectric. CONSTITUTION:The coupling line 6 coupled to the DC block section 7 is formed on the dielectric board 1. A direct current is cut off at the block section of the coupling line 6 and the electric characteristics are improved by providing the DC block section 7 corresponding to the 1/4 wavelength of the operaing frequency to a suitable position of the line 6. The coating 8 made of a dielectric, e.g. epoxy resin is applied to the block 7. Thus, the adhesion of dust is prevented and also a failure such as migration is avoided.

Description

【発明の詳細な説明】 （８）発明の技術分野 本発明は、超高周波たとえｉｉ’　Ｘ　、”：ンド以」
・の周波数のＩＡＩ　Ｃ回路に係り、とくに直流竜Ｈ二
が印加する結８線路の自流フロック部分のみをコーティ
ングするＭＩＣ回路に関するものである。[Detailed Description of the Invention] (8) Technical Field of the Invention The present invention relates to ultra-high frequency
This relates to an IAI C circuit with a frequency of ., and in particular to an MIC circuit that coats only the free current flock portion of the 8-line connection to which the DC dragon H2 is applied.

（ｂ）従来技術と問題点 発振器、増幅４姶の能６４１回路には、高周波イハ号は
とおすが、直流は通さ万い、いわゆる直流ブロック都が
必讐である。ところで比較的周波数の低ンクを第１図例
示す。図において」は誘電体たとえばセラミック等から
なる基板、２６基板１」−に形成し直流ブロック都３に
より結合される線路２１および２２から々る結合４１路
、４は線路２１（Ｄ　端ｆｆｌ＋に取着されたマイクロ
チッソコンブ−ンッ。(b) Prior Art and Problems The oscillator and 4-amplifier No. 641 circuit allow high-frequency waves to pass through, but do not allow direct current to pass through, and so-called direct current block circuits are inevitable. By the way, FIG. 1 shows an example of a relatively low frequency link. In the figure, "" indicates a substrate made of a dielectric material such as ceramic, 26 is formed on a substrate 1"-, and 41 connections are connected from lines 21 and 22 connected by a DC block 3, and 4 is a connection line 21 (connected to the D end ffl+). The micro chisso konboon was worn.

ｂｌｄ線％２２とマイクロヂンフフンテンダ４を結ぶリ
ボンでぞ）る。A ribbon connects the bld wire % 22 and the micro-zip mount tender 4).

基鈑１」１に直流７０ツク部３により結合される結合線
路２を形成し１肪結合線Ｗｉ２の直流ブロック都３を挾
む線路２１の端部にマイクロチッソコンブンブ４を溶着
し１　しかるのち該マイクロヂンブコンテンサ４と線路
２２を金（Ａ、）等から力るリボン５で接続すれば、該
結合線路２には高周波信すはとおるが、直流はきおら力
い。すなわち直流はカントされる。ところで周波数がＸ
バンド以上のマイク゛口波つ、あるい輝ミリ波帯に力る
と、前記結合線路２が周波数の波長に対応して小さくな
ルノで、前記マイクロチップコンチン”／−４カ使用で
きなくなる。そこでマイクロチンプコンテンツ用いられ
ている。第２図において６は基板１土に形成し直流ブロ
ック部７により結合さｉする結合線路である。すなわち
結合鞠路６０滴当在位置に使用周波数の＼波長に対応す
る直流ブロック部７を設（ハ）ることによって、該結合
線路６も直流フロック部゛ｚ″ｃ的流をカントし電気的
特性は良好であるが、線路ギャップが非常に狭いため直
流電圧が印加されるとマイグレーションが起きたり、ゴ
ミ等がイづイ６しだ場合に短絡する匍・の間！！ｔがあ
るので。A coupled line 2 is formed which is connected to the base plate 1 by a DC 70 hook part 3, and a microtisso comb 4 is welded to the end of the line 21 which sandwiches the DC block 3 of the coupled line Wi2. If the micro-zim condenser 4 and the line 22 are later connected with a ribbon 5 made of gold (A) or the like, high frequency signals will pass through the coupled line 2, but direct current will not be transmitted. In other words, direct current is canted. By the way, the frequency is
If the power is applied to the microphone waveband or the bright millimeter wave band, the coupling line 2 becomes smaller in proportion to the wavelength of the frequency, and the microchip contin''/-4 becomes unusable. Microchimp content is used.In Fig. 2, 6 is a coupling line formed on the substrate 1 and coupled by the DC block part 7.In other words, the coupling line 60 is connected to the wavelength of the frequency used at the position where the 60 drops are located. By providing the corresponding DC block part 7 (c), the coupled line 6 can also cant the current in the DC block part ゛z''c and has good electrical characteristics, but since the line gap is very narrow, the DC voltage is When is applied, migration occurs or a short circuit occurs when there is dust, etc. between the holes! ! Because there is t.

ＭＩＣ回路全体を乾燥空気等を充よした捻体内に設屑し
て飼止しなければなら力い等の問題点がろっだ。The entire MIC circuit must be housed in a screw body filled with dry air, etc., which causes problems such as force.

（Ｃ）発り］の目的 木兄ＦＩＩ４１−、ｔ　、上記従来の問題点に鑑み、結
合線路の直流ブロック部分のみに訪？ム１体でコーティ
ングしだＭ工Ｃ回路を提イノ（することを目的とするも
のである。(C) Departure] Purpose of FII41-, t In view of the above conventional problems, is it possible to visit only the DC block part of the coupled line? The purpose is to innovate a coated M/C circuit with a single unit.

（ｄ、）　　発１：！１１の構成 前述の目的を達成するだめに本発明は、誘電、体系板上
に所定の線路を形成し、該線路に直流ｆｌｔ圧が印加す
る結石線路をイｊするＭ　Ｉ　Ｃ回路において。(d,) Speech 1:! 11. In order to achieve the above object, the present invention provides an MIC circuit in which a predetermined line is formed on a dielectric system board, and a stone line is applied to the line to which a DC flt pressure is applied.

前記結合線路の直流プ０ンク部分のみを誘電体でコーテ
ィングすることによって達成寧れる。。This can be achieved by coating only the DC plug portion of the coupled line with a dielectric. .

（ｅ）　　発明の実施例 以下図面を参照しながら本発明に係るＭ工Ｃ回路の実施
例について詳細にハ（（、明する。(e) Embodiments of the Invention Hereinafter, embodiments of the M/C circuit according to the present invention will be explained in detail with reference to the drawings.

第３図は本発明の一実施例を説明するための斜視図で、
前図と同等の部分については同一符号を付しており、８
は誘Ｔｕ、休たとえばエポキシ樹脂等からなるコーティ
ングである１、 結合に９路６に形成した直流ブロック部７にエポキシイ
漬１月旨等からなるコーティング８を施づことによって
結合線ｆｉ！’＋　６の損Ｉ局を防止することができる
。FIG. 3 is a perspective view for explaining one embodiment of the present invention.
Parts that are the same as those in the previous figure are given the same reference numerals.
The connecting wire fi! is coated with a coating made of epoxy resin, etc., and the connecting wire fi! '+6 loss I station can be prevented.

第４図は、８Ｂ電休によりコーティング族した場合七施
さ々い場合の損失特性曲線を示したものであり、横軸に
同波Ｗｉ（ＧＨｔ）を、縦軸に損失（ｄＢ）を示し、実
線はコーチインクを施さない場合で。Figure 4 shows the loss characteristic curve in the case of seven coatings using 8B electric rest, with the horizontal axis showing the same wave Wi (GHt) and the vertical axis showing the loss (dB). The solid line is the case without coach ink.

点線はコーティングを施した場合の曲線である。The dotted line is the curve when coating is applied.

図でわかるようにコーチインク′を施してもほとんど損
失のちがいは認められ々い。As can be seen in the figure, there is almost no discernable difference in loss even if coach ink' is applied.

第５図は本発明に係るコーティング法を他に実装した平
面図で、前図と同等の部分については同一符号を付して
おり、９お工ひ］０は分布結合結方向性結合器のハクー
ンで、９１および１０１は接続線である。Figure 5 is a plan view of another implementation of the coating method according to the present invention, in which the same parts as in the previous figure are given the same reference numerals. In Hakun, 91 and 101 are connection lines.

図示しない基板上に分布結合型方向性結合器のノくクー
ン９および１０を形成して、接続線９１および１０’ｌ
をボンティング等で接着したのち、誘電体から力るコー
ティング８を施したものである。Nodes 9 and 10 of a distributed coupling type directional coupler are formed on a substrate (not shown), and connection lines 91 and 10'l are formed.
are bonded together by bonding or the like, and then a coating 8 is applied that is applied from a dielectric material.

第６図はＭＩＣ回路の直流ブロック部分にコーティング
８を印刷したものである。FIG. 6 shows a coating 8 printed on the DC block portion of the MIC circuit.

なお、コープインク８Ｖｉエポキシ樹脂を使用した説明
をしたが、エポキシ樹脂に限らずガラス等であっても構
わない。Although the explanation has been given using Coop Ink 8Vi epoxy resin, the material is not limited to epoxy resin, and may be made of glass or the like.

（ｆ）　　発明の効果 以上の説明からＦ！１．Ｊらかなように本発明に係るＭ
　Ｉ　０回路によれば、結合回路の直流フロック部分に
誘電体から力るコーティングを印刷等にに、す゛行うこ
とにより最埃等の伺増を防止するこ七ができるとともに
、マイグレーション等の障害が防止でき信頼性の向上に
寄与する七ころが大である。(f) From the explanation beyond the effects of the invention, F! 1. J Rakanayo M according to the present invention
According to the I0 circuit, by applying a dielectric coating to the DC flock part of the coupling circuit by printing, etc., it is possible to prevent the accumulation of dust, etc., and also to prevent problems such as migration. Seven points are important because they can be prevented and contribute to improving reliability.

【図面の簡単な説明】[Brief explanation of drawings]

第１図および第２図は従来の結合線路を説明するだめの
斜視図、第３図は本発明に係るＭＩＣ回路の結合線路の
直流プロンク部分にコーティングを施した一実施例を説
明するだめの斜視図、第４図はコーティングを施した場
合と施さない場合の特性曲線１第５図は本発明の他の実
装例を説明するための平面図１第６図はコーティングを
印刷した平面図である。 図においてｌＶｉ基析、２および６Ｖｉ結合回路。 ３および７け直流フロック部、４はマイクロチンプコン
テンザ、５はリボン、８にコーティング。 ９および１ＯｉＪ分布結合型方向性結合器のバク−、／
、　　２１および２とハ線路、９１および１０１Ｖｉ接
続線をそれぞれ示−Ｊ０ 第１図 第２図 第３図 第４図 周液数（ＧＨｚ） 第５図 ＩＬＩ＋ 第６図FIGS. 1 and 2 are perspective views for explaining a conventional coupled line, and FIG. 3 is a perspective view for explaining an embodiment in which a DC prong portion of a coupled line of an MIC circuit according to the present invention is coated. Figure 4 is a perspective view, characteristic curves with and without coating 1 Figure 5 is a plan view for explaining another implementation example of the present invention 1 Figure 6 is a plan view with printed coating be. In the figure, lVi based, 2 and 6Vi coupling circuits. 3 and 7 DC flock parts, 4 Microchimp Contenza, 5 ribbon, 8 coating. 9 and 1 OiJ distribution coupling type directional coupler back-, /
, 21 and 2 and C line, 91 and 101Vi connection line -J0 Figure 1 Figure 2 Figure 3 Figure 4 Frequency (GHz) Figure 5 ILI+ Figure 6

Claims (1)

【特許請求の範囲】[Claims] 誘電体基板上に所定の線路を形成し、該線路に直流電圧
が印加する結合線路を有するＭ　工ＬＤ回路において、
前記結合線路の直流フロック部分のみを誘電体でコーテ
ィングすることを稲欲とする■工Ｃ回路。In an LD circuit having a coupled line in which a predetermined line is formed on a dielectric substrate and a DC voltage is applied to the line,
A C circuit whose purpose is to coat only the DC flock portion of the coupled line with a dielectric material.
JP14428682A 1982-08-19 1982-08-19 Mic circuit Pending JPS5933902A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14428682A JPS5933902A (en) 1982-08-19 1982-08-19 Mic circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14428682A JPS5933902A (en) 1982-08-19 1982-08-19 Mic circuit

Publications (1)

Publication Number Publication Date
JPS5933902A true JPS5933902A (en) 1984-02-24

Family

ID=15358535

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14428682A Pending JPS5933902A (en) 1982-08-19 1982-08-19 Mic circuit

Country Status (1)

Country Link
JP (1) JPS5933902A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000024079A1 (en) * 1998-10-16 2000-04-27 Paratek Microwave, Inc. Voltage tunable varactors and tunable devices including such varactors

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5540521B1 (en) * 1971-07-21 1980-10-18

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5540521B1 (en) * 1971-07-21 1980-10-18

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000024079A1 (en) * 1998-10-16 2000-04-27 Paratek Microwave, Inc. Voltage tunable varactors and tunable devices including such varactors

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