JPS5932058B2 - Manufacturing method for resin-sealed electronic components - Google Patents

Manufacturing method for resin-sealed electronic components

Info

Publication number
JPS5932058B2
JPS5932058B2 JP7089079A JP7089079A JPS5932058B2 JP S5932058 B2 JPS5932058 B2 JP S5932058B2 JP 7089079 A JP7089079 A JP 7089079A JP 7089079 A JP7089079 A JP 7089079A JP S5932058 B2 JPS5932058 B2 JP S5932058B2
Authority
JP
Japan
Prior art keywords
resin
roll
lead wire
sealed
sealed electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP7089079A
Other languages
Japanese (ja)
Other versions
JPS55162236A (en
Inventor
豊 森田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7089079A priority Critical patent/JPS5932058B2/en
Publication of JPS55162236A publication Critical patent/JPS55162236A/en
Publication of JPS5932058B2 publication Critical patent/JPS5932058B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 この発明は、トランスファ法によつて樹脂封止する際に
発生するパリを除去する樹脂封止型電子部品の製造方法
に関するものであろ。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a resin-sealed electronic component, which removes pars generated during resin-sealing using a transfer method.

第1図は通常の樹脂封止型半導体装置を示す斜視図で、
複数本のリード線1群の1つに半導体素子2をろう付け
などで取り付けるとともに、この素子上の電極と他のリ
ード線1とを金属細線3により接続させた土で樹脂4で
封止して製造される。
FIG. 1 is a perspective view showing a typical resin-sealed semiconductor device.
A semiconductor element 2 is attached to one of a group of multiple lead wires 1 by brazing or the like, and the electrodes on this element and other lead wires 1 are sealed with a resin 4 with soil connected by a thin metal wire 3. Manufactured by

このような樹脂封止型半導体装置の樹脂封止方法として
は、E−バック、キャスティング、ボツテイング、トラ
ンスファ法等の樹脂封止方法があろ。このうち、トラン
スファ樹脂封止方法は量産性、作業性および使用材料の
低コスト性の面から半導体装置の樹脂封止方法として一
般的に多用されている。以下、トランスファ樹脂封止方
法による従来の半導体装置の製造方法を第2図乃至第6
図によつて説明する。
As a resin sealing method for such a resin-sealed semiconductor device, there are resin sealing methods such as E-back, casting, botting, and transfer methods. Among these, the transfer resin encapsulation method is commonly used as a resin encapsulation method for semiconductor devices due to its mass productivity, workability, and low cost of materials used. The conventional method for manufacturing semiconductor devices using the transfer resin encapsulation method will be described below with reference to FIGS. 2 to 6.
This will be explained using figures.

第2図はトランスファ樹脂封止を示す概略断面図、第3
図は第2図の要部側面図、第4図はトランスファ樹脂封
止後の半導体装置を示す平面図、第5図および第6図は
金型の隙間から滲み出た樹脂(以下バリという)の従来
の除去方法を示す概略斜視図である。
Figure 2 is a schematic cross-sectional view showing transfer resin sealing;
The figure is a side view of the main part of Figure 2, Figure 4 is a plan view showing the semiconductor device after being sealed with transfer resin, and Figures 5 and 6 are resin seeping out from the gap in the mold (hereinafter referred to as burr). FIG. 2 is a schematic perspective view showing a conventional method for removing .

樹脂封止は第2図に示すようにトランスファ金型(以下
金型という)の上型6、下型Tで形成される空間部5内
に半導体素子2、金属細線4およびリード線1の先端部
を含む部分8が位置するようにしてリード線1を金型6
、7で挾持し、空間部5に樹脂9を注入することにより
行われる。
As shown in FIG. 2, the resin sealing is performed by placing the semiconductor element 2, the thin metal wire 4, and the tips of the lead wires 1 in a space 5 formed by an upper mold 6 and a lower mold T of a transfer mold (hereinafter referred to as the mold). The lead wire 1 is inserted into the mold 6 so that the part 8 including the part is located.
, 7 and injecting resin 9 into the space 5.

このように、トランスファ樹月旨判止の方法で問題とな
るの&ζ第3図に示すようにリード線1とこれを挾持す
る金型6、Tの間に隙間10が生じ、空間部5に注入さ
れた樹脂9がこれらの隙間10から滲み出て、第4図に
示すようにバリ11となることである。このバリ11は
半導体装置の使用に際してこれをソケットに挿入すると
き、バリ11でリード線1とソケットとに接触不良が生
じ、半導体装置として品質低下をきたすため、従来はこ
のバリ11を、例えば第5図に示すようにくるみ粒やガ
ラスビーズ13等を用いてノズル12よりショットブラ
ストして除去したりあるいは第6図に示すようにカッタ
ー14により切削して除去していた。しかしながら、シ
ヨツトプラストによるバリ11の除去方法は、くるみ粒
やガラスビーズ13の寿命が短く、かつ多量に用いるた
めの材料コストの増大および吹き付ける際に発生する粉
塵の飛散によろ作業環境の悪化、さらに粉塵処理の装置
等を必要とし、このために要する労力および設備コスト
は多大であつた。
As shown in FIG. 3, a gap 10 is created between the lead wire 1 and the mold 6 and T that hold it, which causes a problem in the method of determining the transfer date. The injected resin 9 oozes out from these gaps 10 and forms burrs 11 as shown in FIG. This burr 11 causes poor contact between the lead wire 1 and the socket when the semiconductor device is inserted into a socket when the semiconductor device is used, resulting in deterioration of the quality of the semiconductor device. As shown in FIG. 5, the particles are removed by shot blasting from a nozzle 12 using walnut grains or glass beads 13, or by cutting with a cutter 14 as shown in FIG. However, the method of removing burrs 11 using shotplast has a short lifespan of the walnut grains and glass beads 13, increases the cost of materials because they are used in large quantities, and worsens the working environment due to the scattering of dust generated during spraying. Processing equipment and the like are required, and the labor and equipment costs required for this are enormous.

さらにくるみ粒に含まれる油脂によりリード線1の表面
に油膜を生じ、リード線1に半田がつきにくい等の欠点
があつた。一方、カツタ一14の切削によるバリ11の
除去方法は、カツタ一14の切刃に対して切削される半
導体装置を個々にリード線1毎に高精度に位置決めする
必要があり、位置決めが悪いとリード線1にカツタ一1
4の切刃によつて傷を付け、半導体装置の品質低下をき
たしていた。また、カツタ一14の切刃は常に鋭利に保
つておく必要があるため、カツタ一14の摩粍および破
損等による設備、治工具の補修コストが増大する。さら
に、カツタ一14によるバリ除去法では、リード線1間
のバリ11は除去されるが、リード線1の周囲に付着し
ているバリ11は除去されにくい等の欠点があつた。も
ちろん、本質的にはバリ11の発生を無くすることが望
ましく、トランスフア金型の上型、下型6,7とリード
線1のはめ合い公差を零にして隙間を無くすことにより
、バI川1の発生は防止できるが、一般に生産性の面で
多数の半導体装置を一度に劃止成形するため、多数のリ
ード線1を挾持することとなり、リード線1の線径(寸
法)のばらつきに加えて、リード線1の表面に半導体素
子とのろう付け性を良くするためのメツキがなされてい
て、そのメツキ厚のばらつきもあり、しかも金型自体の
精度のばらつき等もあつて、到底商業的規模では実現し
得ないものである。
Furthermore, the oil and fat contained in the walnut grains caused an oil film to form on the surface of the lead wire 1, making it difficult for solder to adhere to the lead wire 1. On the other hand, the method for removing burrs 11 by cutting with the cutter 14 requires highly accurate positioning of the semiconductor device to be cut for each lead wire 1 with respect to the cutting edge of the cutter 14. One cutter on one lead wire
The cutting edge of No. 4 caused scratches, resulting in a deterioration in the quality of the semiconductor device. Furthermore, since the cutting edge of the cutter 14 must be kept sharp at all times, the cost of repairing equipment and jigs and tools due to wear and tear on the cutter 14 increases. Further, in the burr removal method using the cutter 14, the burr 11 between the lead wires 1 is removed, but the burr 11 attached around the lead wire 1 is difficult to remove. Of course, it is essentially desirable to eliminate the occurrence of burrs 11, and by eliminating gaps by zeroing the fitting tolerance between the upper and lower molds 6 and 7 of the transfer mold and the lead wires 1, it is possible to Although the occurrence of river 1 can be prevented, in general, from the viewpoint of productivity, a large number of semiconductor devices are molded at once, so a large number of lead wires 1 are clamped, resulting in variations in the wire diameter (dimensions) of lead wires 1. In addition, the surface of the lead wire 1 is plated to improve brazability with the semiconductor element, and there are variations in the thickness of the plating, and there are also variations in the precision of the mold itself, so it is impossible to This is something that cannot be achieved on a commercial scale.

従つて、バリ11の発生を皆無にすることは不可能であ
り、バリ取りを省略することも不可能である。この発明
は上記の点にかんがみなされたもので、バリをゴム等の
弾性体によつて直接加圧して弾性体の変形力によつてバ
リを除去する方法を提供するものである。
Therefore, it is impossible to completely eliminate the occurrence of burrs 11, and it is also impossible to omit deburring. The present invention has been made in consideration of the above points, and provides a method for directly pressing the burr with an elastic body such as rubber and removing the burr by the deformation force of the elastic body.

以下この発明について説明する。第7図はこの発明の一
実施例を示す斜視図、第8図は半導体装置のバリが上,
下ロール間に喰い込まれた状態を示す要部の拡大正面図
である。これらの図において、ロール機構1は上ロール
Al5とこの外周部にウレタンゴム等の弾性体Al6で
ゴムライニングによつて密着した上ロール17と、互に
喰い合う方向(図中矢印R)に回転し、剛性を有する下
ロールAl8とにより形成されている。さらに、前述の
ロール機構1と逆の組み合わせのロール機構は互い喰い
合う方向(図中矢印R)に回転し、剛性を有する土ロー
ルBl9と、下ロールB2Oとこの外周部にウレタンゴ
ム等の弾性体B2lによつて密着した下ロール22とに
より形成されている。そして、ロール機構1とロール機
構とは互に直列に配置され、両者ともに図示しない駆動
機構により常時R方向に回転している。いま、トランス
フア樹脂劃止完了後、バ1月1が発生している第4図の
半導体装置を図示しない送り装置によつて、ロール機構
1内の所定の位置にリード線1のバ1川1を挿入すると
(図中矢印L1方向)、半導体装置は土ロール17と下
ロールAl8との間に喰い込まれ、第8図に示すように
弾性体Al6が変形し、バl川1に弾性体Al6の変形
力Pがかかり、この変形力Pによる摩擦力によつてバリ
11がリード線1より離脱する。すなわち、リード線1
の上部半分のバリ11が取り除かれる。また、その時点
でリード線1間のバリ11も同様の変形力Pによつて取
り除かれる。次に、ロール機構に送られると(図中矢印
L2方方)、上述と同様にリード線1の下半分のバリ1
1が取り除かれてリード線1のバリ11が完全に除去で
きる。すなわち、バリ11は回転するロールに密着され
た弾性体Al6、弾性体B2lの変形力Pによる摩擦力
によつてこすり取ることができる。なお、上記実施例で
は、2組のロール機構によつて説明したが、リード線の
大きさ、樹脂のパリの発生具合、樹脂の種類等によつて
は2組以上のロール機構にしてもよい。
This invention will be explained below. FIG. 7 is a perspective view showing an embodiment of the present invention, and FIG. 8 shows a semiconductor device with burrs on top.
It is an enlarged front view of the main part showing the state where it is bitten between the lower rolls. In these figures, the roll mechanism 1 rotates in a mutually biting direction (arrow R in the figures) with an upper roll Al5 and an upper roll 17 whose outer periphery is in close contact with a rubber lining made of an elastic material Al6 such as urethane rubber. and a rigid lower roll Al8. Furthermore, the roll mechanism in the opposite combination to the roll mechanism 1 described above rotates in the mutually interdigitating direction (arrow R in the figure), and includes a rigid earth roll Bl9, a lower roll B2O, and an elastic material such as urethane rubber on the outer periphery thereof. The lower roll 22 is in close contact with the body B2l. The roll mechanism 1 and the roll mechanism are arranged in series with each other, and both are constantly rotated in the R direction by a drive mechanism (not shown). Now, after the transfer resin has been bonded, the semiconductor device shown in FIG. 1 (in the direction of arrow L1 in the figure), the semiconductor device is bitten between the soil roll 17 and the lower roll Al8, and the elastic body Al6 deforms as shown in FIG. A deforming force P of the body Al6 is applied, and the burr 11 separates from the lead wire 1 due to the frictional force caused by this deforming force P. That is, lead wire 1
The burr 11 on the upper half of is removed. Further, at that point, the burrs 11 between the lead wires 1 are also removed by the same deforming force P. Next, when it is sent to the roll mechanism (in the direction of arrow L2 in the figure), the burr 1 on the lower half of the lead wire 1 is
1 is removed, and the burr 11 on the lead wire 1 can be completely removed. That is, the burr 11 can be scraped off by the frictional force caused by the deformation force P of the elastic bodies Al6 and B2l that are in close contact with the rotating roll. In the above embodiment, two sets of roll mechanisms were used, but two or more sets of roll mechanisms may be used depending on the size of the lead wire, the occurrence of resin fringing, the type of resin, etc. .

さらに、必ずしもロール機構を必要とはせず、弾性体と
剛性ある平面部で、互に上,下機構間にバリの発生した
リード線を挿入して1〜数回圧縮しても同様の効果が得
られる。また、第9図に示すように、リード線1が1本
の半導体装置の場合は、1組のロール機構1間で回転す
るので、1組のロール機構でも良い。また、樹脂の種類
によつてはあらかじめ、バリ11にクラツクを生じさせ
た後にこの発明の方法を使用すればさらに効果は大とな
る。以上詳細に説明したようにこの発明は、従来のよう
なシヨツトブラスト材料を必要とせず、従つて粉塵の飛
散、粉塵処理装置は皆無になり、従来のカツタ一による
場合のような治工具の破損も皆無となり、治工具の寿命
は大幅に伸びる。
Furthermore, the roll mechanism is not necessarily required, and the same effect can be obtained by inserting a lead wire with burrs between the upper and lower mechanisms using an elastic body and a rigid flat part and compressing it once or several times. is obtained. Further, as shown in FIG. 9, in the case of a semiconductor device having one lead wire 1, since the lead wire 1 rotates between one set of roll mechanisms 1, one set of roll mechanisms may be used. Further, depending on the type of resin, the effect may be even greater if the method of the present invention is used after cracking the burr 11 in advance. As explained in detail above, this invention does not require shot blasting materials as in the past, and therefore there is no need for dust scattering or dust treatment equipment, and there is no need for jigs and tools as in the case of a conventional cutter. There will be no breakage, and the life of the jigs and tools will be greatly extended.

さらに、この発明によるバリ取り作業は連続作業となり
、バリ取りのための位置決めも容易となる。さらにこの
発明の方法によれば、シヨツトブラストによつて生じる
リード線表面、樹脂表面を傷つけることもなく、前述し
たような油脂によつてリード線に半田がつきにくい等の
欠点も全くなく、歩留りの向上が期待できる。
Furthermore, the deburring work according to the present invention is a continuous work, and positioning for deburring becomes easy. Furthermore, according to the method of the present invention, there is no damage to the lead wire surface or resin surface caused by shot blasting, and there is no drawback such as difficulty in adhering solder to the lead wire due to the oils and fats mentioned above. An improvement in yield can be expected.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は通常の樹月四止型半導体装置を示す斜視図、第
2図はトランスフア樹脂劃止を示す概略断面図、第3図
は第2図の要部断面図、第4図はトランスフア樹脂制止
後の半導体装置を示す平面図、第5図および第6図はそ
れぞれ従来のバリ取り方法を示す概略斜視図、第7図は
この発明の一実施例を示す斜視図、第8図は半導体装置
のバリが上,下ロール間に喰い込まれた状態を示す要部
の拡大正面図、第9図はリード線が1本の半導体装置を
示す斜視図である。 図中、1はリード線、4は樹脂、11はバリ、15は上
ロールA,l6は弾性体A、17は上ロール、18は下
ロールA、19は土ロールB、20は下ロールBl2l
は弾性体Bl22は下ロールである。
Fig. 1 is a perspective view showing a normal four-stop type semiconductor device, Fig. 2 is a schematic sectional view showing a transfer resin seal, Fig. 3 is a sectional view of the main part of Fig. 2, and Fig. 4 is a schematic sectional view showing a transfer resin seal. 5 and 6 are respectively schematic perspective views showing a conventional deburring method, FIG. 7 is a perspective view showing an embodiment of the present invention, and FIG. The figure is an enlarged front view of the main part showing a state in which burrs of the semiconductor device are bitten between the upper and lower rolls, and FIG. 9 is a perspective view showing the semiconductor device with one lead wire. In the figure, 1 is a lead wire, 4 is a resin, 11 is a burr, 15 is an upper roll A, 16 is an elastic body A, 17 is an upper roll, 18 is a lower roll A, 19 is a soil roll B, 20 is a lower roll Bl2l
The elastic body Bl22 is the lower roll.

Claims (1)

【特許請求の範囲】 1 素子本体と、この素子本体に電気的に接続された外
部リード線の接続部を樹脂封止してなる樹脂封止型電子
部品において、前記樹脂封止部より延出する前記外部リ
ード線に滲み出た樹脂膜を弾性体によつて加圧し、この
弾性体の変形力によつて前記滲み出た樹脂膜を除去する
ことを特徴とする樹脂封止型電子部品の製造方法。 2 樹脂膜の押圧は、ロール表面に密着された弾性体を
備えた上ロールと、この上ロールと喰い合う方向に回転
する剛性のある下ロールとの間によつて与えることを特
徴とする特許請求の範囲第1項記載の樹脂封止型電子部
器の製造方法。
[Scope of Claims] 1. A resin-sealed electronic component in which an element body and a connection portion of an external lead wire electrically connected to the element body are sealed with a resin, in which the element body extends from the resin-sealed portion. The resin-sealed electronic component is characterized in that the resin film oozing out onto the external lead wire is pressurized by an elastic body, and the oozing resin film is removed by the deformation force of the elastic body. Production method. 2. A patent characterized in that the pressure on the resin film is applied between an upper roll equipped with an elastic body that is in close contact with the roll surface and a rigid lower roll that rotates in a direction that engages the upper roll. A method for manufacturing a resin-sealed electronic component according to claim 1.
JP7089079A 1979-06-04 1979-06-04 Manufacturing method for resin-sealed electronic components Expired JPS5932058B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7089079A JPS5932058B2 (en) 1979-06-04 1979-06-04 Manufacturing method for resin-sealed electronic components

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7089079A JPS5932058B2 (en) 1979-06-04 1979-06-04 Manufacturing method for resin-sealed electronic components

Publications (2)

Publication Number Publication Date
JPS55162236A JPS55162236A (en) 1980-12-17
JPS5932058B2 true JPS5932058B2 (en) 1984-08-06

Family

ID=13444567

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7089079A Expired JPS5932058B2 (en) 1979-06-04 1979-06-04 Manufacturing method for resin-sealed electronic components

Country Status (1)

Country Link
JP (1) JPS5932058B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60213004A (en) * 1984-04-09 1985-10-25 日立エーアイシー株式会社 Apparatus for producing electronic part
JPS60218802A (en) * 1984-04-13 1985-11-01 日立エーアイシー株式会社 Apparatus for producing electronic part

Also Published As

Publication number Publication date
JPS55162236A (en) 1980-12-17

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