JPS5931308B2 - Inverter device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an inverter device that converts direct current power to alternating current power, and particularly relates to an inverter device used in a power supply system in which a large number of inverter devices are operated in parallel.

In a power supply system that operates inverters in parallel, it is necessary not only to match the voltage applied to a common load with a set value, but also to have each inverter share the load current equally to suppress cross current between each inverter.

For this purpose, it is necessary to perform parallel operation so that the output voltage values and phases of all inverters match. An inverter device used in such a power supply system has the configuration shown in FIG. The inverter 101 converts the power obtained from the DC power supply in the power converter 1 into AC power of a desired frequency, and supplies the power to the load 6 via the waveform improvement filter 2 and the switch 3.

4 is a load voltage detector, and 5 is a load current detector.

Inverter 102 operated in parallel is also similar to inverter 101. The power converter 1 adds the output frequency fl of the oscillator 12 and the output frequency f2 of the frequency control circuit 13 in an adder 15, controls the phase according to the output voltage in the delay circuit 16, and distributes the signals in the divider IT. , is controlled by a signal amplified by a gate amplifier 18. Control to match the output voltage value and phase of the inverters is performed as follows according to the output signal of the differential voltage detection circuit 11 that detects the output voltage difference between the inverters. As shown in FIG. 2, if the output voltages of the power converters 1 of the inverter devices 101 and 102 are VIOI and V102, the differential voltage detection circuit 11 determines the differential voltage ΔV1 for the inverter device 101 and the differential voltage ΔV2 for the inverter device 102.
Detect.

The voltage control circuit 14 separates the Δ1U component from ΔV1 using the component in phase with VIOI, and controls the delay circuit 16 according to ΔVlU and the output signal of the load voltage detector 4.
The output voltage of 101 is controlled so that Δ1 becomes O. In addition, the frequency control circuit 13 separates the Δ1f component from ΔV1 using a signal with a phase difference of 900 degrees from VlOl, and separates the Δ1f component from ΔV1.
The output frequency of 101 is controlled so that Δ1f becomes O by controlling the frequency F2 according to lf.

Similarly to the 101 side, the output voltage and phase of the 102 side are controlled by the differential voltage Δ2.

However, since there is a difference in the voltage drop of the AC filter for improving the waveform of the inverter 101 during load operation and the inverter 102 during no-load operation in the inverter where such control is performed (here, before parallel connection is applied), , inverter 10
There is a difference in the output voltages of No. 1 and No. 102, and when they are connected in parallel, a cross current flows due to the voltage difference, which makes it difficult to connect in parallel and has the disadvantage of having an adverse effect on healthy machines. An object of the present invention is to provide a power supply device that has the function of making parallel connection possible by zeroing out the output voltage difference of the inverter device before parallel connection regardless of the load state.

The main point of the present invention is that when a large number of inverter devices are operated in parallel, all inverters detect the output current of one inverter before parallel connection, and when the output voltage and phase match, parallel connection can be performed. It is something.

An embodiment of the inverter device according to the present invention is shown in FIG.

The diagram shows a new current detector 21, 2V1 switch 2 in Figure 1.
2, 22', detection resistors 23, 23' and differential voltage detection circuit 1
A detection signal of the current detector 21 was provided at 1.1V. Inverter devices 101 and 102 will be explained.

The differential voltage detection circuits 11 and 1V change the detected amounts of voltage and current based on signals from the load voltage detectors 4 and current deviation detectors 5 and 5'. frequency control circuit 13,
Reference numeral 13' indicates a frequency that changes depending on the amount detected by the differential voltage detectors 11 and 11'. The force l calculation circuits 15 and 15' add the reference signal f1 applied from the oscillators 12 and 1Z and the signal F2 from the frequency control circuits 13 and 13, and apply the result to the delay circuit 16. The delay circuits 16 and 16' are connected to the voltage control circuits 14 and 16'.
Depending on the signal controlled by 14', adder circuits 15, 15'
Advance the phase of a reference signal with a frequency 12 times the inverter frequency formed from the (f1 + F2) signal applied from
The reference signals δ and δ1 whose phases are shifted by equal amounts in two directions of delay are formed. The distributors 17, 17' are ring counters and are circuits for forming gate signals of the inverters. Hereinafter, the operation of each part will be explained in detail using an embodiment according to FIGS. 4 and 5.

Inverter devices 101 and 102 are started, and then inverter 101 is operated under load. In this state, the inverter 101 is in load operation, and the inverter 102 is in no-load operation. At this time, since the AC filter 2 shown in FIG. 4 has regulation, the value of the capacitor voltage Vc differs between the inverters 101 and 102. If parallel input is performed in this state, a difference will occur in the output voltage and phase, so a cross current will flow between the inverters, and of course parallel input will cause a difference between the inverters 101 and 101.
Parallel operation of 102 and 102 becomes difficult. For this purpose, it is necessary to keep the capacitor voltage Vc point constant as shown in FIG. FIG. 6 is a time chart when the inverters are operated in parallel. In FIG. 1, TO indicates the time of parallel injection, and the shaded area indicates the matching area of the output voltage phases. As shown in FIG. 6, when the inverter 101 is in load operation,
2 is in no-load operation, the switch 22 of the inverter 101
is turned on, and switch 22' is turned off. In this state, the inverters 101 and 102 detect the current detector 21, and the differential voltage detection circuits 11 and 1V apply the same current detection amount to the differential voltage detection circuit 11 of FIG. 7. Differential voltage detection circuit 11
has the function of detecting current as well as current deviation as well as differential voltage, and uses a control signal to control the frequency control circuit 13,
13' controls the phase, and voltage control circuits 14 and 14' control the output voltage. From Figures 4 and 5, the inverter 10
In order to equalize the capacitor voltages at point c of AC filters 1 and 102, control that follows the load is also required. Since the capacitor current 1c has a phase leading by 90 degrees with respect to the capacitor voltage Vc, and the reactor current has a lagging phase,
The vector diagram shown in FIG. 5 is obtained. If the inverter 102 maintains the same output value as the AC filter even during no-load operation,
Parallel input is possible in any case. This is true even if the load changes. When the current detector 21 detects the same amount of inverters 101 and 102, for example, when the value of the capacitor voltage c increases, the reactor current 11 is further delayed, and the capacitor current 1c is further advanced in phase. Furthermore, when the capacitor voltage c becomes smaller, the phase of the reactor current 1L advances, and the phase of the capacitor current 1c lags slightly. In this way, inverters 101 and 102 can equalize the values of the capacitor voltages at the Vc point, so
Parallel connection can be performed when the output voltage and phase are optimally matched, regardless of the load of the inverter device that performs parallel connection. Therefore, parallel input can be performed without causing any disturbance to the inverter. Here, the inverter 101
Although the parallel operation of 102 and 102 has been described above, it is particularly effective when a large number of inverter devices are operated in parallel.

[Brief explanation of drawings]

1 is a block diagram of the conventional inverter device, FIG. 2 is a vector diagram for explaining the operation of FIG. 1, FIG. 3 is a block diagram of the inverter device of the present invention, and FIG. 4 is the AC filter of FIG. 3. Circuit, Figure 5 is a vector diagram for explaining the present invention, Figure 6 is a vector diagram for explaining the present invention.
The figure is a time chart when parallel operation of the inverters is started, and FIG. 7 is an explanatory diagram of the differential voltage detector. 1... Power exchange section, 2... AC filter, 3... Switch, 4... Load voltage detector, 5... Load current detector, 6...
Load, 11... Voltage detection circuit, 12...
・Oscillator, 13... Frequency control circuit, 14...
...Voltage control circuit, 15... Addition circuit, 1
6...Delay circuit, 17...Distributor, 1
8... Gate amplifier, 21... Current detector, 22... Switch, 23... Detection resistor, 101... Inverter device , 102...
...Inverter device.

Claims (1)

[Claims] 1. A deviation detector for detecting internal voltage deviation between inverters operated in parallel or between an inverter and another power source, and output voltage and frequency are adjusted according to a detection signal of the deviation detector. In an inverter device equipped with a voltage control circuit and a frequency control circuit to be controlled, the inverter device before parallel connection detects the output current of the inverter device during load operation,
An inverter device characterized by controlling output voltage and phase according to load conditions. 2 The inverter device described in claim 1 is equipped with a current detector, and all inverters operated in parallel are 1
An inverter device that controls the output voltage and phase with one current detector and equalizes the impedance of all inverters before connecting them in parallel. 3. Separating the detected value of the output current described in claim 1 into a frequency component and a voltage component using a differential voltage detection circuit, controlling the phase using a frequency control circuit, and controlling the output voltage using a voltage control circuit. An inverter device featuring: