JPS5930470A - Soldering method of wiring substrate - Google Patents
Soldering method of wiring substrateInfo
- Publication number
- JPS5930470A JPS5930470A JP13972082A JP13972082A JPS5930470A JP S5930470 A JPS5930470 A JP S5930470A JP 13972082 A JP13972082 A JP 13972082A JP 13972082 A JP13972082 A JP 13972082A JP S5930470 A JPS5930470 A JP S5930470A
- Authority
- JP
- Japan
- Prior art keywords
- furnace
- wiring board
- solder
- soldering
- inert gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/005—Soldering by means of radiant energy
- B23K1/0053—Soldering by means of radiant energy soldering by means of I.R.
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、ハンダの溶融温度よりも低い耐熱温度の構成
部材を有する配線基板に半導体素子をハンダ接合し得る
ように改良したハンダ付方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved soldering method for soldering a semiconductor element to a wiring board having components having a heat-resistant temperature lower than the melting temperature of solder.
配線基板に半導体素子を直接的にハンダm融接合する代
表的な方法に特許第519Q1313号による微小素子
接続方法がある。これtよ、半導体素子のパターン面に
配置された端子部にあがかしめ接合用のハンダを付着さ
せておき、接合すべき相手部拐である配線基板の接合端
子にフラックスを塗布した後、前記半導体素子の端子と
配線基板の端子とを位置合わせして対向させ、接続部の
ハンダを加熱溶融させてハンダ接合する方法である。A typical method of directly soldering a semiconductor element to a wiring board is a microelement connecting method disclosed in Japanese Patent No. 519Q1313. At this point, solder for caulking is applied to the terminals placed on the pattern surface of the semiconductor element, and after applying flux to the bonding terminals of the wiring board, which are the mating parts to be bonded, In this method, the terminals of the semiconductor element and the terminals of the wiring board are aligned and faced, and the solder at the connection part is heated and melted to perform solder bonding.
従来、この方法でハンダ接合する場合、一般に半導体を
仮固定した配線基板をベルト搬送式の加熱炉内に送入し
ているが、このようにしてハンダ接合をすると配線基板
全部がハンダ溶融温度以上に加熱されるので、該配線基
板の構成部材の中にハンダ溶融温度よりも耐熱温度の低
いものが含まれていると熱損傷を受けるという不具合が
ある。Conventionally, when soldering using this method, the wiring board on which the semiconductor has been temporarily fixed is generally sent into a belt-conveyed heating furnace. Therefore, if the wiring board includes components that have a heat resistance lower than the solder melting temperature, they will suffer thermal damage.
本発明は上記の事情に鑑みて為され、配線基板に搭載さ
れた耐熱性の低い構成部材に熱損傷を与える虞れ無く高
能率で半導体素子金・・ンダ溶融接合し7得るハンダ付
方法を提供することを目的とする。The present invention has been made in view of the above-mentioned circumstances, and provides a soldering method for highly efficiently melting and bonding semiconductor elements with gold and solder without causing thermal damage to components with low heat resistance mounted on wiring boards. The purpose is to provide.
上記の目的を達成するため、本発明の配線基板のハンダ
付方法は、半導体素子を仮接合した配線基板を不活性ガ
ス雰囲気炉内に入れ、ハンダ接合部を局部的に加熱する
ことを特徴とする。In order to achieve the above object, the wiring board soldering method of the present invention is characterized by placing the wiring board on which the semiconductor elements have been temporarily bonded into an inert gas atmosphere furnace, and locally heating the solder joints. do.
本発明の基本的原理は次の如くである。不活性ガス雰囲
気中でハンダの溶融を行なうとフラックスが酸化する虞
れがなく、またハンダ溶融接合部分を局部的に加熱する
と、この接合部から離間した部側はハンダ溶融温度まで
昇温しないので熱損傷を受ける虞れが無く、その上、局
部的加熱全行なうと少ない熱エネルギー消費で迅速にハ
ンダを溶融することができ゛C作業能率が向上する。The basic principle of the invention is as follows. Melting the solder in an inert gas atmosphere eliminates the risk of oxidation of the flux, and if the solder melting joint is locally heated, the temperature of the part away from the joint will not rise to the solder melting temperature. There is no risk of thermal damage, and furthermore, by performing local heating, the solder can be quickly melted with less thermal energy consumption, thus improving work efficiency.
次に本発明の一実施例について、第1図乃至第4図を参
照しつつ説明する。第1図は本発明方法を適用してハン
ダ溶融接合する配線基板としての液晶モジュールの一例
の完成品を示し、下部ガラス基板2と上部ガラス基板4
との間に液晶6が封入され、下部ガラス基板2の上に液
晶を駆動′するための半導体素子10が複数個接続され
ている。第2図は上記の液晶モジュールの側面図であシ
、下部基板2と半導体素子】0とはハンタ12によって
接合しである。Next, one embodiment of the present invention will be described with reference to FIGS. 1 to 4. FIG. 1 shows a finished product of an example of a liquid crystal module as a wiring board to which the method of the present invention is applied and solder melted and bonded, showing a lower glass substrate 2 and an upper glass substrate 4.
A liquid crystal 6 is sealed between the lower glass substrate 2 and a plurality of semiconductor elements 10 for driving the liquid crystal are connected to the lower glass substrate 2. FIG. 2 is a side view of the above liquid crystal module, in which the lower substrate 2 and the semiconductor element 0 are bonded by a hunter 12. As shown in FIG.
第3図は本発明方法を用いてハンダ溶融温度を行なうよ
うに構成し、たハンダ付装置の一例の断面正面図、第4
図は同側面断面図であるう予熱盤14の上に炉16を設
け、炉16の上方に赤外線加熱ランプ18を設けである
。炉16の上方開口部をカバー22で覆い、このカバー
22が炉の天上壁を構成している。本実施例においては
上記のカバー22ヲ赤外線透過ガラスで構成するととも
にその下面に仕切板23fニ一体的に固着して、炉内壁
間をA。FIG. 3 is a cross-sectional front view of an example of a soldering device configured to perform solder melting temperature using the method of the present invention;
The figure is a sectional side view of the same. A furnace 16 is provided on the preheating plate 14, and an infrared heating lamp 18 is provided above the furnace 16. The upper opening of the furnace 16 is covered with a cover 22, and this cover 22 constitutes the ceiling wall of the furnace. In this embodiment, the cover 22 is made of infrared transmitting glass, and a partition plate 23f is integrally fixed to the lower surface of the cover 22, so that the distance between the inner walls of the furnace is A.
8.2室に区画しである。8. It is divided into two rooms.
炉16の一端にはA室に連通ずる不活性ガス送入口24
Aと、B室に連通ずる不活性ガス送入口24Bとを設け
てあり、同炉16の他端には不活性ガス排出口2Gを設
けである。At one end of the furnace 16 is an inert gas inlet 24 communicating with the A chamber.
An inert gas inlet 24B communicating with chambers A and B is provided, and an inert gas outlet 2G is provided at the other end of the furnace 16.
上記の不活性ガス送入口24A 、 248 K[それ
ぞしN2ガスを送入し得るようになっており、かつ、上
記の送入ガスの加熱手段及び流fIk調節手段(共に図
示せず)を設けである。The above-mentioned inert gas inlet ports 24A and 248K are capable of feeding N2 gas, and are equipped with the above-mentioned feeding gas heating means and flow fIk adjusting means (both not shown). It is a provision.
前記の仕切板23は、炉16内に液晶モジュール8を装
入したとき半導体素子10がA家門に位置l〜、上部ガ
ラス基板4に覆われた液晶がB室内に位置するようにカ
バー22に対する固着位ii1.を設定しである。前記
の赤外線ランプ18は任意の1個の半導体素子10に赤
外線を照射し倚るように往復矢印X−X方向および同Y
−Y方向に移動せしめうる構造である。The partition plate 23 is arranged with respect to the cover 22 so that when the liquid crystal module 8 is inserted into the furnace 16, the semiconductor element 10 is located in the A room, and the liquid crystal covered with the upper glass substrate 4 is located in the B room. Fixed position ii1. is set. The infrared lamp 18 irradiates an arbitrary semiconductor element 10 with infrared rays in the direction of the reciprocating arrow XX and the direction of the arrow Y.
- It has a structure that can be moved in the Y direction.
本発明の方法によって下部ガラス基板2に半導体素子1
0をハンダ付するには、図示のごとく炉16の中に液晶
モジュール(未接合品)8を装入する。A semiconductor device 1 is attached to a lower glass substrate 2 by the method of the present invention.
To solder 0, a liquid crystal module (unbonded product) 8 is placed in a furnace 16 as shown in the figure.
このとき、あらかじめ半導体素子10の端子に接合用の
ハンダを付着させ、下部ガラス基板2の端子にハンダ性
用フラックスを塗布し、両端子が対向するように半導体
素子10を位置ぎめする。本実施例においては粘度の大
きいフラックスを用い、このフラックスが半導体素子1
0を下部ガラス基板lOに仮接合するための接着剤の役
目を■1ねる。At this time, solder for bonding is applied in advance to the terminals of the semiconductor element 10, soldering flux is applied to the terminals of the lower glass substrate 2, and the semiconductor element 10 is positioned so that both terminals face each other. In this example, a flux with a high viscosity is used, and this flux is applied to the semiconductor element 1.
■1 plays the role of an adhesive for temporarily bonding 0 to the lower glass substrate 1O.
以上のように準備して、予熱fJ 14 ′!i−昇温
させて液晶モジュール8の全体を予熱する。Prepare as above and preheat fJ 14'! i- Preheat the entire liquid crystal module 8 by raising the temperature.
不実施例の液晶モジュール8の液晶の耐熱温度は、JO
分開規格で120℃である。従って、・上記の予熱は耐
熱規格温[12o℃よりも低く設定するものとし、本実
施例においては100℃に予熱する。The heat resistant temperature of the liquid crystal of the non-example liquid crystal module 8 is JO
The separation standard is 120°C. Therefore, the above preheating is set lower than the heat-resistant standard temperature [12oC, and in this example, it is preheated to 100C.
上記の予熱と併行して、不活性ガス送入口24BからB
室内へ約100℃に加熱したN2ガスを送入すると共に
、不活性ガス送入口24Aから入室内へ約200℃に加
熱したN2ガスを送入する。送入されたN2ガスはそれ
ぞれA室又はB室内を流通して不活性ガス排出口26か
ら大気中に放散する。In parallel with the above preheating, from the inert gas inlet 24B to B
N2 gas heated to about 100° C. is fed into the room, and N2 gas heated to about 200° C. is fed into the entrance chamber from the inert gas inlet 24A. The introduced N2 gas flows through chamber A or chamber B, respectively, and is dissipated into the atmosphere from the inert gas outlet 26.
本実施例の場合、上記のように操作してその状態を30
秒間保持すると、炉16同が不活性雰囲気となり、液晶
モジュール8の内でB室内にある部分は約100℃とな
り、入室内にある部分は200℃に近い温度まで昇温す
る。この状態で赤外線ランプ18をいずれ力)−個の半
導体素子10に対向させ、赤外線ランプ18に通電して
半導体素子lOが所定温度になるまで赤外線照射によシ
加熱した後、電流を断つ。In the case of this example, the above operation is performed to change the state to 30
When the temperature is maintained for seconds, the furnace 16 becomes an inert atmosphere, and the temperature of the portion of the liquid crystal module 8 in the B chamber increases to approximately 100° C., while the temperature of the portion located in the entrance chamber rises to a temperature close to 200° C. In this state, the infrared lamp 18 is placed opposite the - semiconductor elements 10, and the infrared lamp 18 is energized to heat the semiconductor element 10 by infrared radiation until it reaches a predetermined temperature, and then the current is cut off.
本実施例においては溶融温度310〜315℃のハンダ
を用いているので、上記の所定の温度は315℃よりも
若干高く設定する。これによりハンダが溶融して接合が
行なわれる。そして、炉内が不活性ガスであるN2によ
って満たされているのでハンダ利用のフラックスやハン
ダが酸化せず、従って信頼性の高いハンダ付が行なわれ
る。In this embodiment, since solder having a melting temperature of 310 to 315°C is used, the above predetermined temperature is set slightly higher than 315°C. This melts the solder and performs the bonding. Since the inside of the furnace is filled with N2, which is an inert gas, the flux and solder used for soldering do not oxidize, and therefore highly reliable soldering can be performed.
上述のようにして半導体素子10に対して赤外線照射に
よる局部的加熱を行なうので、半導体素子10から離間
している液晶は約1001:に保たれ、熱損傷を受ける
虞れが無い。また、入室内に約200℃のN2ガスを流
通させてハンダ溶融接合部を予熱し、その上、局部を局
部的に加熱するのでハンダ溶融を迅速に行なうことがで
き、作業能率が高い。Since the semiconductor element 10 is locally heated by infrared irradiation as described above, the liquid crystal spaced apart from the semiconductor element 10 is maintained at about 1001:1, and there is no risk of thermal damage. Furthermore, since the solder melting joint is preheated by flowing N2 gas at about 200° C. into the entrance chamber and the solder melting joint is locally heated, solder melting can be carried out quickly and work efficiency is high.
しかも、液晶モジュール8全体を約100’Cに予熱し
であるので、前記の局部的加熱によって過大な温度勾配
を生じる虞れが無く、従ってガラス基板の熱割れを生じ
る虞れが無い。Moreover, since the entire liquid crystal module 8 is preheated to about 100'C, there is no risk of an excessive temperature gradient occurring due to the above-mentioned local heating, and therefore there is no risk of thermal cracking of the glass substrate.
本実施例においては、1個の赤外線ランプ18ヲ設け、
これを順次に移動させて6個の半導体素子lOのハンダ
付を行なうが、赤外線ランプ18を2個。In this embodiment, one infrared lamp 18 is provided,
Six semiconductor devices 1O are soldered by moving these in sequence, and two infrared lamps 18 are used.
3個、若しくは6個設けて、2個、3個、若しくは6個
の半導体素子10を同時にハンダ溶融接合することもで
きる。このように、ハンダ接合部の局部的加熱手段を半
導体素子の個数に対応させて複数個用いると、作業能率
を更に高めることができる。It is also possible to provide three or six semiconductor elements 10 and simultaneously solder-melt and bond two, three, or six semiconductor elements 10. In this way, if a plurality of local heating means for the solder joint are used in correspondence with the number of semiconductor elements, the working efficiency can be further improved.
本実施例のように、ハンター溶融接合部全局部的に加熱
する手段として赤外線ランプを用いると、半導体素子に
対して非接触的に所望区域の局部加熱を行い得るので便
利である。If an infrared lamp is used as a means for locally heating the entire Hunter melted joint as in this embodiment, it is convenient because the desired area of the semiconductor element can be locally heated in a non-contact manner.
なお赤外線照射の開始及び終了は、赤外線ランプの通電
を制御して行ってもよく、又は赤外線ランプ全速続点灯
させておいて該赤外線ランプと半導体素子との間に赤外
線フィルタを挿入、抜去して行なってもよい。The infrared irradiation may be started and ended by controlling the energization of the infrared lamp, or by turning on the infrared lamp at full speed and inserting and removing an infrared filter between the infrared lamp and the semiconductor element. You may do so.
本実施例のごとく、不活性ガスとしてN2’に用いると
消耗資料としての不活性ガスの使用経費が安く、使用済
みカスを大気中に放散せしめても別設の不具合を生じな
いので好都合である。As in this example, when N2' is used as an inert gas, the cost of using the inert gas as a consumable material is low, and even if the used waste is dissipated into the atmosphere, it is convenient because it does not cause problems with separate installation. .
また、本実施例のごとく炉内に仕切壁を設けて複数個の
ガス流路を形成し、複数種類の温度の不活性ガスを炉内
に流通せしめると、被加工物である配線基板(本例にお
ける液晶モジュール8)の複数個の区域を選択的に加熱
することができ、また選択的に冷却を行うこともできる
ので作業管理が容易である。In addition, if a partition wall is provided in the furnace to form a plurality of gas flow paths as in this example, and inert gases at multiple temperatures are allowed to flow through the furnace, it is possible to Work management is easy because multiple areas of the liquid crystal module 8) in the example can be selectively heated and also selectively cooled.
また、前述の如く、局部的加熱装置として赤外線ランプ
を用いる場合、炉壁の一部に赤外線を通すガラスを用い
、このガラスを通して炉外がら赤外線照射を行なうと、
炉の気密を保持し易く、その上、赤外線ランプの操作や
保守管理が容易である。Furthermore, as mentioned above, when using an infrared lamp as a local heating device, if a part of the furnace wall is made of glass that transmits infrared rays, and infrared rays are irradiated from outside the furnace through this glass,
It is easy to keep the furnace airtight, and in addition, the operation and maintenance of the infrared lamp is easy.
本実施例において炉160八室内へ200 ℃のN2ガ
スを流通せしめることにより、一つKは前述のごとく赤
外線ランプ18による半導体素子10の加熱の予熱効果
を生じてハンダ溶融温度(310〜315℃)への到達
を速やかならしめる。また、もう一つの効果として、ハ
ンダが溶融した後に赤外線ランプ18による加熱を停止
すると半導体素子loは20o℃までN2ガス流によっ
て比較的速やかに冷却されるので、ハンダの凝固が迅速
に行なわれて作業能率を高める。その土、半導、体素子
10及びこれに近接する部側の高温保持時間が短かいの
でこれらの部材の熱による劣化を防止することができる
。In this embodiment, by flowing N2 gas at 200°C into the eight chambers of the furnace 160, one K produces the preheating effect of heating the semiconductor element 10 by the infrared lamp 18, as described above, and increases the solder melting temperature (310 to 315°C). ). Another effect is that when the heating by the infrared lamp 18 is stopped after the solder has melted, the semiconductor element lo is relatively quickly cooled down to 20°C by the N2 gas flow, so that the solder solidifies quickly. Increase work efficiency. Since the soil, semiconductor, body element 10, and parts adjacent thereto are kept at high temperatures for a short time, deterioration of these members due to heat can be prevented.
本発明の応用例として、A室にハンダ溶融温度よりも若
干γb温の不活性ガス全流通せしめ、ガスによる熱伝導
でハンダ接合部を局部的に加熱し−Cハンダ溶融接合を
行うこともできる。As an application example of the present invention, it is also possible to fully circulate an inert gas having a temperature of γb slightly higher than the solder melting temperature in the A chamber, and locally heat the solder joint by heat conduction by the gas, thereby performing -C solder melt joining. .
また、炉J6の底面側に半導体素子を局部的に加熱する
手段を設けて本発明のハンダ(1方法を行なうこともで
きる。このようK、炉の底面側からハンダ接合部の局部
加熱全行なうと、炉のカバー(前例における22)の開
閉が容易で、被加工物である配線基板を炉から出し入ノ
1する操作に便利である。It is also possible to carry out the soldering method (1 method) of the present invention by providing means for locally heating the semiconductor element on the bottom side of the furnace J6. This makes it easy to open and close the furnace cover (22 in the previous example), making it convenient to take the wiring board, which is the workpiece, into and out of the furnace.
以上説明したように、本発明は、配線基板上に半3n体
素子全ハンダ溶融接合するハンダ付方法において、半導
体素子を仮接合した配線基板を不活性ガス雰囲気の炉中
Vこ入れ、・・ンダ接自部金局部的に加熱することによ
り、配線基板に耐熱性の低い部品を搭載していてもこれ
に熱的損傷を与える虞れなく高能率で半導体素子のハン
ダ溶融接合ケ行なうことができる。As explained above, the present invention provides a soldering method for melting and bonding all semi-3n elements on a wiring board, in which the wiring board on which the semiconductor elements are temporarily bonded is placed in a furnace in an inert gas atmosphere,... By heating the solder joints locally, it is possible to perform solder melting of semiconductor elements with high efficiency without the risk of thermal damage even if components with low heat resistance are mounted on the wiring board. can.
第1図は本発明の配線基板のハンダ付方法を適用してハ
ンダ溶融接合全行なう配線基板の一例としての液晶モジ
コーールの斜視図、第2図は同側面図である。第3図は
本発明方法全実施するために構成した配線基板のハンダ
付装置の一例を示す正面図、第4図は同じく側面図であ
る。
2・・1部ガラス基板、4・・・上部ガラス基板、6・
・・液晶、8・・・液晶モジュール、10・・・半導体
素子、12・・・ハンダ、14・・・予熱盤、16・・
・炉、18・−・赤外線ランプ、22・・カバー、23
・・・仕切板、24A、24B・・・不活性ガス送入[
1,26・・・不活性ガス排出口。
代理人弁理士 秋 本 正 実
第1図
)
ノ
0
第2図
第3図
第4図FIG. 1 is a perspective view of a liquid crystal module as an example of a wiring board which is completely soldered and bonded by applying the wiring board soldering method of the present invention, and FIG. 2 is a side view of the same. FIG. 3 is a front view showing an example of a wiring board soldering apparatus configured to carry out the entire method of the present invention, and FIG. 4 is a side view of the same. 2...1 part glass substrate, 4...upper glass substrate, 6...
...Liquid crystal, 8...Liquid crystal module, 10...Semiconductor element, 12...Solder, 14...Preheating board, 16...
・Furnace, 18...Infrared lamp, 22...Cover, 23
...Partition plate, 24A, 24B...Inert gas supply [
1,26...Inert gas discharge port. Representative Patent Attorney Tadashi Akimoto Figure 1) No. 0 Figure 2 Figure 3 Figure 4
Claims (1)
るハンダ付方法において、半導体素子を仮接合した配線
基板を不活性ガス雰囲気炉内に入れ、・・ンダ接合部を
局部的に加熱することを特徴とする配線基板のノ・ンダ
付方法。 2、 前記の局部的加熱は、赤外線ランプを用いること
を特徴とする特許請求の範囲第1項に記載の配線基板の
ノ・ンタ′付方法。 3、 前記の不活性ガスはN2ガスであることを特徴と
する特it−請求の範囲第1項に記載の配線基板のハン
ダ付方法。 4、 前記の不活性ガス雰囲気炉内に仕切壁を設けて複
数個のガス流路を形成し、上記複数個のガス流路に少な
くとも2種類の温度の不活性ガスを流通せしめることを
特徴とする特許請求の範囲第1項に記載の配線基板のノ
・ンダ付方法。 5 前記の不活性ガス雰囲気炉の炉壁の少なくとも一部
に赤外線を透過するガラスを用い、このガラスを通しで
炉外から・・ンダ接合部に赤外線光を照射して該ハンダ
接合部を局部的に加熱することを特徴とする特許請求の
範囲第2項に記載の配線基板のハンダ付方法。 6、 前記のハンダ接合部に対−Jる局部的加熱は、ハ
ンタ接合すべきコ4″導体素子の個数に対応した数の局
部的加熱手段を用いて行なうことffi%徴とする特許
請求の範囲第1項に記載の配線基板のハンダ付方法。[Claims] 1. In a soldering method for melt-bonding a semiconductor element onto a wiring board, the wiring board on which the semiconductor element has been temporarily bonded is placed in an inert gas atmosphere furnace, and the soldering part is melt-bonded. 2. The wiring board according to claim 1, wherein the local heating is performed using an infrared lamp. 3. The method for soldering a wiring board according to claim 1, wherein the inert gas is N2 gas. 4. The inert gas is N2 gas. Claim 1, characterized in that a partition wall is provided in the gas atmosphere furnace to form a plurality of gas passages, and inert gases having at least two different temperatures are allowed to flow through the plurality of gas passages. The method for bonding a wiring board according to item 1. 5. Glass that transmits infrared rays is used for at least a part of the furnace wall of the inert gas atmosphere furnace, and bonding is performed from outside the furnace through this glass. 6. The method for soldering a wiring board according to claim 2, wherein the solder joint is locally heated by irradiating the solder joint with infrared light. The wiring board according to claim 1, wherein the local heating is performed using a number of local heating means corresponding to the number of 4" conductor elements to be joined by a hunter. Soldering method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13972082A JPS5930470A (en) | 1982-08-13 | 1982-08-13 | Soldering method of wiring substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13972082A JPS5930470A (en) | 1982-08-13 | 1982-08-13 | Soldering method of wiring substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5930470A true JPS5930470A (en) | 1984-02-18 |
JPS641233B2 JPS641233B2 (en) | 1989-01-10 |
Family
ID=15251828
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13972082A Granted JPS5930470A (en) | 1982-08-13 | 1982-08-13 | Soldering method of wiring substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5930470A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0691679A3 (en) * | 1994-06-07 | 1996-05-01 | Texas Instruments Inc | Process for manufacturing an integrated circuit package assembly |
US6590283B1 (en) * | 2000-02-28 | 2003-07-08 | Agere Systems Inc. | Method for hermetic leadless device interconnect using a submount |
-
1982
- 1982-08-13 JP JP13972082A patent/JPS5930470A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0691679A3 (en) * | 1994-06-07 | 1996-05-01 | Texas Instruments Inc | Process for manufacturing an integrated circuit package assembly |
KR100377981B1 (en) * | 1994-06-07 | 2003-05-27 | 텍사스 인스트루먼츠 인코포레이티드 | Optical Curing Process for Integrated Circuit Packge Assembly |
US6590283B1 (en) * | 2000-02-28 | 2003-07-08 | Agere Systems Inc. | Method for hermetic leadless device interconnect using a submount |
Also Published As
Publication number | Publication date |
---|---|
JPS641233B2 (en) | 1989-01-10 |
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