JPS5930341A - Data transmission and reception system - Google Patents

Abstract

PURPOSE:To improve the reliability, by providing a signal calibrating circuit so as to absorb the distortion such as jitter. CONSTITUTION:A digital output signal of a terminal device 15 is transmitted to an MODEM interface circuit 14, where it is converted into a digital signal and inputted to the signal calibrating circuit 19. A clock signal is outputted to a terminal OCLS in a CPU16 and when this signal is applied to a terminal SC/TO, the clock signal is applied to the circuit 19. An input signal SI of the circuit 19 is applied to a shift register, an output SO is applied to an MODEM circuit 13 and given to a line after conversion. A signal transmitted from the line is applied to the MODEM circuit 13 via a telephone set circuit 11 and applied to an input SI of the circuit 19 after being converted into a digital signal. The processed output SO is applied to the MODEM interface circuit 14 and transmitted to the terminal device 15 after digital conversion with + or -12V is applied.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a data transmission/reception system for a telephone terminal device having a modem circuit.

(2) Technical Background A telephone terminal device having a modem circuit has a schematic configuration as shown in FIG. That is, a signal with a combination of 1850Hz and 1650Hz is received from the line, demodulated in the modem circuit, converted to a digital signal of Ov to 5V, and then sent to the modem interface 7z2 circuit (R8-2320).
Convert it into a digital signal and supply the transmuted signal to the terminal at Cape Personal Combita. Conversely, signals from the terminal are sent out to the line via the aforementioned path in the reverse order.

(3) Prior Art and Problems Conventionally, a telephone terminal device having a modem circuit as described above simply converts a transmitted signal. Therefore, the received signal, which has distortions such as jitter on the line, is supplied as is from the modem via the R8232C to a terminal such as a personal beater or a printer.

Therefore, there is a problem in that satisfactory reception may not always be possible, especially depending on the capabilities of the terminal.

(4) Purpose of the Invention The purpose of the present invention is to absorb jitter, etc. in the line, based on the idea of providing a signal calibration circuit between the modem circuit and the modem interface circuit, in view of the problems with the conventional device described above. The object of the present invention is to enable the transmission and reception of signals with little distortion and improve the reliability of data transmission and reception.

An additional object of the present invention is to provide a transmission/reception system that can constantly monitor transmission signals, and therefore allows a terminal device to have a function of determining transmission signals.

(5) Structure of the Invention In the present invention, in a data transmission/reception system for a telephone terminal device having a modem circuit and a modem (3) interface circuit, a signal path from the modem interface circuit to the modem circuit and a signal path from the modem circuit to the modem A data transmission/reception system is provided in which a signal calibration circuit is provided in a signal path to an interface circuit.

(6) Embodiments of the Invention A block diagram illustrating the present invention in detail is shown in FIG. 2, and a pull circuit diagram of a telephone terminal device performing a data transmission/reception system as an embodiment of the invention is shown in FIG. In FIG. 3, an external line is connected via a telephone circuit 11 to a modem circuit 13, and from the modem circuit 3 via a changeover switch 17 to a signal calibration circuit 19 included in a central processing unit (CPU) 16. connected to the modem interface circuit (R8) from the signal calibration circuit 19 via the changeover switch 18.
-232C) l Connected to 4. It is connected to a modem in (4) and a keyboard 20. In addition, a dial pulse transmission circuit 12 is connected between the CPU 16 and the telephone circuit 11. The keyboard consists of 20 key scan circuits and a display section.

The operation of the above-mentioned apparatus will be explained using FIGS. 4 and 5. FIG. 4 is a partial detail view of the device of FIG. 3, with identical components being given the same reference numerals. FIG. 5 shows a signal waveform diagram in the device of FIG. 4.

First, when transmitting, the digital output signal c±12V) from the terminal 15 is sent to the modem interface circuit 4, where it is converted into a +5V to Ov digital signal and supplied to the changeover switch 18. Since the selector switch 18 is in the position shown during transmission, the output of the modem interface circuit 14 is connected to the input (8I') of the signal calibration circuit I9.

The signal calibration circuit 19 is built into the CPU]6.

A clock signal generated within the CPU 16 using a timer according to the transmission speed is output to the terminal 0cLs.

Output to terminal 0cL11 or four-way signal to terminal SC/
When added to TO, a clock signal is supplied to the signal calibration circuit 19. Signal calibration circuit 19 shift register S BO-
The input signal SI of the signal calibration circuit 19 is applied to the shift register SB3.

5 shows a waveform diagram in the signal calibration circuit 9. Figure 5 (1) shows a normal undistorted input signal (SI
I) is shown, and FIG. 5(3) shows the aforementioned terminal Etc/
A clock signal provided to To is shown. SI for input
A signal such as I is applied to the terminal SC/TO as shown in FIG.
When the lock signal is applied as shown in 3), the input signal is input into the shift register when the lock signal rises, and is transferred to the next shift register when the clock signal falls.

Therefore, the waveform of the output of each shift register is as shown in FIG. 5 (4) for shift register SB3, and as shown in FIG. 5 (5) to 7) for shift registers 8B2 to SBO, respectively. appear. In this way, the output (8o) of the signal calibration circuit 19 provides a force-acting output as shown in FIG. 5 (8).

The output is sent to the modem circuit 13 via the changeover switch 17, and the modem circuit I3 outputs 1850f (z and 1650f).
It is converted to a Hz signal and sent out over the line.

Next, the operation when receiving data in the above-mentioned device will be explained. The 1850Hz and 1650H2 signals sent from the line are supplied to the modem circuit 13 via the telephone circuit 11, where they are converted into digital signals from +5■ to Ov.
The signal is switched and applied to the input (Sr) of the signal calibration circuit 19. [Signal calibration circuit] The signal applied to the mechanism 9 is processed in the same manner as in the case of transmission described above and sent to the output (SO). The output (80) is switched by a changeover switch 18 and supplied to the input of the modem interface circuit 14. The modem interface circuit 14 converts the +5V to OV digital signal from the signal calibration circuit 19 into a ±+2V digital signal and sends it to the terminal 15.

Next, using the waveform diagram in FIG.
The case where a signal having a waveform like SI2 shown in 2) is applied will be explained. Even when a signal having a waveform 8I2 is supplied to the input of the signal calibration circuit 190, the fifth
The input signal is read into the shift register at the rising edge of the clock signal in Figure (3), and transferred to the next shift register at the falling edge of the clock signal.
) is the same as when a signal having the highly distorted input waveform 811 described above is supplied. The distortion of the input waveform, that is, the shift in the rise or fall of the waveform, is
It is possible to remove up to a period of time corresponding to 1/2 of the period of the clock signal.

In addition, in the device of this embodiment, since the transmission signal passes through a serial port (shift register) built into the CPU, it is possible to constantly monitor the transmission signal, and it is also possible to provide a judgment function for the transmission signal. can.

(7) Effects of the Invention According to the present invention, it is possible to absorb distortion such as jitter that a transmission signal receives during a line (8), thereby making it possible to transmit and receive signals with less distortion, thereby improving reliability in data transmission and reception. Can be done. Further, as an additional effect, a transmission/reception system is obtained in which transmission signals can be constantly monitored and terminal devices can have a function of determining the transmission signals.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a schematic configuration of a conventional telephone terminal device, FIG. 2 is a block diagram explaining the present invention in detail, and FIG. 3 is a block diagram showing a data transmission/reception system as an embodiment of the present invention. The block circuit diagram of the telephone terminal device to be used, FIG.
A block circuit diagram showing a part of the device shown in FIG.
3 is a waveform diagram in the circuit shown in the figure. FIG. 11... Telephone circuit 12... Dial pulse transmission circuit 13... Modem circuit 14... Modem interface circuit 15... Terminal 16... Central processing unit 17.1s... Changeover switch 19. ...Signal calibration circuit 20...Keyboard SBO, SBI, SB2, 883-'-shift register. Patent applicant Fujitsu Ltd. Patent application agent Akira Aoki Patent attorney Kazuyuki Nishidate Patent attorney Yukio Uchida Patent attorney Akiyuki Yamame

Claims (1)

[Claims] 1. In a data transmission/reception system for a telephone terminal device having a modem circuit and a modem interface circuit, a signal path from the modem interface circuit to the modem circuit and a signal path from the modem circuit to the modem interface circuit. A data transmission/reception method characterized by having a signal calibration circuit installed. 2. The signal calibration circuit reads an input signal at the rising edge of a clock pulse synchronized with the input signal, and shifts the read signal at the falling edge of the clock pulse; a connection state in which the output of the modem interface circuit is connected to the input of the shift register, and the output of the shift register is connected to the modem circuit; and the output of the modem circuit is connected to the input of the shift register, and 2. The data transmission/reception system according to claim 1, further comprising switching means for selectively switching the connection state of connecting the output of the register to the modem interface circuit.