JPS5928207A - Phase locked controller - Google Patents

Abstract

PURPOSE:To decrease the pull-in time of a phase locked controller, by producing a reference pulse signal having phase synchronism with the output signal of a demodulation circuit to supply this signal to a phase locked circuit and then performing a phase locked operation before a data reading instruction is transmitted from a medium. CONSTITUTION:A servo pulse signal is read out of a magnetic disk medium by means of the same rotating body as a data signal. The timing of the data signal has the timing information of the servo pulse signal, and therefore a reference pulse signal generated from the servo pulse signal is synchronous with the phase of the data signal and contains a fluctuation factor of the static row interval. Such a reference pulse signal is supplied to a phase locked circuit 50 for a previous phase synchronization. Thus it is easy to obtain the coincidence between the reference pulse signal and the contents of a count designating register for reference pulse. Therefore the pull-in time can be reduced in case the data signal read out of a medium is supplied to the circuit 50.

Description

DETAILED DESCRIPTION OF THE INVENTION (Description of the technical field to which the invention pertains) The present invention relates to a phase synchronization control device used in a peripheral device.

(Description of Prior Art) As shown in FIG. 1, a phase synchronization control device conventionally used in peripheral devices includes a demodulation circuit 10 for demodulating data read from a medium to obtain a square wave, and an internal circuit. A reference pulse generation circuit 20 for generating a reference pulse signal based on a clock signal, and a phase synchronization signal selection circuit for selecting either the output of the demodulation circuit IO or the output of the output reference pulse generation circuit 20. 40, and a phase synchronization circuit 50 which performs phase synchronization of the output signal of the phase synchronization signal selection circuit. In such a phase synchronization control device, the output signal of the reference pulse generator 20 is selected by the phase synchronization signal selection circuit 40 until a command to read data from the medium is sent. After the command is sent, the phase synchronization signal selection circuit 40 selects the output signal of the demodulation circuit IO and inputs it to the phase synchronization circuit 50. Therefore, the phase of the output signal of the reference pulse generation circuit 20 and the phase of the output signal of the demodulation circuit 10
Since the phase of the output signal of the reference pulse generation circuit 20 does not match, and the nutation factor of the static column spacing is not included in the output signal of the reference pulse generation circuit 20, it takes time to synchronize the phase of the output signal of the demodulation circuit IO. There was a drawback that it took a while.

(Detailed Description of the Invention) An object of the present invention is to generate a reference pulse signal whose phase is synchronized with the output signal of a demodulation circuit and which includes a fluctuation factor of the static column interval, thereby generating data from a medium. The reference pulse signal is used as the input signal of the phase synchronization circuit until the command to read data is sent out, and after the command to read data from the medium is sent out, the input data from the medium is used as the input signal of the phase synchronization circuit. It is an object of the present invention to provide a phase synchronization circuit 1 device having a phase synchronization function that can establish phase synchronization in a short period of time by using an input signal.

(Description of structure and operation of the invention) A phase synchronization control device according to the present invention includes a demodulation circuit, a reference pulse generation circuit, a reference pulse count circuit, a reference pulse count specification register, a comparison circuit, and a phase synchronization signal selection. The circuit includes a phase synchronization circuit and a phase synchronization circuit.

A demodulation circuit is a circuit for demodulating data read from a medium and thereby obtaining a square wave output signal. The reference pulse generation circuit generates a signal based on the reference signal read from the medium.
This circuit generates a reference pulse signal having a phase synchronized with the output signal of the demodulation circuit. The reference pulse count circuit 3 is a circuit for counting reference pulse signals sent from the reference pulse generation circuit.

The reference pulse count designation register is a circuit for registering a reference pulse count designation signal applied from the outside. The comparison circuit is a circuit for comparing the output signal of the reference pulse count circuit and the output signal of the reference pulse count designation register to obtain a matching output. The phase synchronization signal selection circuit selects either the output signal of the demodulation circuit or the output signal of the reference pulse generation circuit in accordance with the matching output from the comparison circuit.

The phase synchronization circuit is a circuit for performing phase synchronization of the output signal of the phase synchronization signal selection circuit.

The phase synchronization signal selection circuit selects the output signal of the reference pulse generation circuit until a command to read data from the medium is sent.

After the above command is sent, the output signal of the demodulation circuit is selected.

(Description of Embodiments) Next, the present invention will be explained in detail with reference to the drawings. FIG. 2 shows a block configuration of an embodiment of the phase synchronization control device according to the present invention.

In FIG. 2, the phase synchronization control device includes a demodulation circuit lO, a reference pulse generation circuit 2o, a reference pulse count circuit 30, a reference pulse count designation register 33, a comparison circuit 36, and a phase synchronization signal selection circuit 40. and a phase synchronization circuit 5o. The demodulation circuit IO demodulates the data signal read from the medium via the signal line 100 and converts the data into a square wave signal. The reference pulse generation circuit 20 generates a reference pulse signal using a pulse signal such as a servo pulse signal having a phase synchronized with the output signal of the demodulation circuit 10. The reference pulse count circuit 3o counts reference pulses. The reference pulse count designation register 33 is for registering a reference pulse count designation signal applied from the outside. The comparison circuit 36 is the reference pulse count circuit 30
The output signal of the reference pulse count designation register 33 is compared with the output signal of the reference pulse count designation register 33. Depending on the coincidence output from the comparison circuit 36, the phase synchronization signal selection circuit 40 selects either the output signal of the demodulation circuit 10 or the reference pulse signal. The phase synchronization circuit 50 performs phase synchronization of the output signal of the phase synchronization signal selection circuit 40.

Next, the functions and effects of the constituent elements of this embodiment will be specifically explained. The above embodiment is an example in which the present invention is applied to a magnetic disk drive, and the servo pulse signal read from the magnetic disk medium is a signal read from the same rotating body as the data signal. Therefore, the phases of both signals are synchronized, and at the same time, they include fluctuation factors in the static column spacing. Since the timing of the data signal is made with the timing information of the servo pulse signal, the reference pulse signal generated from the servo pulse signal is also synchronized with the phase of the data signal.
Includes static column spacing variation factors. By inputting such a reference pulse signal to the phase synchronization circuit 5() and performing phase synchronization in advance, the reference pulse signal can be easily made to match the contents of the reference pulse count designation register. Therefore, when the data signal read from the medium is input to the phase synchronization circuit 50, the synchronization pull-in time can be shortened.

(Detailed Description of the Invention) As described above, the present invention includes a demodulation circuit, a reference pulse generation circuit, a reference pulse count designation register, a reference pulse count circuit, a comparison circuit, and a phase synchronization signal selection circuit. and a phase synchronization circuit, which generates a reference pulse signal that is phase synchronized with the output signal of the demodulation circuit and inputs it to the phase synchronization circuit, thereby issuing an instruction to read data from the medium. By configuring the phase synchronization to be performed in advance before the signal is sent out, there is an effect that the synchronization pull-in time of the phase synchronization control device can be shortened.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a conventional phase synchronization control device, and FIG. 2 is a block diagram showing the configuration of a seven-phase synchronization control device according to the present invention. lO...Demodulation circuit 20...Reference pulse generation circuit 30...Reference pulse count circuit 33...Reference pulse count designation register 36...
Comparison circuit 40...Phase synchronization signal selection circuit 50...Phase synchronization circuit Patent applicant NEC Corporation Representative Patent attorney Hisashi Inoro 8- μtsu\wo Ku6

Claims (1)

[Claims] A demodulation circuit for demodulating data read from a medium to obtain a square wave, and a reference pulse signal for generating a reference pulse signal having a phase synchronized with an output signal of the demodulation circuit based on a reference signal read from the medium. a reference pulse generation circuit, a reference pulse count circuit for counting the reference pulse signal sent from the reference pulse generation circuit, and a reference pulse for registering a reference pulse count designation signal applied from the outside. a count designation register; a comparison circuit for comparing the output signal of the reference pulse count circuit and the output signal of the reference pulse count designation register to obtain a matching output; and an output signal of the demodulation circuit or the reference pulse generation circuit. a phase synchronization signal selection circuit for selecting one of the output signals according to the coincidence output from the comparison circuit; and a phase synchronization signal selection circuit for performing phase synchronization of the output signals of the phase synchronization signal selection circuit. The circuit includes a circuit that selects the reference pulse signal 1 to 1 before the command to read the data from the medium is sent, and selects the data read from the medium after the command is sent. A phase synchronization control device characterized by being configured to select.