JPS5925216A - Method for prevention of thermal deformation on compound semiconductor - Google Patents
Method for prevention of thermal deformation on compound semiconductorInfo
- Publication number
- JPS5925216A JPS5925216A JP13476782A JP13476782A JPS5925216A JP S5925216 A JPS5925216 A JP S5925216A JP 13476782 A JP13476782 A JP 13476782A JP 13476782 A JP13476782 A JP 13476782A JP S5925216 A JPS5925216 A JP S5925216A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor substrate
- thermal deformation
- inp
- processed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02392—Phosphides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、蒸気圧の高い元素を含む化合物半導体基板表
面に形状的な加工を施したのちに高温熱処理するに際し
て、加工光１ａ１形状の熱変形を防止するようにした方
法に関する。Detailed Description of the Invention [Technical Field of the Invention] The present invention is directed to thermal deformation of the shape of processing light 1a1 when performing high-temperature heat treatment after processing the surface of a compound semiconductor substrate containing an element with high vapor pressure into a shape. Concerning a method to prevent this.
蒸気圧の高い元素を含む化合物半導体結晶、例えばＩｎ
Ｐ基板」二に液相成長法等により結晶成長を行う場合、
結晶成長を行う前の高温待梯中に蒸気圧の高いＰの熱解
離によってＩ ｎ Ｐ基板の表面が荒れてしまう。これ
を防ぐ手法と１〜で従来、基板と同じＩｎＰ結晶で基板
表面を覆う方法、フォスフイン（ＰＪＩ３）を雰囲気中
に流す方法或いような問題があった。すなわち、表面に
Ｖ字状溝や回折格子等の加工を施した１ｎＩ）基板上に
結晶成長を行う場合、上述した燐庄を過剰に加える方法
な用いると、結晶成長以前の高温待機中に上記加工され
た表面形状が変形を氾）こし加工の４１１ｉ′度が十分
に活かされないと云う問題がある。Compound semiconductor crystals containing elements with high vapor pressure, such as In
When crystal growth is performed on the P substrate by liquid phase growth method etc.,
During high-temperature waiting before crystal growth, the surface of the InP substrate becomes rough due to thermal dissociation of P, which has a high vapor pressure. Conventionally, the methods 1 to 1 to prevent this problem include a method of covering the surface of the substrate with the same InP crystal as the substrate, and a method of flowing phosphine (PJI3) into the atmosphere. In other words, when growing crystals on a 1nI) substrate whose surface has been processed with V-shaped grooves, diffraction gratings, etc., if the above-mentioned method of adding too much phosphor is used, the above-mentioned There is a problem that the 411i' degree of straining is not fully utilized (the processed surface shape is prone to deformation).
例えば、第１１シｌの（ａ）に示す如（Ｉｎ１．’基板
２の表面−１−に周期ｚｏｏｏ［Ｄ、深さ５００ 〔ｌ
］の回折格子を形成したのち、ＩｎＰ基板２０表面をＩ
ＩＩＰ結晶で侠う方法音用いて水素雰囲気中６１０ Ｃ
℃）］、４０分の高ｒ／、−、’ｌｐｊ機７ａ７ 行−
） ｉコトコロ、Ｉｎ Ｐ 基１４Ｆｊ、 １の表面が
同図（ｂｌに示すθ１１り平１１１化する事実が判明し
た。そして、回折格子２の深さは１．００［ｉ］以下と
なった。発振波長を制御する分布帰還型（＋）ＦＩ３）
レーザ等の作製においては、回折格子を刻んだＩｎＰ基
板−Ｌに結晶成長を行う必要があるが、この場合熱変形
による回折格子の平坦化のために回折格子による光帰還
が起こらなくなる八Ｊ１がある。このように従来、高調
、待（喪中における加工表面形状の熱変形が大きな問題
となっていた。For example, as shown in (a) of the 11th sill (In1.' On the surface -1- of the substrate 2, there is a period zoooo [D, depth 500 [l
] After forming the diffraction grating, the surface of the InP substrate 20 is exposed to I
How to use IIP crystal in hydrogen atmosphere at 610C
℃)], 40 minutes high r/, -, 'lpj machine 7a7 line -
) It was found that the surface of the In P group 14Fj, 1 was flattened by θ11 shown in the same figure (bl), and the depth of the diffraction grating 2 was 1.00 [i] or less. Distributed feedback type (+) FI3) that controls the oscillation wavelength
In the production of lasers, etc., it is necessary to grow crystals on an InP substrate-L with a diffraction grating carved into it. be. As described above, thermal deformation of the machined surface shape during high pitch and machining has traditionally been a major problem.
一方、加工された基板表面に６１０２等の保護膜を形成
することにより加工表面の熱変形を防止することは可能
であるが、このＪ、ｌｐ、合５１０２ｊ摸上で結晶成長
が行われないので、結晶成長全必要とするプロセスには
適用できない６〔発明の目的〕
本発明の目的は、高温待機中におりるｐ９（変形を防止
することができ、化合物半導体基板の加工表面形状を損
うことなく所望の高温プロセスを行いイ（する化合物半
導体の熱変形同市方法含４’）１１供することにある。On the other hand, it is possible to prevent thermal deformation of the processed surface by forming a protective film such as 6102 on the surface of the processed substrate, but since crystal growth does not occur on this J, lp, 5102j model, 6 [Object of the Invention] The purpose of the present invention is to prevent p9 (deformation) that occurs during high-temperature standby, and to prevent damage to the processed surface shape of compound semiconductor substrates. The purpose is to perform the desired high-temperature process without any heat deformation and to provide a method for thermal deformation of compound semiconductors.
熱変形の生じる原因に関しては明確にはその機構が解明
されていないが、熱解離を起こす元素の半導体基板に対
する分圧が熱変形に大きな影響を力えることは事実であ
る。前述し／Ｃ，Ｉ ＋１ｐ基板上の回折格子の高温待
機中での熱変形（平坦化）現象を例にすると、前記第１
図（ｂｌに示す如く回折格子２の凹部にＪｎＰの再結晶
化が起こることによってＮ′坦化が進行し、−Ｃいた。Although the mechanism behind the occurrence of thermal deformation has not been clearly elucidated, it is a fact that the partial pressure of the element that causes thermal dissociation on the semiconductor substrate has a great influence on thermal deformation. Taking as an example the thermal deformation (flattening) phenomenon of the diffraction grating on the /C,I +1p substrate mentioned above during high temperature standby, the first
As shown in FIG. 1, recrystallization of JnP occurs in the concave portions of the diffraction grating 2, and N' planarization progresses, resulting in -C.
この再結晶化が気相中のＰの分圧の介（１−によるもの
であるため、再結晶化を防止するには■ｒ１１’＆ ４
１＜表面に対する雰囲気中の燐圧を１１結晶化が進行す
る燐圧より小さく抑える必要がある。ぞして、本４１ち
囲者等の鋭意研究によれば、上記燐圧な・内緒晶化７５
Ｘ仇行する；７￥圧より僅かに小さくしたＪＪＪ、合、
■）の解ぬ１１によるＩｎＰ基板表面の荒れがａ′「容
できる４ｊ１″度であること力場′（１めらｉｌ、た。Since this recrystallization is due to the partial pressure (1-) of P in the gas phase, in order to prevent recrystallization,
1<It is necessary to suppress the phosphorus pressure in the atmosphere relative to the surface to be lower than the phosphorus pressure at which 11 crystallization proceeds. Therefore, according to the intensive research of book 41 and others, the secret crystallization of the phosphorus pressure 75
X revenge; JJJ slightly smaller than 7 yen pressure,
(2) The roughness of the InP substrate surface due to the unknown 11 is 4j1'' degrees which can be tolerated by the force field' (1 mera il, ta).
木発す１１はこのような点に着目し、ＩｎＰやＩｎＧｎ
ＡｑＰ等の化合物半導体基板の表面に形状的な加工を施
したのち、この半導体基板に高温熱処理蒼・施すに際し
、上記半導体基板の加工表面を該基板の４ｉ’Ｙ成元緊
の中の蒸気圧の高い元素を含寸ない１４イ１１ 、例え
ばＧａＡｖやＳｌで被動すると共に、上記−！ＩＬｗ休
基板体被覆旧料との間に前記／〜気圧の茜い元素の分圧
金制餌１するだめの緩衝？）２間′（ｒ−設けるように
した方法である。Kihasu 11 focuses on these points and develops InP and InGn.
After the surface of a compound semiconductor substrate such as AqP is processed into a shape, when performing high-temperature heat treatment on this semiconductor substrate, the processed surface of the semiconductor substrate is heated to the vapor pressure within the 4i'Y composition of the substrate. The above -! Is there a buffer between the ILw dormant substrate coating old material and the partial pressure of the red element of ~atmospheric pressure? ) 2' (r-).
本発明によれば、基板表面と被覆材４：１との間の緩衝
空間により熱解離を起こす元素の分圧を制１１ｉｌ、つ
１り再結晶化が進行する分圧よシ小さく抑えることが可
能となる。このため、形状的な加工が施された基板表面
の熱変形な一最小に抑えることができ、加工形状を損う
ことなく結晶成長を含む次の高温プロセスを行うことが
できる。したがって、回折格子全必要とするＤＦ Ｂレ
ーザ、その低基板表面に形状的な加工’ｌｘ：施す必要
のある各種の半導体素子の製造プロセスに適用して絶大
なる効果を発揮する。According to the present invention, the partial pressure of elements that cause thermal dissociation can be suppressed by the buffer space between the substrate surface and the coating material at a ratio of 4:1, which is lower than the partial pressure at which recrystallization progresses. It becomes possible. Therefore, thermal deformation of the surface of the substrate which has been subjected to shape processing can be suppressed to a minimum, and the next high temperature process including crystal growth can be performed without damaging the processed shape. Therefore, it is extremely effective when applied to a DFB laser that requires a full diffraction grating, and to various semiconductor device manufacturing processes that require geometrical processing on the surface of its lower substrate.
以下、本発明を（１００） Ｉｎ Ｐ基板」二に回折格
子を形成したのち、水素雰囲気中６ （１０（℃）、４
０分の熱処理を行った場合の実例により説明する。Hereinafter, after forming a diffraction grating on a (100) InP substrate according to the present invention, it was heated in a hydrogen atmosphere at 6 (10 (°C), 4
An example will be explained in which heat treatment is performed for 0 minutes.
なお、本実施例においては高温侍（戊の後に結晶成長以
前行いＤＦＢレーザを作製する状況下で行ったものであ
る。Note that this example was carried out under the condition that a DFB laser was fabricated at high temperature (after crystal growth and before crystal growth).
まず、ＩｎＰ基板１０表面上に周期２ｏｏｏｃ久〕、深
さｓ’ｏｏｃＸ）の回折格子２を形成した。この回折格
子２の形成には２光束干渉法および湿式二［ッチング法
を用いた。次いで、上記ＩｎＰ基板１を第２図に示す如
くカーボングラフアイｌ−製（買増スライドボート３に
形成された四部４に収容し、その上にＧＲＡｓ結晶カバ
ー５を被せた。このとき、ＩｎＰノ・Ｌ板１とＧａ Ａ
Ｒ結晶ツノバー５との間にＵよ１０（１［／ｌ＋ｎｌ程
Ｉｇｉの間隙が存在しておシ、こＪｌらの間に緩（１１
ｆｌ空間６が形成さ〕圭る。その後、水素雰囲気中（３
００Ｃ℃：Ｊ、４０分の熱処理を行ったところ、ＩｎＩ
’基板）上の回折格子２の熱変形は殆んど生じなかった
。またＩｎＰ基板１の表面荒ｉシは無視できる程小さい
ものであった。First, on the surface of the InP substrate 10, a diffraction grating 2 with a period of 2ooocX) and a depth of s'ooocX) was formed. This diffraction grating 2 was formed using a two-beam interference method and a wet double-etching method. Next, as shown in FIG. 2, the InP substrate 1 was housed in the four parts 4 formed in the carbon graphite slide boat 3, and a GRAs crystal cover 5 was placed thereon. No. L plate 1 and Ga A
There is a gap of about Igi between U and 10 (1 [/l + nl) between R crystal horn bar 5, and a gap of about 1 [/l + nl] between Jl and others.
The fl space 6 is formed. After that, in a hydrogen atmosphere (3
00C℃:J, 40 minutes of heat treatment resulted in InI
There was almost no thermal deformation of the diffraction grating 2 on the substrate). Furthermore, the surface roughness of the InP substrate 1 was so small that it could be ignored.
一方、従来方法では前記Ｇａ Ａｓ結晶カバー５の代シ
にＩｎＰ基板１からの燐の熱解離を防ぐ目的でＩｎｐ結
晶カバーを用いているのであるが、この腸合本実施例と
同一条件下で高温放置を行ったところ、１１）Ｐ基鈑１
上の回折格子２は■１】Ｐの７１１結晶化によって前記
第１図（ｂ＋に示す如く平坦化されるのが確認嘆れた。On the other hand, in the conventional method, an InP crystal cover is used in place of the GaAs crystal cover 5 for the purpose of preventing thermal dissociation of phosphorus from the InP substrate 1, but under the same conditions as in this example, When left at high temperature, 11) P substrate 1
It was confirmed that the upper diffraction grating 2 was flattened as shown in FIG. 1 (b+) by the 711 crystallization of P.
このように本実施例によれば、］、ｎＰ基板１の構成元
素である蒸気圧の高いＰを含寸ず、かつ処理温度で分解
しない安定な月別よりなるＧａＡｓ結晶カバー５を用い
、ＩｎＰ基板１０表面ｆｆ：覆うと共に基板Ｊとカバー
５との間に緩衝空間６を形成しているので、基板１表面
におけるＰの分圧をＩｎＰの再結晶化が進行する分Ｅｌ
−より（、’／、かに小さくすることがｎ」能である。As described above, according to this embodiment, the GaAs crystal cover 5 is made of a stable material that does not contain P, which has a high vapor pressure and is a constituent element of the nP substrate 1, and does not decompose at the processing temperature. 10 surface ff: Since it is covered and a buffer space 6 is formed between the substrate J and the cover 5, the partial pressure of P on the surface of the substrate 1 is reduced by the amount El as recrystallization of InP progresses.
- can be made much smaller than (, '/, n').
したがっで １１１Ｐ基板１上に再結晶化する元素の供
給源が基板１表面からのみとなり、緩衝空間６の体積に
」、ってＩｎＰ基板２の表面の熱変形を極めて小づくす
ることができる。そして、本実施例のように続いて連続
多層結晶成長を行う場合、この結晶成長後も回折格子２
が保存されるので、回折格子２の光帰還が極めて強いＤ
ＦＢレーザを作製することが可能である。寸だ、ＩｎＰ
基板１の表面を除く部分’ｉ；ｒ： 、＋ｊ ） Ｊ
で密着保護しているので、基板２自身からの熱解離を最
小にすることができる等の効果を奏する。Therefore, the source of the elements recrystallized on the 111P substrate 1 is only from the surface of the substrate 1, and thermal deformation of the surface of the InP substrate 2 can be extremely reduced in the volume of the buffer space 6. When successive multilayer crystal growth is performed as in this embodiment, the diffraction grating 2 is
is conserved, so the optical feedback of the diffraction grating 2 is extremely strong D
It is possible to create an FB laser. InP
Part 'i; r: , +j) J excluding the surface of substrate 1
Since the substrate 2 is closely protected, thermal dissociation from the substrate 2 itself can be minimized.
なお、本発明は上述した実施例に限定さり、るものでは
ない。例えば、前言己カバーはＧａ Ａｓに限るもので
はなく Ｓｌ、その他基板の構成元素中の蒸気圧の高い
元素（実施例の場合Ｐ）を含−まず、処理温度で安定な
材料であｈは用いることが可能である。また、高温放置
時の雰囲気としで°ｒルコ゛ンと水素との混合気体を用
いてもよい。Note that the present invention is not limited to the embodiments described above. For example, the above-mentioned cover is not limited to GaAs, but also contains Sl and other elements with high vapor pressure among the constituent elements of the substrate (P in the example), and is a material that is stable at the processing temperature. Is possible. Further, a mixed gas of hydrogen and hydrogen may be used as the atmosphere when left at high temperature.
このＪＭ 台、アルゴン原子がｆＰ基板からのＰの拡へ
々を抑えで熱１＋ｔ’（ｌζＩＦ Ｙ（防ぐため、より
一層効果的でを、る。さらに、回折格子の不必要な基板
懺面領域ン： ５ｉｎ２１１’カ騙で？ト）着保護する
ことにより、ＩｎＰからのＰの熱ｓｒ ｒｒ＋ｔｃをよ
シ少なくすることが＋＋Ｊ能である。また、ＩｎＰ基板
に限らずＩｎ Ｃ１ＩＡ３四ＩｎＳｂ、その他各挿の化
合物半導体に適用することが可能である。さらに、力１
ドＩ房し状も回折格子に限らずＶ半状！ｉ’Ｊ、その他
の形状に適用することが「り能である。要するに本発明
ｔＪ、その要旨を逸脱しない範囲で、（！１１々変形し
て実施することができる。In this JM stand, the argon atoms suppress the spread of P from the fP substrate, making it even more effective to prevent heat 1+t'(lζIF Y).In addition, unnecessary substrate surface area of the diffraction grating It is possible to reduce the P heat sr rr + tc from InP by protecting the 5in211' substrate.In addition, it is possible to reduce the heat srrr+tc of P from InP. It is possible to apply it to compound semiconductors such as
The de-I tufted shape is not limited to diffraction gratings, but is also V-shaped! i'J, it is possible to apply it to other shapes.In short, the present invention can be implemented with various modifications without departing from the gist thereof.
第１図（ａｌ （ｂ）はイメ〔来方法の問題点を説明す
るだめのもので（ａ）はＩｎＰ基板上に回折格子を形成
した状態を示１断面図、（ｌ］）は上記ＩｎＰ基板ケ熱
処理し／こ陵の状態を示す断面図、第２図は本発明の一
実／１ｌｔｉ例を幌、明するためのものでボートの凹ｆ
１１５に１＋＋Ｐ基板を収各課持しその上部を（ＪＲＡ
８結晶カバーで覆った状態を示す断面図である。Figure 1 (al) (b) is an image [only used to explain the problems of the previous method, (a) is a cross-sectional view showing the state in which a diffraction grating is formed on an InP substrate, and (l) is a cross-sectional view of the above InP substrate. Figure 2 is a sectional view showing the condition of the board after heat treatment, and Fig. 2 is a cross-sectional view showing the state of the heat treatment of the board.
115 contains 1++P board and its upper part (JRA
FIG. 8 is a cross-sectional view showing a state covered with an 8-crystal cover.
Claims (3)
施したのちこの半導体基板に高温熱処理を施すに際し、
」二記半導体基板の加工表面を該基板の構成元素の中の
蒸気圧の高い元素を含まない相別で被覆１７、かつ上記
半導体基板と、被覆月利との間に所定体積の緩衝空間を
形成すること全特徴とする化合物半導体の熱変形防止方
法。(1) When performing high-temperature heat treatment on the semiconductor substrate after processing the surface of the compound-'1'' conductor substrate into a shape,
``The processed surface of the semiconductor substrate described in item 2 is coated with a layer 17 that does not contain elements with high vapor pressure among the constituent elements of the substrate, and a buffer space of a predetermined volume is provided between the semiconductor substrate and the coating material. A method for preventing thermal deformation of a compound semiconductor.
ｉｌｔ、 を起こしゃ）ＩＣい結晶或いは非晶質で密着
保訛されることを特徴とする特許梢求の範囲第１項記載
の化合物半導体の熱変形防止力法。(2) The semiconductor substrate is thermally decomposed except for its processed surface.
1. A method for preventing thermal deformation of a compound semiconductor according to item 1 of the patent application, characterized in that the IC is tightly secured with a crystalline or amorphous material.
ＡｓＰ ｆ用い、前記被覆相ネ・１としてＧｎＡｓ若し
くはＳｉを用いることＩＣ特徴とする重訂ｉｉｔ’（求
の師、間第１項記載の化合物半導体の熱変形防止方法。(3) InP or h+Gn as the semiconductor substrate
The method for preventing thermal deformation of a compound semiconductor as described in item 1 above, characterized in that the IC uses AsP f and GnAs or Si is used as the covering phase N1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13476782A JPS5925216A (en) | 1982-08-03 | 1982-08-03 | Method for prevention of thermal deformation on compound semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13476782A JPS5925216A (en) | 1982-08-03 | 1982-08-03 | Method for prevention of thermal deformation on compound semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5925216A true JPS5925216A (en) | 1984-02-09 |
| JPH0136689B2 JPH0136689B2 (en) | 1989-08-02 |
Family
ID=15136082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13476782A Granted JPS5925216A (en) | 1982-08-03 | 1982-08-03 | Method for prevention of thermal deformation on compound semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5925216A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5234783A (en) * | 1991-12-16 | 1993-08-10 | Eastman Kodak Company | Method of selectively glossing toner images |
| US5260753A (en) * | 1990-11-14 | 1993-11-09 | Konica Corporation | Color image forming method |
| KR20140085560A (en) * | 2011-10-27 | 2014-07-07 | 꼼미사리아 아 레네르지 아토미끄 에뜨 옥스 에너지스 앨터네이티브즈 | Process for smoothing a surface via heat treatment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49110271A (en) * | 1973-02-21 | 1974-10-21 | ||
| JPS5513909U (en) * | 1978-07-07 | 1980-01-29 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2247351C3 (en) * | 1972-09-27 | 1980-04-10 | European Rotogravure Association, 8000 Muenchen | Method and device for photoelectric measurement and adjustment of an ink layer on the forme cylinder of a rotogravure printing machine |
-
1982
- 1982-08-03 JP JP13476782A patent/JPS5925216A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49110271A (en) * | 1973-02-21 | 1974-10-21 | ||
| JPS5513909U (en) * | 1978-07-07 | 1980-01-29 |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5260753A (en) * | 1990-11-14 | 1993-11-09 | Konica Corporation | Color image forming method |
| US5234783A (en) * | 1991-12-16 | 1993-08-10 | Eastman Kodak Company | Method of selectively glossing toner images |
| KR20140085560A (en) * | 2011-10-27 | 2014-07-07 | 꼼미사리아 아 레네르지 아토미끄 에뜨 옥스 에너지스 앨터네이티브즈 | Process for smoothing a surface via heat treatment |
| JP2014535171A (en) * | 2011-10-27 | 2014-12-25 | コミサリア ア レネルジー アトミック エ オ ゼネルジー アルテルナティブＣｏｍｍｉｓｓａｒｉａｔ Ａｌ’Ｅｎｅｒｇｉｅ Ａｔｏｍｉｑｕｅ Ｅｔ Ａｕｘ Ｅｎｅｒｇｉｅｓａｌｔｅｒｎａｔｉｖｅｓ | Process to smooth the surface by heat treatment |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0136689B2 (en) | 1989-08-02 |
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