JPS5923746U - semiconductor package - Google Patents

semiconductor package

Info

Publication number
JPS5923746U
JPS5923746U JP11808882U JP11808882U JPS5923746U JP S5923746 U JPS5923746 U JP S5923746U JP 11808882 U JP11808882 U JP 11808882U JP 11808882 U JP11808882 U JP 11808882U JP S5923746 U JPS5923746 U JP S5923746U
Authority
JP
Japan
Prior art keywords
semiconductor package
enlarged portion
plug
view
package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11808882U
Other languages
Japanese (ja)
Inventor
時重 明
Original Assignee
京セラ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京セラ株式会社 filed Critical 京セラ株式会社
Priority to JP11808882U priority Critical patent/JPS5923746U/en
Publication of JPS5923746U publication Critical patent/JPS5923746U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のプラグイン形半導体パッケージを配線基
板に実装したときの要部断面図、第2図は第1図絶縁筒
体の要部拡大斜視図、第3図は本考案実施例の要部拡大
斜視図、第4図は本考案のプラグイン形半導体パッケー
ジを配線基板に実装したときの要部断面図、第5図及び
第6図は膨大形状部の変形態様を示した要部拡大斜視図
である。 1・・・絶縁筐体、2・・・端子ピン、3・・・配線基
盤、4・・・スルーホール、5・・・膨大形状部、7・
・・絶縁性薄板。
Fig. 1 is a cross-sectional view of the main parts of a conventional plug-in semiconductor package mounted on a wiring board, Fig. 2 is an enlarged perspective view of the main parts of the insulating cylinder shown in Fig. 1, and Fig. 3 is an embodiment of the present invention. FIG. 4 is an enlarged perspective view of the main part, FIG. 4 is a sectional view of the main part when the plug-in semiconductor package of the present invention is mounted on a wiring board, and FIGS. 5 and 6 are main parts showing the deformation of the enlarged part. It is an enlarged perspective view. DESCRIPTION OF SYMBOLS 1... Insulating housing, 2... Terminal pin, 3... Wiring board, 4... Through hole, 5... Enormous shape part, 7...
...Insulating thin plate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 少なくとも1本の端子ビンに膨大形状部を備えたプラグ
イン型乎導体パッケージにおいて、前記膨大形状部の下
面側に絶縁部材を固着したことを特撮とする半導体パッ
ケージ。
What is claimed is a plug-in type conductor package in which at least one terminal bin is provided with an enlarged portion, and a special feature of the semiconductor package is that an insulating member is fixed to the lower surface of the enlarged portion.
JP11808882U 1982-08-02 1982-08-02 semiconductor package Pending JPS5923746U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11808882U JPS5923746U (en) 1982-08-02 1982-08-02 semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11808882U JPS5923746U (en) 1982-08-02 1982-08-02 semiconductor package

Publications (1)

Publication Number Publication Date
JPS5923746U true JPS5923746U (en) 1984-02-14

Family

ID=30271570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11808882U Pending JPS5923746U (en) 1982-08-02 1982-08-02 semiconductor package

Country Status (1)

Country Link
JP (1) JPS5923746U (en)

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