JPS5923518B2 - Color signal demodulation circuit for SECAM color television receivers - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a color signal demodulation circuit for a SECAM color television receiver.

First, a color signal demodulation circuit of a conventional SECAM color television receiver will be described with reference to FIG.

A SECAM system composite color video signal is supplied from an input terminal 1 to a bandpass amplifier 2 with a center frequency of 4.286 MH2 and a bandwidth of ±1.5 MH2, and then to a bell-shaped filter 3. The chromaticity signal itself obtained from the bell-shaped filter 3 and the signal delayed by being supplied to a delay element 4 having a delay amount of one horizontal period are supplied to a switching circuit 5. This changeover circuit 5 is composed of changeover switches 5a and 5b, and the output of the bell-shaped filter 3 and the output of the delay element 4 are supplied to these changeover switches 5a and 5b.
The outputs of the changeover switches 5a and 5b are the first and second outputs.
are supplied to the demodulation circuit 6 and □, respectively. These first and second demodulation circuits 6 and T are frequency discrimination circuits, respectively, and
First and second color signals are obtained at output terminals 8 and 9, respectively. Here, the first and second color signals are a blue difference signal B.
-Y and the red difference signal R-Y. Incidentally, here, B indicates a blue signal, R indicates a red signal, and Y indicates a luminance signal. Now SEC
The AM composite color video signal consists of a luminance signal and a chromaticity signal, and the chromaticity signal has a frequency f. b) A signal obtained by FM modulating a carrier wave signal with a frequency of 4.25 MH2 using color difference signals B and Y, and a frequency F. A signal obtained by FM modulating a carrier wave signal of r=4.40625 MHz with a color difference signal RY is transmitted alternately every horizontal period.

Therefore, after the chromaticity signal obtained from the bell-shaped filter is converted into a simultaneous signal by the delay element 4 and the switching circuit 5,
The signals are supplied to first and second demodulation circuits 6 and 7 of a frequency discrimination circuit configuration for obtaining respective color difference signals, that is, first and second color signals. In this way, the color difference signals B-Y and R-Y are continuously obtained from the output terminals 8 and 9, respectively, as described above. 10 is a switching control circuit for switching and controlling this switching circuit.

In this example, a master-slave flip-flop circuit 15 is used. The chromaticity signal from the bell-shaped filter 3 is supplied to a color discrimination signal demodulation circuit (frequency discrimination circuit) 12, and the demodulated output from the color discrimination signal demodulation circuit 12, which is generated at different levels in each horizontal cycle, is used for color discrimination. Signal detection circuit 13
supplied to The color discrimination signal detection circuit 13 is a circuit that detects whether the switching phase from the switching circuit 5 is correct or incorrect, and when the switching phase is incorrect, it generates a correction signal, and this color correction signal is sent to the master slave flip-flop. circuit 1
5. This color discrimination signal detection circuit 13 is configured as follows. The color discrimination signals having different levels in each horizontal period from the color discrimination signal demodulation circuit 12 are integrated (focusing only on the color discrimination signal period) to obtain the average value of the color discrimination signals having different levels, and this average value is calculated. By comparing the input color discrimination signal and the input color discrimination signal, and by gating every two cycles with a pulse synchronized with the horizontal pulse, when the switching phase of the switching circuit 5 is correct, only a low level color discrimination signal, for example, is allowed to pass. , by integrating this, a voltage lower than a predetermined reference value is generated, and at this time, the color discrimination signal detection circuit 13 is prevented from generating a correction signal. Next, when the switching phase is incorrect, only a high-level color discrimination signal passes through, so integrating this will result in a voltage higher than the reference value. At this time, a correction signal is supplied to the flip-flop circuit 15 to correct the switching phase. Do what you want.

Further, the detection output of the color discrimination signal detection circuit 13 is also supplied to a color killer circuit 14.

On the other hand, a horizontal pulse Ph is supplied from the input terminal 11 to the master sleep flip-flop circuit 15. As a result, a switching control signal in the form of a rectangular wave whose period is twice the horizontal period is obtained from the flip-flop circuit 15, and this signal is supplied to the switching circuit 5. Incidentally, in such a color signal demodulation circuit, the color discrimination signal demodulation circuit 12 usually has a relatively simple configuration compared to the first and second demodulation circuits 6 and 7.

Therefore, there is a difference in the degree of deterioration of the demodulated output between these demodulating circuits 6, 7 and 12 in the case of a weak electric field. Therefore, there is a drawback that there is no correspondence between the deterioration of the color difference signal output and the error rate of color discrimination signal detection. Therefore, a high-grade circuit similar to the demodulating circuits 6 and 7 may be used as the color discrimination signal demodulating circuit 12, but this would complicate the configuration and increase costs. In view of this, the present invention provides a SECAM color television receiver that avoids the above-mentioned drawbacks and can cope with the deterioration of color difference signal output and the error rate of color discrimination signal detection with a simple configuration. This paper attempts to propose a color signal demodulation circuit.

Next, a first embodiment of the present invention will be described with reference to FIG.

In FIG. 2, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and redundant explanation will be omitted. In this embodiment, at least one of the first and second demodulation circuits, e.g.
A color discrimination signal detection circuit 13 is provided which detects a color discrimination signal for each horizontal period from the color signal from the demodulation circuit 7, that is, the red difference signal RY, and supplies it to the control circuit 10. Therefore, in this embodiment, the color discrimination signal demodulation circuit 12 shown in FIG. 1 is omitted, and this is also used as the second demodulation circuit 7. Now, FIG. 3A (:!) Ph shows a horizontal pulse supplied from the input terminal 11 to the master-slave flip-flop circuit 15.

In addition, S1 in FIG. 3B(7) shows a duty cycle 5 having a period twice the horizontal period obtained from the flip-flop circuit 15.
0% square wave signal is shown. In the case of FIG. 1, this rectangular wave signal S1 is supplied to the switching circuit 5 as a switching control signal. However, in this embodiment, the demodulated output of the second demodulating circuit 7 is supplied to the color discrimination signal detecting circuit 13, so if the same procedure as in FIG. 1 is used, the following problem will occur. That is, FIG. 3D shows the structure of the chromaticity signal, and D'
r and D'b represent an FM modulated red difference signal and an FM modulated blue difference signal, and Vr and Vb each have a frequency of F. , and F. A single frequency signal of b is shown, and by detecting this, it is possible to discriminate the color difference signal in each horizontal period. Therefore, in the case of FIG. 2, when the above-mentioned rectangular wave signal S1 of FIG. 3B is supplied from the second demodulation circuit 7 to the switching circuit 5, only the carrier wave signal Vr can be detected. Therefore, it is not possible to obtain the average value of the demodulated signal 1r corresponding to the carrier wave signal Vr and the demodulated signal 1b corresponding to the carrier wave signal Vb, and therefore it is impossible to determine whether the switching phase is correct or incorrect. Therefore, in this second demodulation circuit 7 as well, the switching control circuit 10 is connected to the above-mentioned flip-flop circuit 15 and its output and horizontal pulse Ph so that both carrier wave signals Vr and Vb can be obtained together with the FM modulated red difference signal D'r. The switching control circuit 10 generates a switching control signal S2 as shown in FIG. 3C, which is the sum of the above-mentioned horizontal pulse Ph and rectangular wave signal S1 as shown in FIG. 3C. This is then supplied to the switching circuit 5. In this way, a demodulated output as shown in FIG. 3E is obtained from the second demodulating circuit 7. That is, Dr is a demodulated red difference signal, HD is a horizontal synchronization signal, and after the horizontal synchronization signal HD, carrier wave signals Vr, Vb are generated every horizontal period.
Demodulated color discrimination signals 1r, I with mutually different levels
b will be obtained. Thus, the color signal demodulation circuit shown in FIG. 2 doubles as a demodulation circuit for demodulating color discrimination signals and a demodulation circuit for obtaining color difference signals, so the configuration can be simplified and color difference signal output in a weak electric field can be achieved. This means that there is a correspondence between the deterioration of color discrimination signal and the error rate of color discrimination signal detection.

Next, a second practical example of the present invention will be explained with reference to FIG. In FIG. 4, parts corresponding to those in FIGS. 1 and 2 described above are designated by the same reference numerals, and redundant explanation will be omitted.
In this example, the outputs of the first and second demodulation circuits 6 and 7 are supplied to an adder circuit 17 for addition, and the added output is supplied to a color discrimination signal detection circuit 13. By doing this, the level of the color discrimination signal is doubled, and the noise component in the weak electric field is reduced! Since it is multiplied by i, the S/N
is improved by 3 dB compared to the case shown in FIG. Next, a specific configuration of the color discrimination signal detection circuit 13 shown in FIG. 4 will be explained with reference to FIG. 5.

The summed output of the color difference signals B-Y and R-Y from the adder circuit 17 is supplied from an input terminal 20 to a limiter amplifier 21. Its output is supplied to sample and hold circuits 22 and 23. The output Q of the flip-flop circuit 15 described above is supplied to one differentiating circuit 24, and the other output Q is supplied to the other differentiating circuit 25. These differentiating circuits 24 and 25
The outputs thereof are supplied as sampling signals to sample and hold circuits 22 and 23, respectively. The outputs of these sample and hold circuits 22 and 23 are supplied to a level comparison circuit 26, and the comparison output thereof is supplied to a color killer circuit 14 and also to a flip-flop circuit 15 as a color discrimination signal. Now, in FIG. 6, the characteristic of the frequency f versus output level of the first demodulation circuit 6 is as shown by a straight line Lb,
A similar demodulation characteristic of the other demodulation circuit 7 is as shown by a straight line Lr.

Therefore, the FM modulated color difference signals Vb and Vr supplied to the first and second demodulation circuits 6 and 7 in FIG. 4 become as shown by solid lines and broken lines in FIG. 6, respectively. Note that t is time. The straight lines Lb and Lr each have a frequency F. b and F. It intersects the horizontal axis of frequency f at r. Also, Fbe is a bell-shaped filter 3
is the center frequency of In this way, the output blue difference discrimination signal 1b and red difference discrimination signal r obtained from the adder circuit 17 are obtained as shown by the broken line and the solid line, respectively. In addition, the signals 1b and r shown by the adjacent broken lines and solid lines in the figure are at the same level, but are shown shifted slightly for ease of understanding. These signals Ib and Ir appear above and below the reference level E1 every horizontal period. Next, referring to FIG. 7, the relationship between the outputs of the first and second demodulation circuits 6 and 7 and the output of the addition circuit 17 is illustrated.

FIG. 7A shows the waveform of the output of the second demodulation circuit 7;
Figure B shows the waveform of the demodulated output of the first demodulating circuit 6;
FIG. C shows the waveform of the output of the adder circuit 17. Here, HD is a horizontal synchronization signal. In FIG. 7A, color discrimination signals 1r and Ib appear alternately every horizontal period after the horizontal synchronizing signal. On the other hand, in FIG. 7B, the horizontal synchronizing signal H
Immediately after D, color discrimination signals 1b and Ir are obtained alternately. Then, in FIG. 7C, the respective color discrimination signals 1r and Ib are added. Note that the level of each color difference signal differs depending on each color as shown in the figure. Next, another example of the color discrimination signal detection circuit 13 in the color signal demodulation circuit shown in FIG. 4 will be described with reference to FIG.

In FIG. 8, parts corresponding to those in FIG. 5 and the like are designated by the same reference numerals, and redundant explanation will be omitted. The output from the adder circuit 17 in FIG. 4 described above is supplied to the input terminal 20 to the limiter amplifier circuit 21. The output from the limiter amplifier circuit 21 is then supplied to the sampling circuit 30.
A horizontal pulse Ph from the input terminal 11 is supplied to this sampling circuit 30 as a sampling signal. The output of the sampling circuit 30 (see FIG. 3F) is supplied to an integrating circuit 31 and integrated, and the output side is supplied with the color discrimination signal 1b, which has a different level for each horizontal period as explained in connection with FIG. An average value E1 of Ir is obtained. 34 is a circuit for sampling the color discrimination signals 1r and Ib.

This constitutes a differential amplifier circuit having a limiter function, and constitutes a constant current circuit 40 connected to the transistors 35 and 36 and their respective emitters, and an active load circuit connected to the collector sides of the transistors 35 and 36. It is composed of a current mirror circuit 37. The current mirror circuit 37 is composed of a transistor 39 and a diode 38, which have a different conductivity type from the transistors 35 and 36. +B is a power supply. The output of the above-mentioned integrating circuit 31 is applied to the base of the transistor 35 as a reference voltage. On the other hand, the output of the limiter amplifier circuit 21, that is, the amplitude-limited output of the adder circuit 17 is supplied to the base of the transistor 36. Further, an on/off switch 41 is provided on the emitter side of the transistors 35 and 36, and the output Q of the flip-flop circuit 15 is supplied to a differentiating circuit 32 and differentiated, and the differentiated pulse (FIG. 3G) is provided.
) is supplied to this changeover switch 41 as a changeover control signal. The output from this sampling circuit 34 is supplied to a hold circuit 42. The hold circuit 42 includes a hold capacitor 43 and a discharge switching transistor 50, and the transistor 50 is connected to the capacitor 43 in parallel. The output of this hold circuit 42 is then supplied to a comparison circuit 46 having a differential amplifier circuit configuration. Note that the output Q from the flip-flop circuit 15 is supplied to the base of the switching transistor 50 through an AND circuit 51, and when a pulse signal is supplied to the input terminal 52, the AND output causes the transistor 5 to
0 is temporarily turned on. Comparison circuit 46 includes transistors 47 and 48 and constant current circuit 4
It consists of 9. The output of the hold circuit 42 is supplied to the base of a transistor 47, the base of which is connected to the cathode of a diode 44, the anode of which is connected to the positive electrode of a reference DC power source 45, and the negative electrode of which is grounded. The reference voltage of this reference DC power supply 45 is assumed to be E2. A voltage E2 at the midpoint of the connection between the diode 44 and the reference DC power supply 45 is supplied to the base of the transistor 48 as a reference voltage. The correction signal thus obtained from the collectors of transistors 47 and 48 of this comparison circuit 46 is supplied to the above-mentioned flip-flop circuit 15. For example, if the current switching phase is correct, the level of the color discrimination signal 1b is lower than the average value E of the color discrimination signal 1b and Ir at the time when the switching control signal is supplied to the changeover switch 41, so the transistor 36 is turned off. Although the collector potential rises, the output of the hold circuit 42 also rises and becomes higher than the reference voltage E2, so the transistor 47 of the comparison circuit 46 is turned on, the transistor 48 is turned off, and no correction pulse is supplied to the flip-flop circuit 15.

Next, when the switching phase is incorrect, the color discrimination signal 1r is gated, so that the voltage supplied to the base of the transistor 36 during the sampling period becomes higher than the average value E1, and the transistor 36 is turned on, thereby causing the hold circuit 4
Since the output of transistor 2 is reduced, transistor 47 is turned off and transistor 48 is turned on, a correction pulse is provided to flip-flop circuit 15 to correct the switching phase. Further, the output of the limiter amplifier circuit 21 is supplied to the sample hold circuit 33, and the output thereof is supplied to the color killer circuit 14.
The signal is supplied to the level comparison circuit 14'. Note that the sampling pulses supplied to the sample hold circuit 33 are supplied from the differential converter 32. Further, the output voltage E1 from the integrating circuit 31 is supplied to the comparison circuit 14' of the color killer circuit 14 as a reference voltage. Figure 9 shows the characteristics of the output current 1 from the sampling circuit 34 according to the electric field strength. When the electric field strength is weak, the current 1 changes within the range shown by the diagonal line, and when the electric field strength is large, the limiter function The current is I.

It becomes constant as follows. On the other hand, FIG. 10 shows the characteristics of the electric field strength with respect to the voltage at the base of the transistor 47 of the comparator circuit 46. When the electric field strength is weak, the voltage changes in the diagonally shaded area surrounded by the solid line, and the electric field strength is large. Then, the voltage becomes constant at E2-Vd.

Vd is the forward voltage drop of the diode 44. Note that even if the electric field strength is small, it will not fall below the lower limit voltage E2-Vd. Further, even if the electric field strength is small, the upper limit voltage will not exceed E2. Here, the diode 44 can be replaced with a resistor, but in that case, the change in the base voltage of the transistor 47 depending on whether the electric field strength is high or low will change as shown in the hatched area surrounded by the dashed-dotted curve. , when the electric field strength is extremely low, it may even exceed the upper limit voltage E2. The lower limit voltage is E2-10'R, where 10 is the current shown in FIG. 9 above. and
R is the resistance value of the resistor. Furthermore, since the color discrimination signal detection circuit 13 shown in FIG. Although the amount of fluctuation in the voltage supplied to the hold capacitor 43 is suppressed and becomes difficult to exceed E2,
This becomes even more effective when the diode 44 mentioned above is present.

Therefore, by doing this, there is no possibility that the color discrimination signal will be disturbed by noise. Therefore, there is no possibility that the switching circuit 5 will be switched erroneously in a weak electric field. According to the present invention described above, it is possible to simplify the configuration and take correspondence between the deterioration of the demodulated color difference signal output and the error rate of the color discrimination signal in the case of a weak electric field.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing a color signal demodulation circuit of a conventional SECAM color television receiver, Fig. 2 is a block diagram showing an example of the present invention, and Fig. 3 is a waveform for explaining the same. 4 is a block diagram showing another practical example of the present invention, FIG. 5 is a block diagram showing a part of FIG. 4,
Figure 6 is a curve diagram for explaining the actual example of Figure 4, Figure 7 is a waveform diagram for explaining the actual example of Figure 4, and Figure 8 is a waveform diagram for explaining the actual example of Figure 4.
Block diagrams showing other examples of parts of the diagrams, Figures 9 and 1
Figure 0 is a characteristic curve diagram. 4 is a delay element having a delay amount of one horizontal period, 5 is a switching circuit, 6 is a first demodulation circuit, 7 is a second demodulation circuit, 10 is a switching control circuit, 13 is a color discrimination signal detection circuit, and 14 is a Color killer circuit 15 is a flip-flop circuit.

Claims (1)

[Claims] 1 A switching circuit alternately switches between a chromaticity signal included in a SECAM system composite color video signal and a signal obtained by delaying the chromaticity signal by one horizontal period, thereby generating first and second demodulation circuits each consisting of a frequency discrimination circuit. In a color signal demodulation circuit of a SECAM type color television receiver, which supplies first and second color signals to the receiver, the switching circuit is in a first switching state, in which one horizontal period of the chromaticity signal and this A switching control circuit is provided for controlling such that the color discrimination signal period of the chromaticity signal subsequent to the chromaticity signal is selected, and the chrominance signal period of the subsequent chromaticity signal is selected in the second switching state, detecting color discrimination signals having different levels alternately every horizontal period from color signals from at least one demodulation circuit of the demodulation circuit;
These color discrimination signals are supplied to an integrating circuit to obtain a reference voltage having an average value of the color discrimination signal having one level and the color discrimination signal having the other level, and the reference voltage and the color discrimination signal are The polarity of the color discrimination signal is determined by comparing the levels of the color discrimination signal, and based on the discrimination output, it is detected whether the switching phase of the switching circuit is correct or incorrect, and if the switching phase is incorrect, the switching state of the switching circuit is determined. A color signal demodulation circuit for a SECAM color television receiver, characterized by inverting the color signal.