JPS5923380A - Display control system - Google Patents

Display control system

Info

Publication number
JPS5923380A
JPS5923380A JP57132565A JP13256582A JPS5923380A JP S5923380 A JPS5923380 A JP S5923380A JP 57132565 A JP57132565 A JP 57132565A JP 13256582 A JP13256582 A JP 13256582A JP S5923380 A JPS5923380 A JP S5923380A
Authority
JP
Japan
Prior art keywords
character
priority
buffer
display
sentences
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57132565A
Other languages
Japanese (ja)
Inventor
生田 祐吉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57132565A priority Critical patent/JPS5923380A/en
Publication of JPS5923380A publication Critical patent/JPS5923380A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (a)  発明の技術分野 本発明は複数の文章をう′イスプレー表示面の指定場1
5iに表示するディスグレー装置に係シ、特に該複数の
文章が重質して表示される場合の制御方式に関する。
Detailed Description of the Invention (a) Technical Field of the Invention The present invention provides a designated field 1 on a display screen for displaying multiple sentences.
The present invention relates to a display gray display device displayed on a 5i, and particularly to a control method when a plurality of sentences are displayed in a heavy manner.

(b)  従来技術と問題点 ディスプレー表示面に文章を表示する場合、ディスプレ
ーi Yi!ii面に同時VC楓数の文章を表示したい
という要望がある。第1図は複数の文章を表示した例を
示す。ディスプレー表示面1に文章1と文章2及び文章
3が表示されている。これは紙にiシいた文章を机の上
に何枚か置いて文章を作成す   ′るイメージをディ
スプレー装置を用いて牧わしていることになる。第1図
の表示を実現する従来技術の例を第2図に示す。第2図
はディスプレー装置の回路のブロック図でちる。プロセ
ッサ2はディスプレー装置全体の動作を制御する。メモ
リ3にtJ、 7 Dセッサ2の動作を制御するグログ
ンムと第1図に示す如き表示データが格納されている。
(b) Prior art and problems When displaying text on the display screen, display i Yi! There is a request to display the text of the number of simultaneous VC Kaede on the ii side. FIG. 1 shows an example of displaying a plurality of sentences. Sentence 1, Sentence 2, and Sentence 3 are displayed on display surface 1. This means using a display device to create an image of writing sentences on paper and placing them on a desk. FIG. 2 shows an example of a conventional technique for realizing the display shown in FIG. FIG. 2 is a block diagram of the circuit of the display device. Processor 2 controls the operation of the entire display device. The memory 3 stores a groogram for controlling the operation of the tJ, 7D processor 2 and display data as shown in FIG.

プロセッサ2はマルチプレクサ5を切替えてアドレスパ
スA BUSを文字バッファ6に接続し、メモリ3よシ
データパスDBUSを経て文字バッフ76に1画面分の
データを格納する。プロセッサ2はマルチプレクサ5を
切替えて制御部4の文字バッファアドレスMAを文字バ
ッファ6に接続し、制御部4に界示部6に対する文字の
表示を行なわせる。制御部4は文字発生回路7に行ア、
ドレスRAを、ビデオ制御部9に水平垂直同期信号VS
を送出して、文字バッファ6よシ送出されるディスプレ
ー1画面の文字コードCDと、該文字コードCDと行ア
ドレスRAとによシ文字発生回路7より送出される文字
のドツトパターンを並直変換回路8によυ直列信号・と
じてビデオ制御部9に送シ、水平垂直同期信号■Sに同
期して文字パダーンのドットデーダを表示部10 KN
示させる。
Processor 2 switches multiplexer 5 to connect address path ABUS to character buffer 6, and stores data for one screen in character buffer 76 via memory 3 and data path DBUS. Processor 2 switches multiplexer 5 to connect character buffer address MA of control section 4 to character buffer 6, and causes control section 4 to display characters on indicator section 6. The control unit 4 sends the character generation circuit 7 to line a,
The address RA is sent to the video control unit 9 as a horizontal and vertical synchronizing signal VS.
The character code CD of one display screen sent from the character buffer 6 and the dot pattern of the character sent from the character generation circuit 7 are converted from parallel to serial using the character code CD and the line address RA. The circuit 8 sends the υ serial signal to the video control section 9, and in synchronization with the horizontal and vertical synchronizing signal ■S, the dot data of the character padding is sent to the display section 10 KN.
Let me show you.

第3図はディスプレー1画面の構成例を示す。FIG. 3 shows an example of the configuration of one screen of the display.

本例は一行80文字、25行で1から2000迄即第3
図の画面内の各文字に対応する文字コードを記憶してお
シ、文字としてEBCDICコードを用いると一文字は
8ビツトのコードで表わされるため、文字バッファ6の
容量は8ピツ)X2000である。
In this example, 80 characters per line, 25 lines, 1 to 2000, immediately 3rd
The character code corresponding to each character on the screen shown in the figure is stored. If an EBCDIC code is used as a character, one character is represented by an 8-bit code, so the capacity of the character buffer 6 is 8 bits) x 2000.

第5図は文字パターンを説明する図である。ここでは−
文字分の文字パターンは8×8ドツトで表わされるもの
とする。文字発生回路7は文字バッファ6よシの文字コ
ードCD及び各文字パターンの行アドレスRAによシア
ドレスされ、文字発生回路7より文字パターンの横一列
8ビツトのデータが同時に読出される。
FIG. 5 is a diagram illustrating character patterns. Here -
It is assumed that the character pattern for each character is represented by 8×8 dots. The character generation circuit 7 is addressed by the character code CD of the character buffer 6 and the row address RA of each character pattern, and 8-bit data in one horizontal row of the character pattern is simultaneously read out from the character generation circuit 7.

上記の如き従来のディスプレー装置を用いて第111f
’lK示す如き画像を表示するための分割画面制御を行
なうと、プロセッサ2は文章lと文章3はメモリ3にあ
る文章データをディスプレー表示面1の位置に対応する
文字バッフ76のアドレスに書込む。文章2は一部が文
′:N1の下にあるためプロセッサ2の10グラムでコ
)tηυ合いを求め、文章20重なっていない部分のみ
を求めて文字バッファ6に1込む。従って表示する文章
の数が増加すると賞なp合いの計算扛大変になシ、ディ
スプレー装置の性能を低下させる欠点がある。
111f using the conventional display device as described above.
When performing split screen control to display an image as shown in 'lK, the processor 2 writes the text data for text l and text 3 in the memory 3 to the address of the character buffer 76 corresponding to the position on the display surface 1. . Since a part of sentence 2 is under sentence ':N1, the processor 2 uses 10 grams to find the tηυ match, finds only the parts of sentence 20 that do not overlap, and stores 1 in the character buffer 6. Therefore, as the number of sentences to be displayed increases, it becomes difficult to calculate the p-match, which has the drawback of deteriorating the performance of the display device.

(e)  発明の目的 本発明の目的は上記欠点を除くため、プロセッサに文章
の重なシ合いの計qを行なわせず、文字バッファのエン
トリ・に優先順位を設け、文字バッファに新たに文字を
切込む時、文字バッファのエントリの使先順位と新たK
m込む文字の優先順位とを比較して、新たKm込む文字
の優先度が大きいか等しい時に文字パッンアに’rIJ
込んでデータ更新をし、l」・さい時は書込みを行なわ
せずデータ史1iをしないようにして、プロセッサの負
担を軽くしたディスプレー制御方式を提供することにあ
る。
(e) Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks by not making the processor calculate overlapping sentences, but by giving priority to the entries in the character buffer, and adding new characters to the character buffer. When cutting, the usage order of character buffer entries and new K
Compare the priority of the new character with the priority of the new character, and when the priority of the new character is greater or equal, the character is assigned 'rIJ'.
The purpose of the present invention is to provide a display control method that lightens the burden on a processor by updating data in a timely manner, and not writing data and not performing a data history 1i when it is too late.

(d)  発明の構成 本発明の構成は複数の文j?Cをディスプレー表示面の
指定場所に表示するディスプレー装置に於て、表示する
文章間で優先順位を定め、該優先順位に従って文字バッ
ファの各エントリに優先順位を設け、該文字バッファに
新たに文字を書込む時、文字バッファのエントリの優先
順位と該新たに書込む文字の読出された文章の優先順位
とを比較し、肋たに曹込む文字の優先JA位が等しいか
高い場合、文字バッファに17込みを行ない、低い揚台
は書込みを行なわず、元の文字をその才\残すように制
御し、且つ新たに書込む文字の使先順位がノ投低の場合
は前記文字バッファのエントリの優先)11乏位に無関
係に祐込み可能としたものである。
(d) Composition of the invention Is the composition of the present invention composed of multiple sentences j? In a display device that displays C at a specified location on the display surface, a priority order is determined between sentences to be displayed, a priority order is set for each entry in a character buffer according to the priority order, and a new character is added to the character buffer. When writing, compare the priority of the entry in the character buffer with the priority of the read text of the character to be newly written, and if the priority JA rank of the character to be written in the rib is equal or higher, the priority of the entry in the character buffer is 17 is written, the lower platform is not written, the original character is controlled to remain, and if the usage order of the newly written character is no throw low, the entry of the character buffer is (Priority) 11 It is possible to enter into the 11th grade regardless of the rank.

(e)  範明の実施し1] 第6図をよ本発明の一実施例を示す回路図である。(e) Implementation of scope 1] FIG. 6 is a circuit diagram showing an embodiment of the present invention.

本発明は第2図の文字バッファ6に文字を嵌わすコード
8ビツトの外にエントリの優先順位2示す3ビツトのl
)X部を設ける。従って文字バッファ6は第4図と異な
シ容2−は11ビツトX2000となる。又文字バッフ
ァのアドレスを一時格納するレジスタ12とメモリ3よ
りの表示データを一時格納するレジスタ11と文章の優
先順位を比較する比較器13とを設ける。レジスタ11
は文字コード8ビツトと文章の優先度を衣わす3ピツト
のPY部とを持つ11ピツトのレジスタでわる0本実施
例では文章の優先度を8レベルとしたが優先度を表わす
ピット数により、そのレベル数を変えることか可能であ
る。プロセッサ2によシ文字バッファ6に書込む文字の
アドレスがレジスタ12にセラトチれ、その文字がレジ
スタ11にセットされると、レジスタ12のアドレスV
こよシ指示された文字バッファ6のコードと該文字の優
先度を示すPXと1cm出し、その中のPXを比較器1
3に加える。同時にレジスタ11のPYも読出し比較器
13に加える。この時PY≧l)Xであれ(は比較器1
3をよ文字バッフ76を弁込みBJ能としてレジスタ1
1のコードとPYのデータを文字バッファ6に書込んで
データの更新を笑行する。py<pxの場合は文字バッ
ファ6の畳込みを不可としてデータの更新は行なわない
。但しPYが0で最低のレベルを示している3j+合の
み文字バッファ6の書込みを可能止してデータの更a1
を行なう。これは文字バッファ6のクリアをする場合シ
て必要な動作である。尚文章の優先順位は予めメモリ3
に曹込む際に定められる。
In addition to the 8-bit code for fitting a character into the character buffer 6 shown in FIG.
) Provide an X section. Therefore, the character buffer 6 has a different content 2- from that in FIG. 4, which is 11 bits x 2000. Also provided are a register 12 for temporarily storing the address of a character buffer, a register 11 for temporarily storing display data from the memory 3, and a comparator 13 for comparing the priorities of sentences. register 11
is an 11-pit register with an 8-bit character code and a 3-pit PY section that determines the priority of the text. In this example, the priority of the text is set to 8 levels, but depending on the number of pits representing the priority, It is possible to change the number of levels. When the address of the character to be written into the character buffer 6 by the processor 2 is set in the register 12 and that character is set in the register 11, the address V of the register 12 is set.
The code of the character buffer 6 specified by Koyoshi and the PX indicating the priority of the character are output for 1 cm, and the PX therein is sent to the comparator 1.
Add to 3. At the same time, PY in register 11 is also added to read comparator 13. At this time, if PY≧l)X, (is comparator 1
3 and character buffer 76 as register 1 as BJ function
The code 1 and the data PY are written to the character buffer 6 and the data is updated. If py<px, convolution of the character buffer 6 is disabled and data is not updated. However, only when PY is 3j+, which is 0 and indicates the lowest level, writing to character buffer 6 is enabled and data is changed a1.
Do this. This is a necessary operation when clearing the character buffer 6. The text priority is set to memory 3 in advance.
It is determined when the

(f)  発明の詳細 な説明した如く本発明tユ予め表示する文章の優先度を
定めておけIrX 7’ロセツサが文章の重なp合いを
aF算する必要はなく、文字バッファに9!込む際比較
器による優先度の比較を行なうだけで重なシエ合をハー
ドにより判定し得るため、プロセッサの負相′?L軽く
しディスプレー装置の処理能力つ(下を防止することが
出来る。
(f) As described in the detailed description of the invention, the present invention allows the priority of the displayed sentences to be determined in advance, so that there is no need for the IrX 7' processor to calculate the number of overlapping sentences, and the 9! Since overlapping combinations can be determined by hardware simply by comparing priorities using a comparator, the processor's negative phase '? It is possible to reduce the processing power of the display device by reducing the L value.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は複数の文章の表示り」を示す図、i1’(2図
はディスプレー装置0回路のプロ、り図、第3図はグイ
スプレー1両面の構成例を示す図、第4図は第3図の1
画面分を格納する文字バッファの構成例を示す図、第5
図は文字パターンを説明する図、第(1図は本発明の一
実旅例を示す回路図である。 1はディスプレー咲示面、2はプロセッサ、3はメモリ
、4は制御部、51−.1.’マルチプレクサ、6は文
字バッファ、7ti文字発生回路、8は並直変換回路、
9(dビデオ制御部、10は表示部、11112はレジ
スタ、13は比411<器である。 第1図 ¥−2図 第4図       第5図
Fig. 1 is a diagram showing the display of multiple sentences, i1' (Fig. 2 is a diagram showing the configuration of the display device 0 circuit, Fig. 3 is a diagram showing an example of the configuration of both sides of the display device 1, and Fig. 4 is Figure 3 1
Figure 5 shows an example of the configuration of a character buffer that stores a screen worth of data.
1 is a circuit diagram showing an example of the present invention. 1 is a display screen, 2 is a processor, 3 is a memory, 4 is a control unit, and 51- .1.'Multiplexer, 6 is a character buffer, 7ti character generation circuit, 8 is a parallel-to-serial conversion circuit,
9 (d video control section, 10 is a display section, 11112 is a register, 13 is a ratio device.

Claims (1)

【特許請求の範囲】[Claims] 複数の文章をディスグレー表示面の指定、liI所に表
示するディスプレー装置に於て、表示する文章間で優先
順位゛を定め、該優先順位に従って文字パッンアの各エ
ントリに優先順位を設け、該文字バッファにHAたに文
字を臀込む時、文字バッファのエントリの優先順位と該
新たに書込む文字の読出された文章の優先順位とを比較
し、新たに省込む文字の優先順位が等しいか高い場合、
文字バッファに書込みを行ない、低い場合は書込みを行
なわず、元の文字−をその1ま残すように制御し、且つ
新たに書込む文字の優先順位が最低の場合は前記文字バ
ッファのエントリの優−[位に無関係に1込み可能とす
ることを特徴とするゲイスプレー制御方式。
In a display device that displays multiple sentences on a gray display surface, a priority order is determined among the sentences to be displayed, and a priority order is set for each entry in the character pana according to the priority order. When adding characters to the buffer, the priority of the entry in the character buffer is compared with the priority of the read text of the newly written character, and the priority of the newly written character is equal or higher. case,
Write to the character buffer, and if the priority is low, do not write and control to leave the original character as it is, and if the priority of the new character to be written is the lowest, the priority of the entry in the character buffer is - [Gay play control system characterized by allowing 1 inclusion regardless of the position.
JP57132565A 1982-07-29 1982-07-29 Display control system Pending JPS5923380A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57132565A JPS5923380A (en) 1982-07-29 1982-07-29 Display control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57132565A JPS5923380A (en) 1982-07-29 1982-07-29 Display control system

Publications (1)

Publication Number Publication Date
JPS5923380A true JPS5923380A (en) 1984-02-06

Family

ID=15084270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57132565A Pending JPS5923380A (en) 1982-07-29 1982-07-29 Display control system

Country Status (1)

Country Link
JP (1) JPS5923380A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60173588A (en) * 1984-02-20 1985-09-06 株式会社リコー Multiwindow display processing system
JPS61258289A (en) * 1985-05-13 1986-11-15 キヤノン株式会社 Image processor
US4794255A (en) * 1985-11-27 1988-12-27 Horiba, Ltd. Absorption analyzer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60173588A (en) * 1984-02-20 1985-09-06 株式会社リコー Multiwindow display processing system
JPS61258289A (en) * 1985-05-13 1986-11-15 キヤノン株式会社 Image processor
US4794255A (en) * 1985-11-27 1988-12-27 Horiba, Ltd. Absorption analyzer

Similar Documents

Publication Publication Date Title
US4803478A (en) Horizontal scroll method and apparatus
JPS5923380A (en) Display control system
US4755814A (en) Attribute control method and apparatus
JPS5872989A (en) Display font formation system
KR900007186A (en) Device for quickly clearing the output display of a computer system
JP2737898B2 (en) Vector drawing equipment
JPS60227292A (en) Frame buffer memory writing system
JPS6184687A (en) Display unit
JPS62127790A (en) Multiwindow display control system
JPS59177594A (en) Display memory control system
JPS62145280A (en) Display modification control system for bit map display
JPS6011887A (en) Character pattern reading system
JPS59197083A (en) Crt display unit
JPS5915287A (en) Display unit
JPH043874B2 (en)
JPS6041091A (en) Display modification control system
JPS60107694A (en) Character/graphic display unit
JPS6159484A (en) Segment control system
JPS61174591A (en) Graphic display unit
JPS62258495A (en) Character generator
JP2000214815A (en) Display controller and program recording medium thereof
JPS61223787A (en) Document generator
JPS6134151B2 (en)
JPS6275592A (en) Double angle character display unit
JPS63101898A (en) Liquid crystal display control circuit