JPS59231962A - Voice storage device - Google Patents

Abstract

PURPOSE:To transmit a pleasant reproduced voice signal to the user without use of a specific circuit by erasing a control signal written in a temporary storage means together with a voice signal from the temporary storage means retroactively by the share of a delay for identifying time of a detection circuit. CONSTITUTION:The voice signal transmitted from a telephone set 2 accommodated in an exchange 1 is added to a voice storage device 10 via a telephone line 3, converted into a digital voice signal by an A/D converting circuit 10 of the device 10 and written in a voice buffer memory 101. The voice signal stored temporarily in the memory 101 is stored sequentially in a memory 102 according to the operation of a main memory 102. In using a push-button (PB) signal from the telephone set 2, the PB signal inputted to the device 10 is identified by a PB signal detecting circuit 103 and inputted to a voice buffer memory control circuit 108. Further, an address counter 104, an address register 105, a subtraction circuit 106, and a delay time setting circuit 107 give a prescribed time of delay to the control signal from the circuit 108 so as to control the read of the memory 101.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an audio storage device that stores and reproduces audio signals using control signals within the audio band from terminal equipment via a communication line such as a telephone line.

Normally, when controlling the storage and playback of audio signals for this type of audio storage device remotely from a terminal device such as a regular telephone via a telephone line, a specific control signal within the audio band is used. On the receiving side where the storage device is installed, it is necessary to use a bandpass filter or the like to identify the control signal transmitted together with the audio signal to be stored.

Here, a push button (PB) signal is often used as a control signal within the audio band sent from a terminal device, but a general PB signal reception detection circuit has a certain degree of detection when identifying this PB double signal. There will be a time delay. For example, the time taken until the PB double signal detection circuit for temporary stop control during audio signal accumulation is identified is stored in the audio storage device as part of the audio signal. Therefore, the user who listens to the PB double signal for control during reproduction hears the signal even though it is unnecessary, giving a feeling of discomfort. In order to avoid this problem, it is possible to shorten the identification time of the detection circuit, but if the identification time is made too short, the sound to be stored (ilj
This causes malfunction of the PB signal detection circuit. Furthermore, although it is possible to increase the identification accuracy and shorten the identification time, it is inevitable that the detection circuit will become more complicated and the cost will increase.

An object of the present invention is to, when a detection circuit identifies an audio in-band control signal that controls the operation of an audio storage device, transfer the control signal written in a temporary storage means together with the audio signal by an amount corresponding to the identification time delay of the detection circuit. This provides an audio storage device that can solve the above-mentioned problems by deleting the data from the temporary storage means.

The present invention provides an audio storage device that stores audio signals in a main storage means using an audio in-band control signal transmitted from a remotely located terminal device via a communication line, and reproduces the stored audio signal using the control signal. °C1 A detection means for delay-identifying the control signal from the terminal device, and temporarily storing an audio signal from the terminal device and the control signal that follows the audio signal and corresponds to the delay identification time of the detection means. temporary storage means; address counting means for specifying a read address of the temporary storage means; and address counting means for subtracting an address value corresponding to the delay identification time of the detection means from the read address specified by the address counting means. and subtracting means for correcting the read address designated by , and storing only the audio signal from the temporary storage means to the main storage means.

Embodiments of the present invention will be described below with reference to one drawing.

FIG. 1 is a block diagram showing an embodiment of the audio storage device according to the present invention. Referring to the figure, a voice signal sent from a telephone 2 housed in an exchange 1 and arriving at a voice storage device 10 via a telephone line 3 is converted into a digital voice signal by an analog-to-digital signal conversion circuit 1oo, and the voice signal is The data is written to the buffer memory 101. The audio signals temporarily stored in the audio buffer memory lol are sequentially stored in this memory 1'02 according to the operation of the main memory 102. In the case of reproducing the stored audio signals, the process is completely reversed to that described above, and the audio signals are sent to the telephone set 2 and listened to by the user.

When using the PB signal sent from the telephone 2 as a control signal for the voice storage device that performs the basic operations as described above,
Like this control PB double signal audio signal, it is input to the audio storage device 10 via the telephone line 3. The input PB flaw signal is identified by the PB signal detection circuit 103. Based on the identified control signal, operations such as audio storage and playback, starting and ending thereof, etc. are controlled. While the audio signal is being stored as described above, when the control PB multiplied signal is input to the PB signal detection circuit 103 as a PB flaw signal following the audio signal, such as an audio storage pause signal or an audio storage end signal, this The detection circuit identifies this and sends an identification signal to the audio buffer memory control circuit 108, but the delay in the identification operation of the PB signal detection circuit 103 is stored together with the control PB double signal audio signal, and the user cannot listen to it during playback. will be done.

In the embodiment of the present invention, the above-mentioned problem can be avoided in the following manner. Analog-digital signal conversion circuit 100
The digitally converted audio signal is stored in audio buffer memory 1.
01, but this buffer memory 10
1 is used by dividing the whole into two parts. For example, when the storage area for shearing is used to store audio signals at a certain point, the storage area in the second half is used as a main memo for the audio signals that have already been stored! J10
2 is used for reading to the main memory 102. Therefore, buffer memo IJ 1
01 performs the temporary storage and readout operation of the audio signal by alternately using the storage area, and the audio signal is continuously stored in the main memo I.
It is stored in J102. This means that buffer memory 1
By the time the audio signals input to 01 are completely stored in the main memory 102, there will always be empty time in which half of the storage area of the buffer memory 101 will be filled with the audio signals. When the voice signal arrives via the control PB double signal telephone line 3 for temporarily stopping voice storage, the PBB signal detection circuit 103 identifies and judges this, and sends the recognition result to the voice buffer memory control circuit 108. . When the audio buffer memory control circuit 108 identifies this as a request to temporarily stop the audio storage operation, it stops the counting operation of the audio buffer memory address counter 104 and at the same time stops the address counter 104 from outputting. The address value is temporarily stored in the address register 105. The subsequent operation will be explained with reference to FIG.
Since the address value of is updated sequentially, this value is shown as an increasing slope in FIG. This counter value is, for example, an 8-bit parallel storage audio buffer memo IJ 101 and a digital audio signal of 64
If Kbit/sec, then 8' bits per g KHz period, or 125 μSec.
The counter value is also 1 because the voice information of
It is updated once every 25 μsec. Now, the address value temporarily stored in the address register 105 mentioned above is not the value that has started to be input for the audio accumulation pause signal in FIG. This is the value of B at the time when time a has elapsed. If the 1PB signal identification delay time a is 20 m sec, the counter value is 20 m sec ÷ 125μ5e
c=160 In other words, the count has advanced by 160, resulting in 'C'. Therefore, if the stored audio signal is reproduced without any further operation, the address value of the address ρ counter 104 will follow the process shown by the dotted chain line in FIG. control P
Since the B-fold signal is stored in the main memory 102 with the B-fold signal mixed therein, it is output together with the control PB-fold signal reproduction audio signal. However, in this embodiment, the counter value stored in the address register 105 is used as input information for one side of the subtraction circuit 106, and the counter value "X160" corresponding to the above-mentioned PB signal identification delay time period is input to the other side. It is output from the time setting circuit 107.The subtraction circuit 106 subtracts the value set by the delay time setting circuit 107 from the address value of the address register 105, and as a result, the address counter value of A in FIG. It is output to the counter setting manual of the buffer memory address counter 104.The audio buffer memory control circuit 108 outputs it to the subtraction circuit 1.
By setting the calculation result of 06 in the address counter 104, the address value of the address counter 104 becomes the control FB double signal audio buffer memo! The address value is changed to the address value immediately before writing to 7101 begins.

Therefore, the stored contents of the audio backup memory 101 between addresses A and B where the PB double signal is stored will be rewritten with a new audio signal the next time the storage is resumed, and the control PB double signal will be erased. . Thereby, even if the stored audio signal is reproduced, unnecessary control PB double signal users can be prevented from listening to it.

In the above embodiment, a case has been described in which the audio signal and the control PB double signal are inputted in analog format via a telephone line, but the same implementation can basically be achieved even if these signals are inputted as digital signals. Furthermore, voice storage and playback operations can be similarly controlled from various terminal devices using not only telephone lines but other communication lines.

As explained above, according to the present invention, when remotely controlling the storage and playback operation of audio signals from a terminal device accommodated in a communication line to an audio storage device using an audio in-band control signal, the control signal detection circuit is identified. Accumulation of unnecessary control signals during the delay time can be prevented without using a specially designed control signal oscillation circuit and reception circuit.

Therefore, the user can listen to and speak comfortably reproduced audio signals with an economical device configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the audio storage device according to the present invention, and FIG. 2 is an explanatory diagram of the operation of the same embodiment. 1... Switchboard, 2... Telephone, 3...
...Telephone line, 10゛・°・°゛Voice storage device, 1
01-°=Audio buffer memory, 102・°゛...°Main memo 1c 103...PB signal detection circuit, 1o
4...Address counter, 1o5...
Address register, 1o6... Subtraction circuit, 10
7...Delay time setting circuit, 108...
Audio buffer memory control circuit. +1--4 8th class i-senior

Claims (1)

[Claims] In an audio storage device that stores an audio signal in a main storage means based on an audio in-band control signal transmitted from a remotely located terminal device via a communication line, and reproduces the stored audio signal using the control signal, and temporary storage means for temporarily storing the control signal corresponding to the delay identification time of the detection means; address counting means for specifying a read address of the temporary storage means; subtracting means for correcting the read address specified by the address counting means by subtracting an address value corresponding to the delay identification time of the detection means, and storing only the audio signal from the temporary storage means to the main storage means. A voice storage device characterized by: