JPS60136464A - Control system for pb signal erasure - Google Patents

Control system for pb signal erasure

Info

Publication number
JPS60136464A
JPS60136464A JP24369283A JP24369283A JPS60136464A JP S60136464 A JPS60136464 A JP S60136464A JP 24369283 A JP24369283 A JP 24369283A JP 24369283 A JP24369283 A JP 24369283A JP S60136464 A JPS60136464 A JP S60136464A
Authority
JP
Japan
Prior art keywords
signal
circuit
data
receiver
converts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24369283A
Other languages
Japanese (ja)
Other versions
JPH0115221B2 (en
Inventor
Minoru Takeno
竹野 実
Takaya Yamamoto
隆哉 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24369283A priority Critical patent/JPS60136464A/en
Publication of JPS60136464A publication Critical patent/JPS60136464A/en
Publication of JPH0115221B2 publication Critical patent/JPH0115221B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/42Systems providing special services or facilities to subscribers
    • H04M3/50Centralised arrangements for answering calls; Centralised arrangements for recording messages for absent or busy subscribers ; Centralised arrangements for recording messages
    • H04M3/53Centralised arrangements for recording incoming messages, i.e. mailbox systems
    • H04M3/533Voice mail systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To prevent storage contents from incorporating a rasping PB signal when reproduced by converting the PB signal into soundless data and storing only speech data in a storage device. CONSTITUTION:An input signal (a) is applied to a muting circuit 1 and a PB signal receiver 6. The PB signal receiver 6 detects the PB signal, and when its detection signal is outputted, the muting circuit 1 converts data inputted during the period of the detection signal into soundless data, which is transferred to a delay circuit 2. A muting circuit 3 converts the PB signal into soundless data because the PB signal in a period corresponding to the nonoperation time of the PB signal receiver 6 is left in the data delayed by the delay circuit 2. Therefore, only a speech signal wherein the PB signal is erased completely is stored in a storage circuit 4.

Description

【発明の詳細な説明】 発明の技術分野 本発明は、蓄積交換システム等に於ける音声蓄積装置に
、不要なPB倍信号押しボタン信号)を消去して音声信
号のみを蓄積できるようにしたPB信号消去制御方式に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention provides a PB system in which unnecessary PB double signals (push button signals) can be erased and only audio signals can be stored in an audio storage device in a store-and-forward system, etc. This relates to a signal erasure control method.

従来技術と問題点 蓄積交換システムに於いては、音声蓄積装置が(1) 設けられ、加入者の要求に応じて音声信号を蓄積し、他
の加入者からの要求によって蓄積内容を再生送出するこ
とができるものである。このような蓄積装置に於いては
、蓄積容量を小さくできるように、無音部分を圧縮し、
更に帯域圧縮手段により蓄積データ量を少なくすること
が採用されている。又交換網の発達により、宅内の各種
装置を宅外から電話機等を利用して制御することが可能
となる。同様に音声蓄積動作中に於いても、PB倍信号
制御信号として利用し、一時停止等の制御が可能となる
。このようなPB倍信号音声信号と共に蓄積されると、
再生音声が耳ざわりなものとなり、更に、再生PB倍信
号制御信号として作用し、思わぬ誤動作を生じる虞れが
ある。
Prior Art and Problems In the store-and-forward system, an audio storage device (1) is provided, which stores audio signals in response to requests from subscribers, and reproduces and transmits the stored contents in response to requests from other subscribers. It is something that can be done. In such a storage device, in order to reduce the storage capacity, silent parts are compressed,
Furthermore, it has been adopted to reduce the amount of stored data by means of band compression means. Furthermore, with the development of switching networks, it has become possible to control various devices in the home from outside the home using a telephone or the like. Similarly, even during audio storage operation, the PB double signal can be used as a control signal to control temporary stop and the like. When accumulated together with such a PB double signal audio signal,
The reproduced sound becomes harsh, and furthermore, it acts as a reproduction PB double signal control signal, which may cause unexpected malfunctions.

発明の目的 本発明は、音声信号蓄積時に不要なPB倍信号消去して
音声信号のみを蓄積できるようにすることを目的とする
ものである。
OBJECTS OF THE INVENTION It is an object of the present invention to erase unnecessary PB times signals when storing audio signals so that only audio signals can be stored.

発明の構成 本発明は、PB信号受信器力(、らのPB倍信号検(2
) 比信号により、受信蓄積データを無音データに変換する
第1の無音化回路と、該第1の無音化回路の出力信号を
前記PB信号受信器の不感動時間に相当する時間遅延さ
せる遅延回路と、該遅延回路の出力信号を前記PB倍信
号検出信号により無音データに変換する第2の無音化回
路とを備え、該第2の無音化回路の出力信号を蓄積装置
に蓄積するものであり、以下実施例について詳細に説明
する。
Structure of the Invention The present invention provides a PB signal receiver power (, PB signal detection (2), etc.
) A first silencing circuit that converts received accumulated data into silent data using a ratio signal, and a delay circuit that delays the output signal of the first silencing circuit by a time corresponding to the dead time of the PB signal receiver. and a second silencing circuit that converts the output signal of the delay circuit into silent data using the PB multiplied signal detection signal, and stores the output signal of the second silencing circuit in a storage device. , Examples will be described in detail below.

発明の実施例 第1図は、本発明の実施例の要部ブロック図であり、1
.3は第1及び第2の無音化回路、2は遅延回路、4は
蓄積回路、5はタイミング制御回路、6はPB信号受信
器、7は蓄積制御回路である。音声蓄積装置がディジタ
ルハイウェイを介して接続されるシステムに於いては、
入力信号aは、例えば、μmβaw等の圧伸則による1
タイムスロフト8ビツトのディジタルデータとなり、第
1の無音化回路1とPB信号受信器6とに加えられる。
Embodiment of the invention FIG. 1 is a block diagram of main parts of an embodiment of the invention.
.. 3 is a first and second silence circuit, 2 is a delay circuit, 4 is an accumulation circuit, 5 is a timing control circuit, 6 is a PB signal receiver, and 7 is an accumulation control circuit. In systems where audio storage devices are connected via a digital highway,
The input signal a is, for example, 1 according to the companding law such as μmβaw.
This becomes 8-bit time loft digital data and is applied to the first silencing circuit 1 and the PB signal receiver 6.

(3) PB信号受信器6は、PB倍信号検出して検出信号すを
第1及び第2の無音化回路1.2及び蓄\積I11御回
路74”力nL・且9受イ言LJ:PBイ8号を2Bコ
ードゴとして蓄積制御回路7に加えるものである。この
場合、音声信号とPB倍信号を識別する為に不感動時間
T(通常は20〜40m5)を有するものであり、検出
信号すはPB倍信号入力されてから不感動時間T後に出
力されるものとなる。又PB倍信号なくなってから僅か
な時間、継続して検出信号すが出力されるものである。
(3) The PB signal receiver 6 detects the PB double signal and sends the detected signal to the first and second silencing circuits 1.2 and the storage/accumulation I11 control circuit 74' output nL and 9 reception signal LJ. : PB I8 is added to the storage control circuit 7 as a 2B code G. In this case, a dead time T (usually 20 to 40 m5) is provided to distinguish between the audio signal and the PB double signal. The detection signal S is outputted after a dead time T after the PB multiplied signal is input. Also, the detection signal S is continuously outputted for a short time after the PB multiplied signal disappears.

 又タイミング制御回路5は、タイムスロットを指定す
るタイミング信号を発生して第1及び第2の無音化回路
L 3に加えるものである。又遅延回路5は、PB信号
受信器6の不感動時間Tに相当する遅延時間を有するも
のである。
The timing control circuit 5 also generates a timing signal specifying a time slot and applies it to the first and second silencing circuits L3. Further, the delay circuit 5 has a delay time corresponding to the dead time T of the PB signal receiver 6.

PB信号受信器6によりPB倍信号検出し、検出信号す
が出力されると、この検出信号すにより第1の無音化回
路1では、その検出信号すの期間に入力されるデータを
無音データに変換して遅延回路2に転送する。第2の無
音化回路3では、遅(4) 延回路2により遅延されたデータの中に、PB信号受信
器6の不感動時間Tに相当する時間のPB倍信号残って
いるので、このPB倍信号無音データに変換する。従っ
て、蓄積回路4には、PB倍信号完全に消去された音声
信号のみが蓄積されることになる。
When the PB signal receiver 6 detects the PB double signal and outputs the detection signal, the first silence circuit 1 converts the data input during the period of the detection signal into silent data. It is converted and transferred to the delay circuit 2. In the second silence circuit 3, the PB signal of the time corresponding to the dead time T of the PB signal receiver 6 remains in the data delayed by the delay circuit 2. Convert to double signal silence data. Therefore, the storage circuit 4 stores only the audio signal from which the PB multiplied signal has been completely erased.

第2図(al〜(elは、第1図の各部の信号a −e
の一例を示すもので、音声の有音データ間にPB倍信号
挿入されて人力され、その人力信号aを(alに示すよ
うにアナログ信号で表すと、PB信号受信器6では、P
B倍信号検出し、不感動時間T後に検出信号すを(bl
に示すように出力し、第1の無音化回路1と第2の無音
化回路3と蓄積制御回路7とに加える。第1の無音化回
路1は、タイミング制御回路5からのタイミング信号に
よりPB倍信号タイムスロットを識別し、検出信号すに
よりそのPB倍信号無音データに変換して出力する。こ
の出力信号Cはfclに示すように、PB信号受信器6
の不感動時間TだけPB倍信号消去されないで残存する
ことになる。
Fig. 2 (al to (el is the signal a - e of each part in Fig. 1)
This is an example of a PB signal inserted between voice data, which is manually input, and when the human input signal a is expressed as an analog signal as shown in (al), the PB signal receiver 6 receives the P
Detect the B-fold signal, and after the dead time T, detect the detection signal (bl
The signal is outputted as shown in FIG. The first silencing circuit 1 identifies the PB double signal time slot based on the timing signal from the timing control circuit 5, converts it into PB double signal silent data based on the detection signal, and outputs the same. This output signal C is transmitted to the PB signal receiver 6 as shown in fcl.
The PB multiplied signal remains without being erased for a dead time T of .

(5) この出力信号Cは、遅延回路2により不感動時間Tに相
当する時間遅延され、その出力信号dは、(d)に示す
ものとなる。従って、残存しているPB倍信号PB信号
受信器6からの検出信号すが存在する期間までに遅延さ
れているので、第2の無音化回路3に於いて残存PB倍
信号無音データに変換されることになり、その出力信号
eは(81に示すものとなる。即ちPB倍信号完全に消
去されることになり、蓄積装置4には音声信号のみが蓄
積されることになる。又PB信号受信器6からのPBコ
ードfは、蓄積制御回路7に加えられ、蓄積動作の一時
停止等の制御が行われる。
(5) This output signal C is delayed by a time corresponding to the dead time T by the delay circuit 2, and the output signal d is as shown in (d). Therefore, since the detection signal from the remaining PB double signal PB signal receiver 6 is delayed by the time it exists, it is converted into the remaining PB double signal silent data in the second silence circuit 3. Therefore, the output signal e will be as shown in (81).In other words, the PB multiplied signal will be completely erased, and only the audio signal will be stored in the storage device 4. The PB code f from the receiver 6 is applied to the accumulation control circuit 7, and controls such as temporary stopping of the accumulation operation are performed.

蓄積袋W4では、無音データを圧縮し、有音データを任
意の圧縮手段により圧縮して蓄積するものである。又要
求により蓄積データを再生して送出するものであり、そ
の送出径路は図示を省略している。
In the storage bag W4, silent data is compressed, and sound data is compressed and stored using an arbitrary compression means. Also, the stored data is reproduced and sent out upon request, and the sending route is not shown.

発明の詳細 な説明したように、本発明は、PB信号受信器6からの
PB倍信号検出信号fにより、受信蓄(6) 積データを無音データに変換する第1の無音化回路1と
、この第1の無音化回路1の出力信号Cを前記PB信号
受信器6の不感動時間Tに相当する時間遅延させる遅延
回路2と、この遅延回路2の出力信号dを前記PB倍信
号検出信号fにより無音データに変換する第2の無音化
回路3とを備えて、この第2の無音化回路3の出力信号
eを蓄積装置4に蓄積するものであり、PB倍信号無音
データに変換することにより、蓄積装置4には音声デー
タのみが蓄積されることになって、蓄積内容を再生した
時、耳ざわりなPB倍信号含まれることがな(、且つ制
御信号として作用する虞れもないことになる。更に、無
音圧縮を行うことが可能となるので、音声データの圧縮
率増加にも寄与することができる。
DETAILED DESCRIPTION OF THE INVENTION As described above, the present invention includes a first silencing circuit 1 that converts received and stored (6) product data into silent data using a PB multiplied signal detection signal f from a PB signal receiver 6; A delay circuit 2 delays the output signal C of the first silencer circuit 1 by a time corresponding to the dead time T of the PB signal receiver 6; It is equipped with a second silencing circuit 3 that converts into silent data by f, and stores the output signal e of this second silencing circuit 3 in a storage device 4, which converts it into PB double signal silent data. As a result, only the audio data is stored in the storage device 4, and when the stored contents are played back, there is no possibility that the unpleasant PB double signal will be included (and there is no risk of it acting as a control signal). Furthermore, since it becomes possible to perform silence compression, it can also contribute to increasing the compression rate of audio data.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例の要部ブロック図、第2図(a
l〜(elは動作説明図である。 1.3は第1及び第2の無音化回路、2は遅延回路、4
は蓄積回路、5はタイミング制御回路、(7) 6はPB信号受信器、7は蓄積制御回路である。 特許出願人 富士通株式会社 代理人弁理士 相 谷 昭 司 代理人弁理士 渡 邊 弘 − (8) ltj D (J t) の
FIG. 1 is a block diagram of the main parts of an embodiment of the present invention, and FIG. 2 (a
l~(el is an explanatory diagram of operation. 1.3 is the first and second silencing circuit, 2 is a delay circuit, 4
5 is an accumulation circuit, 5 is a timing control circuit, (7) 6 is a PB signal receiver, and 7 is an accumulation control circuit. Patent applicant: Fujitsu Ltd. Representative Patent Attorney Shoji Aitani Representative Patent Attorney Hiroshi Watanabe - (8) ltj D (Jt)

Claims (1)

【特許請求の範囲】[Claims] PB信号受信器からのPB倍信号検出信号により、受信
蓄積データを無音データに変換する第1の無音化回路と
、該第1の無音化回路の出力信号を前記PB信号受信器
の不感動時間に相当する時間遅延させる遅延回路と、該
遅延回路の出力信号を前記PB倍信号検出信号により無
音データに変換する第2の無音化回路とを備え、該第2
の無音化回路の出力信号を蓄積装置に蓄積することを特
徴とするPB信号消去制御方式。
A first silencing circuit converts received accumulated data into silent data using a PB double signal detection signal from a PB signal receiver, and an output signal of the first silencing circuit is converted into a dead time of the PB signal receiver. and a second silence circuit that converts the output signal of the delay circuit into silence data using the PB multiplied signal detection signal,
A PB signal erasure control method characterized in that an output signal of a silencing circuit is accumulated in a storage device.
JP24369283A 1983-12-26 1983-12-26 Control system for pb signal erasure Granted JPS60136464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24369283A JPS60136464A (en) 1983-12-26 1983-12-26 Control system for pb signal erasure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24369283A JPS60136464A (en) 1983-12-26 1983-12-26 Control system for pb signal erasure

Publications (2)

Publication Number Publication Date
JPS60136464A true JPS60136464A (en) 1985-07-19
JPH0115221B2 JPH0115221B2 (en) 1989-03-16

Family

ID=17107564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24369283A Granted JPS60136464A (en) 1983-12-26 1983-12-26 Control system for pb signal erasure

Country Status (1)

Country Link
JP (1) JPS60136464A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0341854A (en) * 1989-06-20 1991-02-22 Alcatel Nv Audio message transmitter for automatic exchange
JPH03261263A (en) * 1990-03-12 1991-11-21 Fujitsu Ltd Pb signal mute system in voice mail system
WO2014049996A1 (en) * 2012-09-27 2014-04-03 日本電気株式会社 Dtmf signal stripping device, dtmf signal stripping method, and dtmf signal stripping program

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0341854A (en) * 1989-06-20 1991-02-22 Alcatel Nv Audio message transmitter for automatic exchange
JPH03261263A (en) * 1990-03-12 1991-11-21 Fujitsu Ltd Pb signal mute system in voice mail system
WO2014049996A1 (en) * 2012-09-27 2014-04-03 日本電気株式会社 Dtmf signal stripping device, dtmf signal stripping method, and dtmf signal stripping program
JPWO2014049996A1 (en) * 2012-09-27 2016-08-22 日本電気株式会社 DTMF signal erasing device, DTMF signal erasing method, and DTMF signal erasing program

Also Published As

Publication number Publication date
JPH0115221B2 (en) 1989-03-16

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