JPS59231906A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To attain low noise and broad frequency band by forming a minute voltage signal nearly equal to an input voltage from a signal current flowing to a collector of a differential amplifier transistor(TR) and applying it to a collector of another TR in crossing with level shift. CONSTITUTION:One end of load resistors RL1, RL2 is connected respectively to a collector of the differential amplifier TRsQ1, Q2 via TRsQ3, Q4 of series form. Diodes D1, D3 and D2, D4 of series form are connected in forward direction between the other end of the resistors RL1, RL2 and a power supply voltage Vcc and a constant current source I0 is provided between a common emitter of the TRsQ1, Q2 and ground potential. The minute voltage formed by the D1, D3 and the D2, D4 is given to a base of the TRsQ4, Q3 through Zener diodes DZ1, DZ2. Further, input signals IN(+), IN(-) are impressed to the base of the TRQ1, Q2 so as to form the differential amplifier circuit with low noise and broad frequency band.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a differential amplifier circuit, and, for example, to a technique effective for a differential amplifier circuit with low noise and a wide frequency band.

[Background technology]

For example, in a differential amplifier circuit that amplifies a minute voltage such as a read signal of a magnetic disk memory device, the signal is distorted by noise generated by the base diffusion resistance of the amplification transistor. Therefore, an amplification transistor is used in which the base resistance is made low by forming the emitter and base regions to be large in size. In this case, the inventor's research has revealed that the following problem occurs.

That is, when the large-sized amplification transistor is used, the capacitance value of the parasitic capacitance between the base and the collector increases accordingly. When viewed from the base side of the amplification transistor in an operating state, the capacitance value of the parasitic capacitance is further increased by the Miller effect, resulting in a disadvantage that the cut-off frequency is lowered and the frequency band is narrowed.

[Purpose of the invention]

An object of the present invention is to provide a differential amplifier circuit that achieves low noise and wide frequency band.

The above and other objects and novel features of this invention include:
It will become clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, the signal current flowing through the collector of the differential amplification transistor forms a minute voltage signal that is approximately equal to the input voltage, and the signal is level-shifted and supplied to the collector of the other transistor in a crosswise manner. The base and collector potentials of the transistors are changed in the same phase to eliminate or reduce the parasitic capacitance between the base and collector in terms of circuit operation.

[Embodiment 1] FIG. 1 shows a circuit diagram of an embodiment of the present invention. Although each circuit element in the figure is not limited to a frame, each circuit element is made of silicon or the like using known semiconductor fabrication circuit manufacturing technology.
formed on two semiconductor substrates.

The collectors of the differential amplification transistors Ql and Q2 are connected to series transistors Q3, . One ends of load resistors RLI and RL2 are connected via Q4. That is, the emitter of transistor Q3 (Q4) is connected to the collector of transistor Ql (Q2-), and
3 (Q4) collector with load resistance RLI (RL2>
One end of is connected.

The other ends of these load resistors RLI and RL2 and the power supply voltage Vc
A series-type diode D1.c is connected between D1.c and D1. D3 and D2. D4 are connected in front of each other. A constant current source Io is provided between the common emitters of the differential amplification transistors Ql and Q2 and the ground potential of the circuit.

The minute voltages formed by the series-type diodes DI, D3, and D2 and D4 are applied as level shifting means in a crosswise manner, in other words, to be in phase with the base input voltages of the differential amplification transistors Ql and Q2. The above transistor Q is connected through Zener diodes DZI and DZ2.
3. This will be communicated to the base of Q4. That is, according to the collector current of the differential amplification transistor Ql, the diode D1
．． The minute voltage formed at D3 is applied to the Zener diode D
It is transmitted to the collector side of the other differential amplification transistor Q2 via Z'l and the base and emitter of the transistor Q4. On the other hand, according to the collector current of the differential amplification transistor Q2, the diode D2. The minute voltage formed at D4 is applied to the other differential amplification transistor Q via the Zener diode DZ2 and the base and emitter of transistor 0.3.
1 collector side.

Note that an input signal IN(+) is applied to the base of the differential amplifying transistor Q1, and the differential amplifying transistor Q2
An input signal IN(-) is applied to the base of . Then, an output signal OUT (-) is formed from the collector of the differential amplification transistor Q3, and the differential amplification transistor Q
An output signal OUT (+) is formed from the collector of 4.

Although not particularly limited, the differential amplification transistor Q1.
Q2 has a large base and emitter region in order to reduce noise.

[Embodiment 2] FIG. 2 shows a circuit diagram of another embodiment of the present invention.

In this embodiment, Zener diodes DZ1. DZ
2, a level shift circuit each composed of resistors R1 and R2 and a constant current source (2) is used. In this embodiment, an arbitrary level shift amount can be set by the resistors R1 and R2 and the current value of the constant current source I.

The operation of the circuit of the above embodiment will be explained next.

The collectors of the differential amplification transistors Ql and Q2 have
The constant current source IO is distributed and flows according to the voltage difference between the input signals IN (+, -). For this reason, the diode D1. A minute voltage of an opposite phase is generated in D2 according to the distributed current. The above amplification transistors Q1 and Q2
Since the voltage-current characteristics of the diodes DI, D3, and the diodes D2 to D4' are exactly the same, the minute voltage and the input signal voltage can be made to match. And the above diode D1゜l
D3 and D2. The minute voltages generated by D4 are crosswise applied to amplification transistors Q2. Ql
level shifted and transmitted to the collector.

This allows the base and collector voltages of the amplification transistors Ql and Q2 to be changed in phase. Therefore, even if there is a parasitic capacitance Cbc with a relatively large capacity value, no charging/discharging current is caused to flow, so that an operation equivalent to that without the capacitance can be performed.

〔effect〕

(1) By cross-level-shifting a minute voltage formed using the collector current of the differential amplification transistor and transmitting it to the collector,
The effect is that the collector potential is always kept constant and the parasitic capacitance between the base and the collector can be reduced equivalently.

(2) As a result of (1) above, the parasitic capacitance between the base and collector becomes invisible from the input side, and the cut-off frequency can be increased, making it possible to realize amplification operation in the high frequency 4■ range. can get.

(3) Due to (1) above, since the above parasitic capacitance is virtually not generated, differential amplification with lower noise and wider frequency band can be achieved by increasing the size of the emitter and base regions of the differential amplification transistor. The effect that a circuit can be formed is obtained.

(4) With the above +11 to (3), it is possible to obtain a differential amplifier circuit that accurately amplifies the minute read voltage from the magnetic disk memory device.

Although the invention made by the present inventor has been specifically explained based on examples, this invention is not limited to the above-mentioned examples, and it is possible to make various changes without departing from the gist of the invention. Not even. For example, other suitable impedance means may be used as the impedance means for forming a minute voltage according to the voltage of the input signal.

Further, the means for level shifting the minute voltage formed above may be any means as long as it does not affect the amplified output.

[Application field]

The above explanation mainly describes the case where the present invention is applied to a differential amplifier circuit for amplifying minute voltages such as readout circuit No. 8 of a magnetic disk memory device, which is the technical field behind the invention made by the present inventor. Although described above, the base of the differential amplification transistor described above is not limited to this.

It can be widely used in devices that perform amplification operations that require reduction of parasitic capacitance between collectors.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the invention, and FIG. 2 is a circuit diagram showing another embodiment of the invention.

Claims (1)

[Scope of Claims] 1. Differential amplification transistors Ql and Q2, load means respectively provided at the collectors of these transistors Ql and Q2, and the above-mentioned differential transistors respectively provided between these load means and voltage terminals. Q1. impedance means for forming a minute voltage commensurate with the minute voltage supplied to the base of the differential amplifying transistor Q2. and level shift means for transmitting the signal to the collector of Ql. 2. The minute voltage is applied to the differential amplification transistor Ql. A transistor Q'3. is provided between the collector of Q2 and the load means. 2. The differential amplifier circuit according to claim 1, wherein the differential amplifier circuit is supplied to the bases of Q4. 3. The differential amplifier circuit according to claim 1 or 2, wherein the minute voltage is formed by a forward voltage of a diode. 4. Claims 1 and 2, characterized in that the differential amplification transistor has a base equivalent resistance of a low resistance value by forming base and emitter regions of large size. Or the differential amplifier circuit according to item 3. 5. The differential amplification transistor Q1. The differential amplifier circuit according to claim 1, wherein the base of Q2 is supplied with a continuation signal of a magnetic disk memory device. .