JPS59226332A - Multi-emission strobe device - Google Patents

Abstract

PURPOSE:To trigger a flash light discharge tube with either charging or discharging of a trigger capacitor by adding a switching element to a trigger circuit of the flash light discharge tube. CONSTITUTION:A positive pulse from a pulse generating circuit 7 ignites a charging thyristor SR5 through a capacitor C9 to charge surely the commutating charge to a commutation capacitor C3. A positive one-shot pulse from a pulse generating circuit 11 ignites a thyristor SR4 through an OR gate OR1 and a capacitor C8. A capacitor C2 is charged quickly, through the thyristor SR4, and a potential Va of the capacitor C2 rises quickly. The supply current of the thyristor SR4 goes to lower than a holding current, and the thyristor SR4 is turned off. When a charging current is flowed to the primary coil of a transformer T1, a high voltage is generated in the secondary coil to set a discharge tube FL1 to the excitation state. The charged electric charge of a capacitor C1 passes the flash light discharge tube FL1 and a thyristor SR2 to start emission of flash light. Switching elments SR1 and SR4 are provided in series to a power source to make quick charging and discharging possible.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a multi-emission strobe device, more specifically, a multi-emission strobe device.
The present invention relates to a multi-flash device capable of intermittent flash light emission from a flash discharge tube over a plurality of times based on one trigger operation.

As we all know, things like the swing of a bat or the flight of an insect,
A single photograph that captures the continuously changing state of a moving object is generally called a decomposed photograph.To take this decomposed photograph, the shutter of the camera is usually opened and a strobe is used. A method of causing the device to emit light intermittently at high speed is adopted.For this reason, devices capable of emitting light intermittently at high speed have been conventionally provided as so-called multi-emission strobe devices.

However, all conventional multi-flash strobe devices have been equipped with multiple main capacitors or multiple flash discharge tubes to obtain flash light that is intermittent at high speed, resulting in large devices. The disadvantage was that as the technology became more popular, the price also became more expensive.

In order to overcome these conventional drawbacks, it would be sufficient to make the flash discharge tube emit light intermittently at high speed in a normal strobe device that has one main capacitor and one flash discharge tube. In the strobe device, the trigger capacitor was charged through a resistor, so it took time to charge the capacitor.
There was a problem in that the flash discharge tube's light emission interval was limited.

Next, the above problem will be explained in more detail using an example of a conventional strobe device shown in FIG.

This conventional strobe device is equipped with a power supply circuit 1 consisting of a well-known DC-DC converter, and a positive operating voltage supply line 11 is connected from its positive output terminal via a rectifying diode D. Negative operating voltage supply lines & are respectively led out from the output ends. Between the positive and negative operating voltage supply lines 4 r11o, a series circuit of a main capacitor C3, a resistor R1 and a neon lamp Ne for indicating charging completion, a series circuit of a resistor R3 and a trigger thyristor SR, and a coil IJI are connected. + Flash discharge tube F
A series circuit of L1 and main thyristor SR, a series circuit of resistor R2 and commutating thyristor SR3, and a dimming circuit 3
are connected to each other.

The anode of the trigger thyristor S'fL is a resistor R
2 to the above line 11, and the cathode is connected to the line ! . It is connected to the. In addition, the same thyristor S
The gate of R, is connected to a trigger circuit 2, and the trigger circuit 2 is connected to the line no. It is connected to the. The above resistance R7
The connection point between the trigger thyristor SR and the trigger capacitor C2 is connected to one end of the trigger capacitor C2.
The other end of 1 is connected to line 0 through the primary coil of a trigger transformer T. Trigger transformer T1-2
The next coil has one end connected to line LO and the other end to flash discharge tube FL.

is connected to the trigger electrode.

The coil L serves to moderate the rise and fall of the discharge current of the flash discharge tube FL.
A diode D2 is connected in parallel to the coil L. The main thyristor SR2 has an anode connected to the flash discharge tube FL, a cathode connected to the line 10, and a gate connected to the trigger circuit 2. Moreover, the anode of the main thyristor SR is connected to the resistor R
53 through line l.

and one end of the commutating capacitor C8, and the other end of the commutating capacitor C3 is connected to the resistor R.
4 and the commutation thyristor SR.

The anode of the commutating thyristor SR, is connected to the resistor R4, and the cathode to the line l. It is connected to the. The gate of the thyristor SR is connected to the dimming circuit 3.

In the conventional strobe device configured in this way,
By simultaneously firing the trigger thyristor SR and the main thyristor SR through the trigger circuit 2, flash light emission of the flash discharge tube FL is started. That is,
When the trigger thyristor SR is fired, current flows through the coil. As a result, a high voltage is generated in the secondary coil of the trigger transformer T, and this is applied to the trigger electrode of the flash discharge tube FL, causing the flash discharge tube PL to be in an excited state. Therefore, when the main thyristors SR, are fired at the same time, the charge accumulated in the main capacitor C8 is transferred to the coils L,
→ flash discharge tube FL → main thyristor S1'L, and flash discharge tube FL1 starts emitting flash light.

After the flash discharge tube FL1 starts flashing, if a predetermined amount of light is obtained, the dimming circuit 3 is activated and the commutating thyristor SR3 is activated.
is fired. As a result, the electric charge accumulated in the commutating capacitor C3 is reversely reversed to the main thyristor SR through the commutating thyristor SR, and the main thyristor SR2 is extinguished. Therefore, the flash discharge tube PL is cut off from the discharge current and stops emitting flash light.

By the way, the trigger capacitor C2 is connected to the trigger 94'.
) When the star SR is turned off, it receives charge through the resistor R7, and is again charged with a trigger charge. However, the resistance value of the resistor R2 is set to a fairly large value so that the current that should flow through the flash discharge tube PL when the trigger switch SR is ignited does not cross the resistor R2. Therefore, after the trigger thyristor SR1 is turned off, it takes time to charge the trigger capacitor C1, and even if the trigger circuit 2 is reactivated before the charging of the trigger capacitor C3 is completed, the flash discharge tube PL,
There was a problem that the flash was not excited and the flash light emission did not start.

In order to solve this problem, a multi-flash strobe device has already been put into practical use that uses a quick-charge controller to rapidly charge the trigger capacitor each time a flash is fired in preparation for the next flash. However, this strobe device also has the disadvantage that the rapid charging controller makes the device large and expensive, and that it is difficult to realize a sufficiently short flash interval.

In view of the above-mentioned points, an object of the present invention is to further add a switching element to a flash discharge tube trigger circuit conventionally provided in a strobe device, so that the flash discharge tube can be triggered by either charging or discharging a trigger capacitor. An object of the present invention is to provide a multi-light emitting strobe device that enables high-speed intermittent light emission of a flash discharge tube.

The present invention will be explained below based on an embodiment shown in the drawings.

FIG. 2 shows an electric circuit of a multi-flash flash device showing an embodiment of the present invention. In this strobe device, a trigger thyristor SR and another trigger thyristor SR are connected in series between the two operating voltage supply ports 10 and 10, on the right side. That is, a thyristor SR4 is inserted in place of the resistor R7 in the conventional device shown in FIG. Further, a series circuit of resistors R, . . . , and an NPN transistor Q1 is connected in parallel with the trigger thyristor 8R1. Furthermore, a charging thyristor SR is connected in parallel with the resistor R4.

The above other trigger thyristor SR has an anode connected to the line 11 and a cathode connected to the trigger thyristor SR.

connected to the anode of the Furthermore, the gate of the trigger signal SR, is connected to the same sensor SR through the resistor R.
4, and is connected to the cathode of capacitor C,
It is connected to the output end of the OR circuit OR. The gate of the trigger signal SR is connected to the line through the resistor R3. K is connected and capacitor C3
It is connected to the output end of a pulse generation circuit 12, which will be described later. The transistor Q above has a collector connected to a resistor R
0 to the anode of the trigger thyristor SR, and its emitter to line 10. Further, the base of the transistor Q1 is connected to a flip-flop circuit (hereinafter abbreviated as FF circuit) via a NOT circuit NT.
It is connected to the output terminal of 14.

The charging thyristor SR has its anode connected to line 11 and its cathode connected to the anode of the commutating thyristor SR, respectively, and has its gate connected to its own cathode through a resistor R0, and receives pulses through a capacitor C0. It is connected to the output terminal of the generating circuit 7. The commutating thyristor SR, has its gate connected to the line ! through the resistor R1. . It is also connected to the output end of the OR circuit OR1 via a capacitor C7.

Note that the main circuit SR has its gate connected to line 1 through resistor R6. K-connected, and is also connected to the output end of the pulse generation circuit 8 via a capacitor C6.

On the other hand, the multi! A synchro contact SW provided on the camera is connected to.

One end of this synchro contact SW is grounded, and the other end receives the application of the operating voltage Vcc through the resistor R13, and is connected to the input end of the NOT circuit NT3. The output terminal of the NOT circuit NTs is connected to the input terminal of the processing circuit 14, and the output terminal of the FF circuit 14 is connected to the sixth input terminal of the three-person AND circuit AD, the input terminal of the NOT circuit NTt, and the input terminal of the NOT circuit NTt. Generation circuit 150 input terminal and AND circuit AD,
are respectively connected to the other input terminals of the .

The pulse generation circuit 15 is a circuit that generates a positive one-shot pulse in response to the inversion of the input signal from the °L level to the lHt level (hereinafter, the same applies to other pulse generation circuits), and its output The terminals are connected to one input terminal of the OR circuits OR and one input terminal of the AND circuit AD, respectively. The other input terminal of the AND circuit AD4 is connected to the NOT circuit NT.
, to the switching contact terminal of the mode selection switch SW. This mode selector switch SW is
This is for selectively switching between the multi-light emission mode and the normal synchronous light-emission mode, and the operating voltage "Vcc" is applied to one fixed terminal a that selects the multi-light emission mode, and the synchronous light-emission mode is switched. The other fixed terminal for selecting is grounded.The switching contact terminal of the switch SW is connected to the 6-person AND circuit AD.

is connected to the second input terminal of the not circuit N
T is connected to the other input terminal of the AND circuit AD4 and to one input terminal of the AND circuit AD. The output terminal of the AND circuit AD4 is connected to the input terminal of the delay circuit 16, and the output terminal of the delay circuit 16 is connected to the OR circuit OR.
It is connected to one input end of 1.

The above three-person chain circuit A1. ), the first input terminal of the oscillation circuit 4 is connected to the output terminal of the oscillation circuit 4, and the oscillation circuit 4 includes a capacitor CIOrresistor R8o, one end of which is connected to the circuit 4, and an operating voltage Vcc applied to the other end. The oscillation pulse is output at a frequency corresponding to the value of . The output terminal of the AND circuit AD is connected to the input terminal of the frequency dividing circuit 50, the other input terminal of the AND circuit AD3, and the other input terminal of the AND circuit AD, and the output terminal of the frequency dividing circuit 5 is It is connected to one input end of the AND circuit AD2. The other input terminal of the AND circuit AD is connected to the output terminal of the FF circuit 21, and the output terminal of the AND circuit AD is connected to the input terminal of the counter 6. A count setting signal S1 for setting the light emission interval during multi-light emission is input to the counter 6, and the counter 6 sets a count number based on this count setting signal S1, and continues to input light up to that count number ( Every time the loop count is counted, a positive one-shot error (loose output) is output.

The output terminal of the counter 6 is an OR circuit OI't3. OR
The output terminal of the OR circuit OR is connected to the input terminal of the pulse generation circuit 7, and the output terminal of the OR circuit OR is connected to the input terminal of the pulse generation circuit 8. There is. The output terminal of the pulse generating circuit 7 is connected to the gate of the thyristor SR via the capacitor C0, and is also connected to the reset signal input terminal R of the counter 17.

Further, the output terminal of the pulse generating circuit 8 is connected to the gate of the main thyristor SR through a capacitor C6, and is also connected to one input terminal of an AND circuit AD3. The output end of the AND circuit AD is connected to the input end of the counter 9, and the output end of the counter 9 is connected to the input end of the FF circuit 10. The output end of the FF circuit 10 is connected to one end of the capacitor C11, and a NOT circuit NT.
are connected to one end of the capacitor C8° through the respective terminals. The other end of the capacitor CI+ is grounded through a resistor RII, and is also connected to the input end of the pulse generating circuit 11.

Further, the other end of the capacitor CtZ is grounded through a resistor RI, and is also connected to the input end of the pulse generation circuit 120. The output terminal of the pulse generating circuit 11 is connected to the other input terminal of the OR circuit OR, and is also connected to the other input terminal of the OR circuit OR. Also,
The output terminal of the pulse generation circuit 12 is connected to the gate of the trigger thyristor SR through a capacitor C6, and is also connected to one input terminal of the OR circuit OR.

The output terminal of the OR circuit OR is connected to the reset signal input terminal R of the counter 6 and the reset signal input terminal R of the FF circuit 21, and also to the input terminal of the FF circuit 130. The output end of the FF circuit 13 is connected to one input end of an AND circuit AD, and the output end of the AND circuit AD is connected to an input end of the counter 17. A count setting signal S for setting the light emission time (guide nano<) during multi-light emission is input to the counter 17, and the counter 17 sets the count number based on this count setting signal St. , a positive one-shot pulse is output every time the input cavities are counted up to that count number. This counter 1
The output terminal of 7 is connected to the reset signal input terminal R of the FF circuit 16 and also to the input terminal of the pulse generation circuit 18 .

The output terminal of the pulse generating circuit 18 is connected to the reset signal input terminal R of the counter 9, the other input terminal of the OR circuit OR, the input terminal of the counter 19, and the input terminal of the FF circuit 210, respectively. The counter 19 includes a count setting signal S for setting the number of times of light emission during multi-light emission;
is input, and the counter 19 sets a count number based on this count setting signal S, and outputs a positive one-shot pulse every time it counts input/(Russ) up to that count number. This counter 19
The output terminal of is connected to the input terminal of the pulse generation circuit 200, and a reset signal 93R for terminating the multi-light emission is outputted to the output terminal of the pulse generation circuit 20. This reset signal R is applied to the reset signal input terminal R of the counter 6.19 and the reset signal input terminal R of the FF circuit 10, respectively.
It is input to one input terminal of the OR circuit OR, and the same circuit OR
6 to the nut signal input terminal R of the FF circuit 14.

The output terminal of the AND circuit AD6 is connected to the input terminal of the NOT circuit NT6.

The output terminal of is connected to the base of an NPN transistor Q2. The collector and emitter of transistor Q are connected to one end and the other end of integrating capacitor CI4, respectively, and the opposite end of capacitor C140 is grounded. One end of the capacitor C14 is connected to the inverting input terminal of the comparison operational amplifier OP, and is also connected to the emitter of the photometric phototransistor PT1. An operating voltage Vcc is applied to the collector of the phototransistor PT, and a non-inverting input terminal of the operational amplifier OF is connected to a variable resistor 1. It is connected to the connection point of resistor R14. The other end of the variable resistor VB is connected to the operating voltage Vcc.
is applied, and the other end of the resistor R14 is grounded. The output end of the operational amplifier OP8 is connected to the input end of the NOT circuit NT7, and the output end of the NOT circuit NT is connected to one input end of the OR circuit OR. , OR circuit O via NT4
It is connected to the other input terminal of Ra. Above variable resistance ■
R1 has a resistance value set according to the shutter speed, film sensitivity value, and aperture value, and variable resistor VR, resistor R14,) transistor Q2, phototransistor PT, integrating capacitor C14, and operational amplifier OP1 are , forming a photometry circuit for automatic light control.

Note that parts corresponding to those in the conventional strobe device shown in FIG. 1 are similarly configured and connected in the same way, and therefore are given the same reference numerals and detailed explanation thereof will be omitted.

As described above, the multi-emission strobe device of this embodiment is configured.

Next, the operation of this multi-emission strobe device will be explained.

First, the operation in the multi-light emission mode in which the mode selector switch SWI is switched to the fixed terminal a will be described. In this case, the second input terminal of the AND circuit AD becomes the °H level, and the other input terminal of the AND circuit AD and the AND circuit A pass through the NOT circuit NT.
One of the input terminals of D, respectively, becomes l L level.

Therefore, the gate of AND circuit AD4 is closed, and delay circuit 1
6 becomes inactive, the gate of the AND circuit AD closes, and the photometry circuit becomes inactive. That is, AND circuit AD
When the gate of , closes, the base of the transistor Q becomes the °H level through the NOT circuit NT, turning on the transistor Q, and the charge current flowing through the phototransistor PT charges the integrating capacitor CI4. (naru)

Next, when the synchro contact SW2 of the camera is closed with this multi-flash mode selected, the contact SW2
Since the other end becomes the °L' level, the input end of the FF circuit 14 becomes the lHl level through the NOT circuit NT.
The FF circuit 14 is set. Therefore, F'F circuit 1
4 outputs a positive set output, and as shown in FIG. 3(f), the base of the transistor Q reaches the e L + level through the NOT circuit NT2, turning off the transistor Q1. Therefore, the trigger capacitor C2 is uncharged and is in a state where it is time to charge. Further, due to the positive set output of the FF circuit 14, the third input terminal of the six-person AND circuit AD becomes the °H degree level, so the gate of the circuit AD is opened and the oscillation pulse from the oscillation circuit 4 is output. is applied to the input terminal of frequency divider circuit 5, the other input terminal of AND circuit AD, and the other input terminal of AND circuit AD5.

Furthermore, since the input terminal of the pulse generation circuit 150 becomes the H level, a positive one-shot Hals is outputted to the output terminal of the pulse generation circuit 15. This one-shot pulse is transmitted to the pulse generation circuit 7 through OR circuits OR3 and OR4.
and 80 input terminals, respectively, and positive pulses as shown in FIGS. 3(e) and 3(C) are outputted to the output terminals of pulse generating circuits 7 and 8.

The positive pulse output from the pulse generating circuit 7 resets the counter 17 and also fires the charging thyristor S It through the capacitor C8, thereby ensuring charging of the commutating capacitor C3 with the commutating charge. Further, the positive pulse output from the pulse generation circuit 8 has a longer time width than the positive pulse output from the pulse generation circuit 7, and can conduct the main thyristor SR2 through the capacitor C6. triggers the state and opens the gate of the AND circuit AD, and the gate of the AND circuit A
The oscillation pulse from the oscillation circuit 4 is sent to the counter 9 through D.
input. When the counter 9 counts a predetermined number of input pulses, it outputs a positive one-shot pulse to set the FF circuit 10. The set FF circuit 10 is
By inverting the output to °H level and inputting the differential pulse to the pulse generation circuit 11 via the capacitor C11 and resistor R51, the pulse generation circuit 1 is input as shown in FIG. 3(a).
A positive one-shot pulse is generated at the output terminal of 1.

This positive one-shot pulse fires trigger thyristor SR4 through OR circuit OR, capacitor C8. When the thyristor SR4 is fired, a charging current flows through the thyristor SR,4 to the trigger capacitor C2. Trigger capacitor C2 is charged rapidly through Cyrisk SR, 4, so as shown in Fig. 3 (g).
As shown in FIG. 2, the potential va at one end of the capacitor C2 rises rapidly.

Note that when the trigger capacitor C2 is charged, the excess current of the thyristor SR4 becomes equal to or less than the holding current, and the thyristor SR4 is turned off. When a charging current flows through the primary coil of the °C trigger capacitor due to charging of the trigger capacitor C2, a high voltage is generated in the secondary coil of the transformer T1. This high voltage is applied to the trigger electrode to bring the flash discharge tube FL1 into an excited state, and at this point, the main thyristor SR2 is still triggered into a state where it can conduct by the positive pulse output from the pulse generation circuit 8 (the first Figure 3 (a), (C
), the charge in the main capacitor C1 flows through the flash discharge tube PL, → main thyristor SR2,
As shown in FIG. 3(j), the flash discharge tube PL starts emitting flash light.

Further, the positive pulse outputted from the pulse generating circuit 11 resets the counter 6 and the FF circuit 21 through the OR circuit OR, and also sets the F'F circuit 13. Therefore, the positive set output of the FF circuit 13 opens the gate of the AND circuit AD, and the oscillation pulse from the oscillation circuit 4 is input to the counter 17 through the AND circuit AD. When the counter 17 counts the number of counts set based on the count setting signal S2, it outputs a positive pulse, resets the FF circuit 16, closes the gate of the AND circuit ADs, and activates the pulse generating circuit 18. As shown in FIG. 3(d), a positive one-shot pulse is generated at the output terminal. This positive one-shot pulse fires the commutating thyristor SR8 through the OR circuit OR1 and the capacitor C7.

When the commutating capacitor C3 is turned on, the potentials Vb, Vc cam 5 across the commutating capacitor C3 are shown in Fig. (b).
(j) The commutation capacitor C suddenly decreases as shown in the figure.
The main thyristor SR2 is reverse biased by the full charge of 3, and the main thyristor SR2 is turned off. Therefore,
As shown in FIG. 3 (l), the light emission of the flash discharge tube PL is stopped.Furthermore, the positive one-shot pulse output from the pulse generating circuit 18 resets the counter 9 and also resets the counter 19. The count is increased by 1.Furthermore, the FF circuit 21 is set.
The output of 1 is inverted to °H level, and the gate of AND circuit AD2 is opened. Therefore, the divided pulses of the oscillation pulses of the oscillation circuit 4 are inputted to the counter 6 from the frequency dividing circuit 5, and the counter 6 starts counting the divided pulses.

When the counter 6 counts up to the count set by the count setting signal S1, that is, when the light emitting interval time set by the signal SI has elapsed, the counter 6 outputs a positive one-shot pulse and outputs an OR signal. circuit OR, and O
'fL, which is applied to the input terminals of pulse generation circuits 7 and 8, respectively.

Therefore, in the same way as when a positive one-shot pulse is applied from the pulse generating circuit 15, positive pulses are generated in the pulse generating circuits 7 and 8, respectively (see FIGS. 3(e) and 3(C)), and the thyristor SR2, SR.

is ignited and the counter 17 is reset.

When the thyristors SR2 and SR5 are fired, the commutation capacitor C8, which had been charged to the opposite polarity due to the commutation operation, is suddenly charged in the direction of charging the commutation charge (Fig. 3 (h)
), (see (i)) When the charging of the capacitor C3 is completed, the thyristors sR,2,SR, are turned off. However, the main thyristor SR2 is still conductive and triggered by the positive pulse output of the pulse generating circuit 8. Furthermore, the positive output of the pulse generation circuit 8 opens the gate of the AND circuit AD3, so that
When the counter 9 starts counting and counts a predetermined number of pulses, the FF circuit 10 that has been set is reset by the positive output pulse of the counter 9. Therefore, the output of the FF circuit 10 changes from °H level to lL
Then, the differential pulse generated by the capacitor C1□ and the resistor R12 is applied to the input terminal of the pulse generating circuit 12 through the NOT circuit NT. Therefore, the third
As shown in Figure (b), a positive pulse is output to the output terminal of the pulse generating circuit 12, and this time, Cyrisk SR is ignited through the capacitor C6. Thyristor SR,
When the trigger capacitor C2 is already charged by the firing of the thyristor SR4,
This time, the charge accumulated in the trigger capacitor C2 becomes
The thyristor SR1 is discharged again through the trigger transformer T and the 01st coil, and a high voltage is generated in the trigger transformer T and the 02nd coil. Therefore, the flash discharge tube FL is similarly excited, and as shown in FIG. 3(j), a second flash is started. The potential Va at one end of C2 is shown in Figure 3 (g
) shows a sudden decline.

The positive pulse output from the pulse generating circuit 12 is
Similar to the positive pulse output from the pulse generating circuit 11, the counter 6 and the FF circuit 21 are reset through the OR circuit ORs, the FF circuit 13 is set, and the gate of the AND circuit AD5 is opened to cause the counter 170 to count. Let it start. When the counter 17 counts up and a positive pulse is output from the counter 17, the FF circuit 13 is reset and the gate of the AND circuit ADl is closed, and the pulse generating circuit 18 is activated. A positive one-shot pulse is output from the 1st. This positive one-shot pulse is an OR circuit Q) J, .
, ry capacitor C7 to ignite the commutation thyristor SR, a commutation operation is performed, and the second flash emission of the flash discharge tube FL is stopped, as shown in FIG. 6U).

In addition, the positive pulse output from the pulse generation circuit 18 not only resets the counter 9 but also sets the FF circuit 21 to start counting the counter 6, and is input to the counter 19 to increase the counter 19 by one count. let

Thereafter, when the flash discharge tubes PL sequentially emit flash light in the same manner, the counter 19 is counted up by 1 for each light emission. Then, when the counter 19 counts up to the count number set by the count setting signal S3, that is,
When a set number of flashes are emitted, the counter 19 outputs a positive pulse, and the pulse generation circuit 20 outputs a reset signal R consisting of a positive one-shot pulse. This reset signal R is transmitted to the reset signal input terminal R of the counter 6.19 and the reset signal input terminal ■t of the FF circuit 10,
They are also applied to the reset signal input terminal R of the Fly' circuit 14 through the OR circuit OR. Therefore, each circuit 6.19.degree. 10, 14 is reset, and the multi-emission strobe device of this embodiment stops its operation in the commutation state, and ends the multi-emission.

Next, the operation of the present multi-flash flash device when the mode changeover switch SWI is switched to the fixed terminal and the synchronous flash mode is selected will be described. In this case, the second input terminal of the AND circuit AD is at the l L l level, so the gate of the AND circuit AD is closed, and the circuit that generates each trigger signal at the time of multi-light emission after the frequency divider circuit 5 At the same time, the other input terminal of the AND circuit AD4 becomes the lHl level through the NOT circuit NT, so the gate of the circuit AD4 opens and the delay circuit 16
becomes operational. In addition, since one input terminal of the AND circuit AD is also at the ゛H° level, the AND circuit AD
, the gate opens and the light metering circuit for dimming can be activated.

While this synchronized flash mode is selected,
When the cross contact SW2 is closed, the input terminal of the FF circuit 140 becomes the "H" level through the NOT circuit NT3, and the FF circuit 14 is set. Then, the transistor Q is turned off through the NOT circuit NT, and the trigger circuit becomes ready to operate. Further, since the other input terminal of the AND circuit AD6 becomes the °H level, the base of the transistor Q2 becomes e L + level through the NOT circuit NT6, and the transistor Q2 is turned off. Therefore, the photocurrent generated in the phototransistor PT is integrated into the integrating capacitor C14, and the photometry circuit starts photometry. Furthermore, the pulse generation circuit 15 is activated by the positive inverted output of the FF circuit 14, and the circuit 15 outputs a positive one-shot pulse. This one-shot pulse is an OR circuit O
Through R8 and OR4, pulse generation circuits 7 and 8
The positive one-shot pulse outputted from the first path 7 turns on the thyristor SR to charge the commutating capacitor C3, and the positive one-shot pulse outputted from the pulse generation circuit 8 The one-shot pulse triggers Cyrisk S R2 into a state where it can conduct.

Further, the positive one-shot pulse output from the pulse generation circuit 15 is passed through the AND circuit AI)4 to the delay circuit 1.
6, and the delay circuit 16 outputs a positive one-shot pulse after a predetermined delay time has elapsed. This positive one-shot pulse fires thyristor SR4 through OR circuit OR8 and capacitor C8, and ignites thyristor SR4.
As a charging current flows through trigger capacitor C2 through trigger capacitor C2, current flows through the primary coil of trigger transformer T1. Therefore, a high voltage is generated in the transformer T and the secondary coil, and by applying this high voltage to the trigger electrode, the flash discharge tube FL1 is excited, and the flash discharge tube FL starts to emit flash light.

By photometering the reflected light from the subject, the integrated voltage of the integrating capacitor C14 is changed to the resistance va,
, when it exceeds the reference voltage which is the connection point voltage of RX4,
The output of the comparison operational amplifier OP is inverted, and the NOT circuit N
T, , thyristor SR3 is fired through OR circuit OR2 and capacitor C7. From this K, the charge in the commutating capacitor C3 reverse biases the main thyristor S11'L2 through the thyristor SR3.
Extinguish the arc of R2. Therefore, the synchronous light emission of the flash discharge tube PL is automatically adjusted and stopped.

In addition, the inverted output of the operational amplifier OP is the NOT circuit NT.
, ,NT, ,NT4. FF through OR circuit OR6
Applied to the reset signal input terminal R of the circuit 14, the circuit 1
Reset 4. Therefore, AND circuit AD6. The transistor Q2 is turned on through the NOT circuit NT, and the photometric circuit enters the non-1111J light state, and the NOT circuit N
Transistor Q is turned on through T2, and both ends of trigger capacitor C2 are short-circuited, making the trigger circuit inoperable. Therefore, the multi-emission strobe device of this embodiment is
When the mode changeover switch SW is switched to the fixed terminal, it functions as a normal autostroboscopic device.

As described above, according to the present invention, since the flash discharge tube is triggered using both the torrent currents flowing when charging and discharging the trigger capacitor, high-speed multiple It can emit light. Furthermore, charging and discharging charges of the trigger capacitor can be used extremely efficiently.

Further, by adding a switching element to the trigger circuit of the conventional strobe device, it is possible to perform high-speed triggering of the flash discharge tube, so that multiple light emission can be performed with a small and inexpensive configuration.

It is possible to provide a multi-light emitting strobe device which overcomes the conventional drawbacks mentioned at the beginning of the specification and which is extremely convenient in terms of use and manufacture.

[Brief explanation of the drawing]

FIG. 1 is an electric circuit diagram showing an example of a conventional strobe device, FIG. 2 is an electric circuit diagram of a multi-flash strobe device showing an embodiment of the present invention, and FIGS. 2 is a time chart showing changes in the output of each part in the multi-light emitting device shown in FIG. 2 above. 1...Power supply circuit (power supply) 11.12...Pulse generation circuit C2...Main capacitor C...Trigger capacitor FL,...Flash discharge tube SR,... Trigger thyristor (second switching element) SR... Trigger thyristor (first switching element) SW... Synchro contact T,... Trigger transformer patent Applicant Olympus Optical Industry Co., Ltd. Agent Fujikawa Seventh Division Proceeding Amendment (spontaneous) Commissioner of the Japan Patent Office Kazuo Wakasugi1, Indication of case Patent Application No. 102218 of 19822, Title of invention Multi-light emitting strobe device 3 , Relationship to the case of the person making the amendment Patent applicant name (037) Olympus Optical Industry Co., Ltd. 4, Agent address Mr. 5-52-14 Matsubara, Setagaya-ku, Tokyo
Name (7655) Fujikawa 7th Department (Section 324-2700) 5. Subject of amendment In column 6 of “Detailed Description of the Invention” of the specification, the contents of the amendment are as follows: ", then "
Determined by film speed and aperture information.

Claims (1)

[Claims] A first capacitor connected at both ends to a power supply or a main capacitor.
and a series circuit of a second switching element; a series circuit of a trigger capacitor and a primary coil of a trigger transformer connected in parallel to either one of the first and second switching elements; 1. A multi-emitting strobe device comprising: trigger signal generating means for alternately applying a trigger signal to the second switching element.